Commit graph

11 commits

Author SHA1 Message Date
Ricardo de Almeida Gonzaga a27af5b395 x86: Add Intel Quark X1000 I2C support
This patch adds the i2c.c, i2c.h and i2c-registers.h files,
which support access to I2C controller configuration register
through a function interface.
2015-12-21 08:06:14 -02:00
Ricardo de Almeida Gonzaga 2d552285cd x86: Add Intel Quark X1000 GPIO Controller (non-legacy) support
This patch adds the gpio.c and gpio.h files, which support
access to GPIO Controller (non-legacy) configuration register
through a function interface.

It doesn't add interrupt support due to pinmux reasons. On
Galileo Gen 2 we need to configure a pin as input/interrupt
using pinmux and this can only be achieved through I2C. There's
one pin exported by default as GPIO output and we used this one
to test this driver.

In the future, we plan to add an I2C driver and a pinmux configuration
driver in order to solve this kind of problems.
2015-12-21 08:06:14 -02:00
Michael LeMay 0dcd5e9b5a x86: Revise CFLAGS and LDFLAGS for LLVM Clang compatibility
This patch slightly revises CFLAGS and LDFLAGS to specify the
optimization and debugging options and linker script in a way that is
compatible with using Clang as the C compiler and to invoke the linker
(i.e. CC = clang and LD = clang).
2015-12-21 08:06:14 -02:00
Michael LeMay 15f947fe40 x86: Add Intel Quark X1000 UART support.
This patch adds a driver that wraps the generic 16X50 UART driver with
specific support for the two Intel Quark X1000 built-in UARTs.
2015-12-21 08:06:14 -02:00
Michael LeMay 6acdf50262 x86: Add driver for MMIO-accessible 16X50 UART
This patch adds a driver for an MMIO-accessible 16X50 UART.  It
assumes that the boot firmware assigned an MMIO range to the UART.  It
operates in polled mode with FIFOs enabled.
2015-12-21 08:06:14 -02:00
Michael LeMay 2dccb55e15 x86: Add PCI support
This patch adds the pci.c and pci.h files, which support access to PCI
configuration registers through a function interface.  It defines the
PCI configuration register access I/O port addresses and the
pci_config_addr union and structure to assist in specifying addresses
of PCI configuration registers.  It also defines the PCI configuration
register identifier for PCI BAR0.

This patch also adds wrappers for 32-bit 'in' and 'out' port I/O
instructions.  They were placed in helpers.S, since they may be useful
to other modules besides just the PCI support module.
2015-12-21 08:06:14 -02:00
Andre Guedes 96e50ec2c4 galileo: Fix Makefile.galileo
This patch moves the compiler and linking options related to QuarkX1000
SoC to Makefile.x86_quarkX1000 since it is more suitable. For instance,
'-m32' should be used in any platform based on QuarkX1000, not only
Galileo. The same rationale applies for the others options (e.g. -march,
mtune).
2015-12-21 08:06:14 -02:00
Andre Guedes cb0510ebcf x86: Disable NMI while initializing RTC
According to [1], we should disable non-maskable and maskable interrupts
while initializing RTC. Otherwise, the RTC may be left in an undefined
state (non-functional) if an interrupt occurs. Currently, maskable
interrupts are already disabled, but NMI is not.

This patch adds helpers APIs to enable/disable non-maskable interrupts
(NMI) and changes rtc_init() to disable NMI while initializing the RTC.

NMI enable/disable code is legacy-PC specific therefore it was put in
driver/legacy_pc/ directory.

Regarding the RTC initialization changes, just calling nmi_disable() and
nmi_enable is not enough since NMI and RTC share the same IO port. So We
should also set the NMI_ENABLE bit while selecting the RTC_INDEX.

Additionally, the nmi_disable() call is not strictly required since we
set the NMI_ENABLE bit while selecting the RTC_INDEX. However, to make
clear hat we are disabling NMI and to improve readability (by matching
NMI disable/enable), the nmi_disable() call was purposely used.

[1] http://wiki.osdev.org/RTC
2015-12-21 08:06:14 -02:00
Andre Guedes a8849b2909 x86: Move bootstrap code and linker script to cpu/x86
This is a refactoring patch, no functionality is changed. It moves
loader.S and galileo.ld from platform/galileo/ to cpu/x86/ directory
since they seem to be more SoC-specific than platform-specific.

It also renames galileo.ld to quarkX1000.ld since it can be used by
any platform based on Quark X1000 SoC, not only Galileo.

Furthermore, this patch also renames loader.S to bootstrap_quarkX1000.S
since it is pretty much a bootstrap code to any platform based on Quark
X1000 SoC.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia 80fe1de0b1 x86: Isolate SoC specific cpu_init code
This commit turns cpu_init() into a SoC-agnostic function by
removing any SoC specific calls and isolating them into their
own SoC implementation.

We start this by isolating all IRQs initialization code from
the legacy-pc target, pic_init() and spurious IRQ7 registration,
into a new interface: irq_init() from irq.h. Future SoCs will have
to provide their own implementation of this interface.

This model is to be followed by future initialization code that
we may need to add and which is not common to all x86 SoCs.
2015-12-21 08:06:14 -02:00
Jesus Sanchez-Palencia b2fa72bb98 x86: Break Makefile.x86 into common and pc specific ones
Now the cpu/x86/ provides a Makefile.x86_common and a
Makefile.x86_pc. The former includes the common Makefile
and adds legacy pc specific implementations (currently,
drivers only) into the building context, while the latter
has everything that defines the bootstrap of a x86 CPU.

This commit also fixes platform/galileo/ so it includes the
correct makefile - Makefile.x86_quarkX1000. Galileo uses
a Quark X1000 SoC which is not an IBM Generic PC-like CPU,
but it does provide most of a PCs peripherals through
its "Legacy Bridge". Thus, it makes sense that QuarkX1000's
Makefile includes code from the legacy_pc x86 cpu.
2015-12-21 08:06:14 -02:00