This avoids the limitation of having a single UART available at runtime, without
duplicating code.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Because the CC2538 has a multi-byte SPI RX FIFO, flushing the buffer
requires more than just a single read. This adds a loop that empties the
entire RX buffer on a FLUSH().
Different SPI chips needs different SPI settings. This commit adds a
function that allows chip drivers to configure the SPI peripheral before
using it.
The frame pin the driver was using as a chip select does not work as
most devices expect it to. It toggles after every byte, and most chips
interpret that as end of message. To make drivers more reliable, each
chip driver should setup a GPIO and assert it as needed.
The CC2538 currently has two addressing options: a hardcoded address set
at compile time or the address stored in primary address section of the
info page. This commit adds the option to choose the secondary location
of the ieee address from the info page, or any memory address.
To use, define `IEEE_ADDR_CONF_USE_SECONDARY_LOCATION` in `project-conf.h`
or similar.
For example:
#define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 1
As discussed in #503, -Os was broken with one of the toolchains
recommended in the platform's README and for that reason we were
using -O2 by default.
This commit sets the default to -Os and updates the README to no
longer recommend the toolchain in question
Create a dedicated header file with all the definitions for the flash lock bit
page and customer configuration area. This avoids duplicating those definitions
in the startup-gcc.c files of all CC2538-based platforms, and this also allows
to easily manipulate the CCA from outside startup-gcc.c (e.g. for on-the-air
firmware update).
The definitions are now complete contrary to what was in startup-gcc.c:
- Definitions have been added to select the bootloader backdoor pin and active
level if enabled.
- Definitions have been added to access the page and debug lock bits. The debug
lock bit can be used to prevent someone from reading back a programmed
firmware through JTAG if the firmware binary image has to be confidential,
which should be combined with a disabled bootloader backdoor.
- The application entry point is now tied to the beginning of the .text section
instead of to the beginning of the flash. This allows projects using custom
linker scripts to place the application entry point anywhere in the flash,
which can be useful e.g. for on-the-air firmware update.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
SYS_CTRL_EMUOVR is already defined in sys-ctrl.h, so #include this header file
instead of redefining SYS_CTRL_EMUOVR in startup-gcc.c.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
As the comment in contiki-conf.h says, the automatic definition of
SLIP_ARCH_CONF_ENABLED works only if UIP_FALLBACK_INTERFACE is tied to SLIP. If
UIP_FALLBACK_INTERFACE is set to another interface, SLIP_ARCH_CONF_ENABLED is
still automatically set to 1, leading to unwanted SLIP_END characters from
dbg.c:putchar() being printed on the UART.
This change makes it possible to force the definition of SLIP_ARCH_CONF_ENABLED
(e.g. from project-conf.h), so that it can be disabled if UIP_FALLBACK_INTERFACE
is used with something else than SLIP.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Homogenize port and pin definitions naming:
- PERIPHERAL_FUNCTION_PORT for the port ID,
- PERIPHERAL_FUNCTION_PIN for the pin ID,
- PERIPHERAL_FUNCTION_PORT_BASE for the port base,
- PERIPHERAL_FUNCTION_PIN_MASK for the pin mask.
Define only PERIPHERAL_FUNCTION_PORT and PERIPHERAL_FUNCTION_PIN in board.h, and
deduce PERIPHERAL_FUNCTION_PORT_BASE and PERIPHERAL_FUNCTION_PIN_MASK in the
driver from the former definitions.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Use the GPIO accessor macros instead of copying raw register access code all
over the place. This is cleaner and less error prone.
This fixes the setting of the USB pull-up resistor that worked only by chance on
the CC2538DK because it is controlled by the pin 0 of the used GPIO port.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Some peripherals have their clocks automatically gated in PM1+ modes, so they
cannot operate. This new mechanism gives peripherals a way to prohibit PM1+
modes so that they can properly complete their current operations before
entering PM1+.
This mechanism is implemented with peripheral functions registered to the LPM
module. These functions return whether the associated peripheral permits or not
PM1+ modes. They are called by the LPM module each time PM1+ might be possible.
If any of the peripherals wants to block PM1+, then the system is only dropped
to PM0.
Partly from: George Oikonomou
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
This uses the core/dev/spi.h header and implements the spi_init()
function and the various macros for SPI operation. ssi.h contains all of
the register locations and information.
This implementation is not very versatile, mostly because I don't how to
make it flexible in the contiki system. It supports pin muxing for the
four spi pins, but other than that picks sensible defaults.
The SPI macros (like SPI_READ()) are defined in
cpu/cc2538/spi-arch.h. In order to use the SPI driver, add the following
includes to your project:
#include "spi-arch.h
#include "dev/spi.h"
