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Author SHA1 Message Date
Michael LeMay
25c07613c2 x86: Add driver for message bus
The Intel Quark X1000 SoC includes a message bus that is accessible
via PCI configuration registers.  It communicates to various SoC
components such as the Isolated Memory Region (IMR) registers and the
Remote Management Unit.  This patch adds a driver for accessing the
message bus.
2016-03-17 08:35:48 -07:00