- build cc65 libraries only for target supported by Contiki
- instead of building all examples for all 6502 targets build
- all examples for one target (c64)
- the most demanding client example (webbrowser) for all 6502 targets
- the most demanding server examples (webserver) for all 6502 targets
like /tools/mspsim.
This is a very simple modification that affects a very large number of files in Contiki: Cooja,
/platform/cooja, Collect-view, Coffe-manager, and Cooja simulation files (.csc).
I've gone through Contiki to update all references I could find. Nevertheless, this commit will likely
break external dependencies, like saved Cooja simulation files.
se.sics.cooja.GUI -> se.sics.cooja.Cooja
this commit does not contain any functional changes, but may require external scripts to be updated
such as Makefiles.
Use the GPIO accessor macros instead of copying raw register access code all
over the place. This is cleaner and less error prone.
This fixes the setting of the USB pull-up resistor that worked only by chance on
the CC2538DK because it is controlled by the pin 0 of the used GPIO port.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Introduce new useful GPIO macros to:
- read the levels of some port pins,
- write the levels of some port pins (pass bit-field value to be set),
- clear the interrupt flags for some port pins.
These macros are cleaner and less error prone than raw register access code
copied all over the place.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
The parameters in the GPIO macros were used without being parenthesized. This
could generate wrong values for register assignments in the case of expressions
passed as arguments to these macros.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
lpm_enter() must not enter PM1+ if the UART TX FIFO is not empty. Otherwise, the
UART clock gets disabled, and its TX is broken.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Some peripherals have their clocks automatically gated in PM1+ modes, so they
cannot operate. This new mechanism gives peripherals a way to prohibit PM1+
modes so that they can properly complete their current operations before
entering PM1+.
This mechanism is implemented with peripheral functions registered to the LPM
module. These functions return whether the associated peripheral permits or not
PM1+ modes. They are called by the LPM module each time PM1+ might be possible.
If any of the peripherals wants to block PM1+, then the system is only dropped
to PM0.
Partly from: George Oikonomou
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
