Commit graph

83 commits

Author SHA1 Message Date
George Oikonomou b0f1199202 Merge pull request #636 from g-oikonomou/fix-random-init-lockup
Fix CC2538 random_init lockup
2014-04-18 13:28:40 +01:00
George Oikonomou 49bf7cc241 Merge pull request #616 from hexluthor/listing
CC2538: Add a Makefile rule to generate a final assembly listing.
2014-04-17 22:13:52 +01:00
Benoît Thébaudeau d93d129da6 cc2538: uart: Make it possible to use several UARTs simultaneously
This avoids the limitation of having a single UART available at runtime, without
duplicating code.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2014-04-17 18:53:44 +02:00
Brad Campbell af27d2d252 [CC2538-SPI] Implement SPI_FLUSH, spi mode, !CS
Because the CC2538 has a multi-byte SPI RX FIFO, flushing the buffer
requires more than just a single read. This adds a loop that empties the
entire RX buffer on a FLUSH().

Different SPI chips needs different SPI settings. This commit adds a
function that allows chip drivers to configure the SPI peripheral before
using it.

The frame pin the driver was using as a chip select does not work as
most devices expect it to. It toggles after every byte, and most chips
interpret that as end of message. To make drivers more reliable, each
chip driver should setup a GPIO and assert it as needed.
2014-04-15 14:07:10 -04:00
George Oikonomou 602f834caf Merge pull request #472 from ADVANSEE/cc2538-clock-adjust-etimer-poll
cc2538: clock: Fix clock / timer issues with PM1/2
2014-04-13 16:35:17 +01:00
George Oikonomou eed1352282 Fix CC2538 random_init lockup
Contiki sometimes fails to boot correctly and locks up in
random_init()

This problem only manifests itself for specific versions
of the arm-gcc toolchain and then again only for specific
levels of optimisation (-Os vs -O2, depending on the
value of the SMALL make variable)

The lockup is caused when we write an RFCORE XREG before
the RF clock ungating has taken effect, which in turn
only occurs depending on the assembly generated for those
two instructions:

  REG(SYS_CTRL_RCGCRFC) = 1;

  REG(RFCORE_XREG_FRMCTRL0) = 0x00000008;

This commit makes the RNG wait for the ungating to take
effect before attempting to write the register
2014-04-13 14:38:00 +01:00
George Oikonomou 33abe26ec8 Merge pull request #411 from ADVANSEE/cc2538-adc
cc2538: Add adc driver and example
2014-04-13 03:05:12 +01:00
Ian Martin 56d0dfdc7a CC2538: Add a Makefile rule to generate a final assembly listing. 2014-04-02 18:17:49 -04:00
Ian Martin 336224633a Eliminate UART_CONF_IBRD and UART_CONF_FBRD. 2014-03-22 10:26:03 -04:00
Ian Martin ee45fc7533 Change uart_set_baudrate() to a do-while statement. 2014-03-22 10:22:11 -04:00
Ian Martin 1ceb8ae358 Fix rounding error in baudrate calculation. 2014-03-22 10:21:54 -04:00
Ian Martin e3c19714d4 cc2538: Support any UART baudrate. 2014-03-14 16:06:24 -04:00
George Oikonomou 5675e688a8 Merge pull request #562 from Noolitic/CC2538_UART
CC2538: add support for UART baudrate 9600, 38400 and 57600
2014-03-08 23:41:52 +00:00
Brad Campbell d14f0d5eed CC2538: add secondary location to ieee address
The CC2538 currently has two addressing options: a hardcoded address set
at compile time or the address stored in primary address section of the
info page. This commit adds the option to choose the secondary location
of the ieee address from the info page, or any memory address.

To use, define `IEEE_ADDR_CONF_USE_SECONDARY_LOCATION` in `project-conf.h`
or similar.

For example:

    #define IEEE_ADDR_CONF_USE_SECONDARY_LOCATION 1
2014-03-06 10:31:30 -05:00
LudovicW d979e5b096 CC2538: add support for UART baudrate 9600, 38400 and 57600 2014-02-11 16:01:36 +01:00
George Oikonomou 332d56ac11 Make some CC2538 CFLAGS and LDFLAGS common
Some CFLAGS and LDFLAGS previously only enabled with SMALL=1 have
now been enabled for all builds, regardless of the value of SMALL.

Therefore, from now on, SMALL only chooses between -Os and -O2
2014-01-31 20:02:43 +00:00
George Oikonomou a63376f8be Use -Os for CC2538 builds
As discussed in #503, -Os was broken with one of the toolchains
recommended in the platform's README and for that reason we were
using -O2 by default.

This commit sets the default to -Os and updates the README to no
longer recommend the toolchain in question
2014-01-31 20:02:43 +00:00
George Oikonomou c8fbf8ca6e Merge pull request #503 from ADVANSEE/cc2538-nrdata-noload
cc2538: Clean up link stage
2014-01-30 07:58:55 -08:00
Nicolas Tsiftes 4e6bed24f9 Merge pull request #547 from adamdunkels/push/rimeaddr-linkaddr
Rename the rimeaddr module to linkaddr
2014-01-29 12:57:44 -08:00
Adam Dunkels 45265249fc Changed the name of the rimeaddr module to linkaddr 2014-01-29 20:12:24 +01:00
George Oikonomou 345532c559 Merge pull request #546 from ADVANSEE/cc2538-fix-disabled-lpm
cc2538: lpm: Fix build for LPM_CONF_ENABLE == 0
2014-01-29 08:40:56 -08:00
Adam Dunkels 765e9acded Merge pull request #499 from adamdunkels/bold/modularize-everything
A bold move: modularize everything
2014-01-29 08:17:10 -08:00
Benoît Thébaudeau 42c287f363 cc2538: lpm: Fix build for LPM_CONF_ENABLE == 0
lpm.c needs to #include lpm.h in order to get the definition of
lpm_periph_permit_pm1_func_t, which made the replacement macros conflict with
the function definitions for the LPM_CONF_ENABLE == 0 case. This change fixes
this issue by #if-ing out the code in lpm.c in that case. Also, the replacement
macro for lpm_register_peripheral() was missing in that case, which is fixed
here.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2014-01-28 20:21:06 +01:00
Benoît Thébaudeau a562acb160 cc2538: Fix library linkage
If a project needs to use some libraries at link stage, then the corresponding
linker options (e.g. '-lm') have to be passed after any .o file depending on
these libraries. Hence, LDFLAGS cannot be used to add such options when invoking
$(LD) in Makefile.cc2538, or it should be moved to the correct location.
Instead, this change adds TARGET_LIBFILES to the correct location, like most
other Contiki targets.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2014-01-28 14:32:30 +01:00
Adam Dunkels 0fe08205e1 Moved the rimeaddr.[ch] code from the core/net/rime module to the core/net module, as it is used not only by rime code 2014-01-26 23:20:36 +01:00
Benoît Thébaudeau fe4eb545c0 cc2538: Remove the unused vtable section
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-23 15:50:05 +01:00
Benoît Thébaudeau 37e73894f1 cc2538: Move SoC data to a dedicated section to save space
Some SoC data requires huge alignments. E.g., the µDMA channel control table has
to be 1024-byte aligned. This table was simply aligned to 1024 bytes in the C
code, which had the following consequences, wasting a lot of RAM:
 - As this table could be placed anywhere in .bss, there could be an alignment
   gap of up to 1023 bytes between the preceding data and this table.
 - The size of this table was also aligned to 1024 bytes, regardless of
   UDMA_CONF_MAX_CHANNEL, making this configuration option supposed to save RAM
   just useless.
 - .bss was also aligned to at least 1024 bytes, creating a huge alignment gap
   between .data and .bss.

Instead of relying on the compiler to force this alignment, and on the linker to
automatically place data, this change places carefully such SoC data in RAM
using the linker script. A dedicated section is created to place such SoC data
requiring huge alignments, and it is put at the beginning of the SRAM in order
to ensure a maximal alignment without any gap. In this way, the alignment of
.bss also remains normal, and the size of this table is not constrained by its
alignment, but only by its contents (i.e. by UDMA_CONF_MAX_CHANNEL).

In the case of the µDMA channel control table, the data is still zeroed by
udma_init() (instead of also being zeroed as part of .bss).

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-23 15:06:13 +01:00
Benoît Thébaudeau ab4b955f17 cc2538: Sort link input sections by alignment to optimize size
Normally, the linker does not sort files and sections matched by wildcards, so
they are placed in the order in which they are seen during link. If numerous
objects with different alignments are mixed, or if objects with unusually large
alignments are present, this very likely leads to a lot of space being wasted
because of accumulated alignment gaps.

This commit forces input sections to be sorted by alignment (unless this is
overridden by the linker script), which decreases the number and the size of
alignment gaps, thus saving space.

For a typical Contiki project, this change saves nearly 1 kiB, mainly in .bss.

Note that this behavior is only enabled if the SMALL make variable is set to 1,
because this makes more sense for a size optimization.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-19 21:45:27 +01:00
Benoît Thébaudeau e1147ec787 cc2538: Set the type of the .nrdata output section to NOLOAD
The .nrdata section is volatile, so its initialization must be controlled by the
application, and not be automatically done by the startup code. It should
neither be zeroed like .bss, nor be initialized from data in flash memory like
.data. This was already supposed to be the case, but the output section type of
.nrdata was not set to NOLOAD, causing the generated ELF .nrdata section header
to be of type PROGBITS instead of NOBITS, i.e. load data was generated to be
programmed in RAM, thus producing huge unprogrammable .bin files.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-13 17:45:57 +01:00
Benoît Thébaudeau dbba311270 cc2538: Add adc driver and example
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-06 22:07:45 +01:00
Benoît Thébaudeau d86b8275ec cc2538: clock: Fix time drift occurring with PM1/2
The clock adjustments made when waking up from PM1/2 were very inaccurate. If
relying on ContikiMAC's rtimer to sleep, this led to Contiki's software clock
time, seconds and etimers to be 2.5 s slower after each min, i.e. 1 hour slower
after each day, which is a show stopper issue for most real-life applications.

This was caused by a lack of accuracy in several pieces of code during sleep
entry and wake-up:
 - It was difficult to synchronize the calls to RTIMER_NOW() before and after
   sleep with the deactivation and activation of the SysTick peripheral caused
   by PM1/2. This caused an inaccuracy in the corrective number of ticks passed
   to clock_adjust().
 - The value passed to clock_adjust() was truncated from an rtimer_clock_t
   value, but the accumulated error caused by these truncated bits was ignored.
 - The SysTick peripheral had to be stopped during the call to clock_adjust().

Rather than creating even more complicated clock adjustment mechanisms that
would probably still have mixed results as to accuracy, this change simply uses
the Sleep Timer counter as a base value for Contiki's clock and seconds
counters. The tick from the Systick peripheral is still used as the interrupt
source to update Contiki's clocks and timers. When running, the SysTick
peripheral and the Sleep Timer are synchronized, so combining both is not an
issue, and this allows not to alter the rtimer interrupt mechanism using the
Sleep Timer. The purpose of the Sleep Timer is to be an RTC, so it is the
perfect fit for the clock module, all the more it can not be disturbed by PM1/2.
If the 32-kHz XOSC is used, the Sleep Timer is also very accurate. If the
32-kHZ RCOSC is used, it is calibrated from the 32-MHz XOSC, so it is also
accurate, and the 32753-Hz vs. 32768-Hz systematic error in that case is
negligible, all the more one would use the 32-kHz XOSC for better accuracy.

Besides fixing this time drift issue, this change has several benefits:
 - clock_time(), clock_seconds() and RTIMER_NOW() start synchronized, and they
   change at the same source pace.
 - If clock_set_seconds() is called, then clock_seconds() indicates one more
   second almost exactly one second later, then exactly each second. Before this
   change, clock_seconds() was not synchronized with clock_set_seconds(), so the
   value returned by the former could be incremented immediately after the call
   to the latter in some cases.
 - The code tied to the clock module is simpler and more robust.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-06 13:04:30 +01:00
Benoît Thébaudeau b7515004da cc2538: clock: Fix secs update in clock_adjust()
Whole elapsed seconds are added to secs first, so only the remaining subsecond
ticks should then be subtracted from second_countdown in order to decide whether
secs should be incremented again.

Otherwise, secs is not correctly updated in some cases, typically if the bit 7
of ticks is 1. E.g., with ticks = 128 (i.e. exactly 1 s elapsed) and
second_countdown = 128, secs was first incremented as expected, then 128 was
subtracted from second_countdown, giving 0 and triggering an unwanted second
increment of secs. Or with ticks = 129 (i.e. 1 s + 1 tick) and
second_countdown = 1, secs was first incremented as expected, then 129 was
subtracted from second_countdown, giving 128 and missing a second increment of
secs that should have occurred because second_countdown wrapped around.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-06 13:02:37 +01:00
Benoît Thébaudeau 28a563a24b cc2538: clock: Request an etimer poll in clock_adjust()
During PM1+, the hardware timer used to implement the Contiki clock is frozen,
so clock_adjust() needs to be called when exiting those modes in order to
compensate for the clock ticks missed while the timer was frozen. Doing so
changes the Contiki clock time, so etimer_request_poll() needs to be called in
order to inform the etimer library that an etimer might have expired.

Note that waiting for the next clock ISR to call etimer_request_poll() is
unreliable because the system might go back to sleep beforehand.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-06 13:02:37 +01:00
Benoît Thébaudeau 5261bb861d cc2538: lpm: Fix RTIMER_NOW() upon wake-up
When returning from PM1/2, the sleep timer value (used by RTIMER_NOW()) is not
up-to-date until a positive edge on the 32-kHz clock has been detected after the
system clock restarted. To ensure an updated value is read, wait for a positive
transition on the 32-kHz clock by polling the SYS_CTRL_CLOCK_STA.SYNC_32K bit,
before reading the sleep timer value.

Because of this RTIMER_NOW() fixup, lpm_exit() has to be called at the very
beginning of ISRs waking up the SoC. This also ensures that all clocks and
timers are enabled at the correct frequency and updated before using them
following wake-up.

Without this fix, etimers could sometimes (randomly, depending on timings)
become ultra slow (observed from 10x to 40x slower than normal) if the system
exited PM1/2 very often. This issue occurred more often with PM1.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau f149197aa8 cc2538: lpm: Speed up the transition to the 32-MHz XOSC after wake-up
As recommended by the CC2538 User's Guide, set SYS_CTRL_CLOCK_CTRL.OSC_PD to 0
before asserting WFI, and set it to 1 after the system clock is sourced from the
32-MHz XOSC following wake-up. This allows to automatically start both
oscillators upon wake-up in order to partially hide the 32-MHz XOSC startup time
by the 16-MHz RCOSC startup time.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau 13006e1c73 cc2538: lpm: Let system clock transitions complete before further changes
As a matter of precaution, always make sure that pending system clock
transitions are complete before requesting a new change of the system clock
source.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
Benoît Thébaudeau 8514a91ea9 cc2538: lpm: Fix energest context when aborting lpm_enter()
In one of the abort cases in lpm_enter(), the energest context has previously
been set to LPM, so the abort code needs to set it back to CPU.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 20:23:29 +01:00
George Oikonomou f2c552bb55 Merge pull request #478 from ADVANSEE/cc2538-startup-cleanup
cc2538: Startup cleanup
2013-12-05 11:07:19 -08:00
George Oikonomou 17b2150081 Merge pull request #463 from ADVANSEE/cc2538-ports-pins
cc2538: Clean up and improve port and pin definitions
2013-12-05 10:31:29 -08:00
Benoît Thébaudeau a2686e581e cc2538: Add header file for flash CCA page and use it
Create a dedicated header file with all the definitions for the flash lock bit
page and customer configuration area. This avoids duplicating those definitions
in the startup-gcc.c files of all CC2538-based platforms, and this also allows
to easily manipulate the CCA from outside startup-gcc.c (e.g. for on-the-air
firmware update).

The definitions are now complete contrary to what was in startup-gcc.c:
 - Definitions have been added to select the bootloader backdoor pin and active
   level if enabled.
 - Definitions have been added to access the page and debug lock bits. The debug
   lock bit can be used to prevent someone from reading back a programmed
   firmware through JTAG if the firmware binary image has to be confidential,
   which should be combined with a disabled bootloader backdoor.
 - The application entry point is now tied to the beginning of the .text section
   instead of to the beginning of the flash. This allows projects using custom
   linker scripts to place the application entry point anywhere in the flash,
   which can be useful e.g. for on-the-air firmware update.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-12-05 18:45:51 +01:00
George Oikonomou 8b003c30c7 Merge pull request #471 from ADVANSEE/cc2538-gpio-power-up
cc2538: gpio: Add support for power up
2013-12-05 09:25:05 -08:00
George Oikonomou 97cdf39b95 Merge pull request #464 from ADVANSEE/cc2538-pm2-sram
cc2538: lpm: Give access to the SRAM non-retention area for PM2
2013-12-05 09:19:22 -08:00
Benoît Thébaudeau 1a696eb123 cc2538: gpio: Clear the power-up interrupts in the port ISRs
The pending GPIO power-up interrupts have to be cleared in the ISRs in order not
to re-trigger the interrupts and the wake-up events.

The power-up interrupts of all pins are cleared for each port in the
corresponding port ISR. This is done after calling the registered callbacks so
that the callbacks can know which pin woke up the SoC. This is done after
clearing the regular interrupt in order to avoid getting a new wake-up interrupt
without the regular interrupt in the case of a new wake-up edge occurring
between the two clears.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-26 22:20:05 +01:00
Benoît Thébaudeau 44a5c76884 cc2538: gpio: Add macros to use GPIO power-up interrupts
The GPIO power-up interrupts have to be configured and enabled in order to be
able to wake-up the SoC from PM1+ upon a signal edge occurring on a GPIO input
pin.

This set of macros allows to:
 - configure the signal edge triggering a power-up interrupt,
 - enable and disable a power-up interrupt,
 - clear a power-up interrupt flag.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-26 22:10:47 +01:00
Benoît Thébaudeau 621f4f7339 cc2538: lpm: Give access to the SRAM non-retention area for PM2
If PM2 is enabled with LPM_CONF_MAX_PM, but not active, the non-retention area
of the SRAM can be useful to place temporary data that does not fit in the
low-leakage SRAM, typically after having called lpm_set_max_pm(LPM_PM1). Hence,
give access to this non-retention area thanks to .nrdata* sections.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-25 15:43:37 +01:00
Benoît Thébaudeau 270ed237fd cc2538: usb: Make the GPIO driving the pull-up optional
The data sheet recommends that the USB pull-up resistor be driven by a GPIO so
that it can be controlled by software, but this is not mandatory. Hence, leave
the choice so that CC253-based boards not using this option can build and work
fine.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-25 15:15:35 +01:00
Benoît Thébaudeau d2f3795a30 cc2538: Clean up port and pin definitions
Homogenize port and pin definitions naming:
 - PERIPHERAL_FUNCTION_PORT for the port ID,
 - PERIPHERAL_FUNCTION_PIN for the pin ID,
 - PERIPHERAL_FUNCTION_PORT_BASE for the port base,
 - PERIPHERAL_FUNCTION_PIN_MASK for the pin mask.

Define only PERIPHERAL_FUNCTION_PORT and PERIPHERAL_FUNCTION_PIN in board.h, and
deduce PERIPHERAL_FUNCTION_PORT_BASE and PERIPHERAL_FUNCTION_PIN_MASK in the
driver from the former definitions.

Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
2013-11-25 15:00:41 +01:00
Adam Dunkels bb2dcaa057 A massive all-tree automated update of all double inclusion guard #defines that changes from using two underscores as a prefix, which are reserved, to not using two underscores as a prefix 2013-11-24 20:20:11 +01:00
Adam Dunkels 1ab28e4668 Added missing argument declaration 2013-11-23 15:05:16 +01:00
Adam Dunkels e95236b642 Added header declarations for cc2538_rf_read_rssi() and cc2538_rf_set_promiscous_mode() 2013-11-23 15:05:16 +01:00