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6 commits

Author SHA1 Message Date
Michael LeMay abeed93da5 x86: Add driver for Intel Quark X1000 built-in Ethernet
This patch adds a simple, space-efficient driver for the Ethernet
interface built into the Intel Quark X1000.  It only allocates a
single packet descriptor for each of the transmit and receive
directions, computes checksums on the CPU, and enables
store-and-forward mode for both transmit and receive directions.
2015-12-21 08:06:14 -02:00
Ricardo de Almeida Gonzaga 60f6edef80 x86: Add support for PCI BAR1
This patch adds support for PCI BAR1 and also changes
the pci_init(), instead of having one function for each `bar`
we now set the `bar` to pci_config_addr_t parameter before calling
the pci_init() function..
2015-12-21 08:06:14 -02:00
Michael LeMay 6dc27579bc x86: Extend PCI driver module with support for metadata and configuration writes
This patch adds the 'meta' field to the generic driver structure to
point to optional driver-defined metadata.  It also modifies the
associated initialization routine to populate it and updates the 16X50
UART driver to use the new initialization routine signature.  This
patch also adds a function to perform PCI configuration register
writes, definitions for the PCI Command configuration register address
and some of the bits in that register, and a function to set
additional bits in that register.  Finally, it adds macros to help
with performing MMIO to and from PCI devices.
2015-12-21 08:06:14 -02:00
Ricardo de Almeida Gonzaga c796e270bf x86: Add Intel Quark X1000 PCI Interrupt Routing support
PCI Interrupt Routing is mapped using Interrupt Queue Agents
IRQAGENT[0:3] and aggregating the INT[A:D] interrupts for each
PCI-mapped device in the SoC.

PCI based interrupts PIRQ[A:H] are then available for consumption
by either the 8259 PICs or the IO-APIC, depending on the configuration
of the 8 PIRQx Routing Control Registers PIRQ[A:H].

More information about can be find in Intel Quark X1000 datasheet[1]
section 21.11.

[1] - http://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html
2015-12-21 08:06:14 -02:00
Michael LeMay c5f9cefac7 x86: Add generic driver structure and associated initialization code
This patch adds a generic device driver structure with a field for
referencing an MMIO range.  It also provides a structure
initialization procedure that initializes the MMIO range field with
the value read from the PCI BAR0 register for a device.
2015-12-21 08:06:14 -02:00
Michael LeMay 2dccb55e15 x86: Add PCI support
This patch adds the pci.c and pci.h files, which support access to PCI
configuration registers through a function interface.  It defines the
PCI configuration register access I/O port addresses and the
pci_config_addr union and structure to assist in specifying addresses
of PCI configuration registers.  It also defines the PCI configuration
register identifier for PCI BAR0.

This patch also adds wrappers for 32-bit 'in' and 'out' port I/O
instructions.  They were placed in helpers.S, since they may be useful
to other modules besides just the PCI support module.
2015-12-21 08:06:14 -02:00