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2 commits

Author SHA1 Message Date
Michael LeMay 3908253038 x86: Add support for (paging-based) protection domains
This patch implements a simple, lightweight form of protection domains
using a pluggable framework.  Currently, the following plugin is
available:

 - Flat memory model with paging.

The overall goal of a protection domain implementation within this
framework is to define a set of resources that should be accessible to
each protection domain and to prevent that protection domain from
accessing other resources.  The details of each implementation of
protection domains may differ substantially, but they should all be
guided by the principle of least privilege.  However, that idealized
principle is balanced against the practical objectives of limiting the
number of relatively time-consuming context switches and minimizing
changes to existing code.

For additional information, please refer to cpu/x86/mm/README.md.

This patch also causes the C compiler to be used as the default linker
and assembler.
2016-03-21 17:18:06 -07:00
Michael LeMay 25c07613c2 x86: Add driver for message bus
The Intel Quark X1000 SoC includes a message bus that is accessible
via PCI configuration registers.  It communicates to various SoC
components such as the Isolated Memory Region (IMR) registers and the
Remote Management Unit.  This patch adds a driver for accessing the
message bus.
2016-03-17 08:35:48 -07:00