Inline timer init functions, no static storage
Hardware init function profit a great deal from being inlined if the given parameters are constant -- which is the common use-case, we could probably call this for all timers and still have less overhead. The hwtimer_pwm_ini (which calls hwtimer_ini) gets completely computed at compile-time resulting only in the register settings of hwtimer_ini. This is now possible because we get rid of static storage for the max_ticks and instead compute this in hwtimer_pwm_max_ticks from the timer register settings.
This commit is contained in:
Ralf Schlatterbeck
parent
c46d6afa39
commit
fd54bc9ca4
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@ -14,8 +14,7 @@ CONTIKI_CPU=$(CONTIKI)/cpu/avr
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### TARGETLIBS are platform-specific routines in the contiki library path
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### TARGETLIBS are platform-specific routines in the contiki library path
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CONTIKI_CPU_DIRS = . dev
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CONTIKI_CPU_DIRS = . dev
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AVR = clock.c mtarch.c eeprom.c flash.c rs232.c leds-arch.c \
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AVR = clock.c mtarch.c eeprom.c flash.c rs232.c leds-arch.c \
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watchdog.c rtimer-arch.c bootloader.c hw_timer.c \
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watchdog.c rtimer-arch.c bootloader.c
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hw_pwm_timer.c
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ELFLOADER = elfloader.c elfloader-avr.c symtab-avr.c
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ELFLOADER = elfloader.c elfloader-avr.c symtab-avr.c
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TARGETLIBS = random.c leds.c
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TARGETLIBS = random.c leds.c
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@ -1,142 +0,0 @@
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/*
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* Copyright (c) 2014, Ralf Schlatterbeck Open Source Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
|
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
|
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
|
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*/
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/**
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* \addgroup hardware timer
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*
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* @{
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*/
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/**
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* \file
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* Alternative initialisation with period in microseconds
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* \author
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* Ralf Schlatterbeck <rsc@runtux.com>
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*/
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#include <avr/pgmspace.h>
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#include "contiki.h"
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#include "rtimer-arch.h"
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#include "hw_timer.h"
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/* one for each possible timer */
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uint16_t hwt_max_ticks [6];
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#define PERIOD_MAX (0xFFFFFFFF / (F_CPU / 1000000))
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/* for 16-bit timer: */
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#define TICKS_MAX 0xFFFF
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#define TICKS_MIN 0xFF
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int8_t
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hwtimer_pwm_ini (uint8_t timer, uint32_t period_us, uint8_t pwm_type, uint8_t ocra)
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{
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uint32_t ticks = 0;
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uint8_t clock = HWT_CLOCK_PRESCALER_1024;
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uint8_t wgm = HWT_WGM_NORMAL;
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HWT_CHECK_TIMER (timer);
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if (period_us > PERIOD_MAX) {
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period_us = PERIOD_MAX;
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}
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ticks = (F_CPU / 1000000) * period_us;
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/* Non-fast PWM modes have half the frequency */
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if (pwm_type != HWT_PWM_FAST) {
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ticks >>= 1;
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}
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/*
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* Divisors are 1, 8, 64, 256, 1024, shifts between these are
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* 3, 3, 2, 2, respectively. We modify `ticks` in place, the AVR can
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* shift only one bit in one instruction, so shifting isn't cheap.
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* We try to get the *maximum* prescaler that still permits a tick
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* resolution of at least 8 bit.
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*/
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if (ticks <= (TICKS_MIN << 3)) {
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clock = HWT_CLOCK_PRESCALER_1;
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}
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else if ((ticks >>= 3) <= (TICKS_MIN << 3)) {
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clock = HWT_CLOCK_PRESCALER_8;
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}
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else if ((ticks >>= 3) <= (TICKS_MIN << 2)) {
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clock = HWT_CLOCK_PRESCALER_64;
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}
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else if ((ticks >>= 2) <= (TICKS_MIN << 2)) {
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clock = HWT_CLOCK_PRESCALER_256;
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}
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else if ((ticks >>= 2) > TICKS_MAX) {
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ticks = TICKS_MAX;
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}
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hwt_max_ticks [timer] = ticks;
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switch (pwm_type) {
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case HWT_PWM_FAST:
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wgm = ocra ? HWT_WGM_PWM_FAST_OCRA : HWT_WGM_PWM_FAST_ICR;
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break;
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case HWT_PWM_PHASE_CORRECT:
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wgm = ocra ? HWT_WGM_PWM_PHASE_OCRA : HWT_WGM_PWM_PHASE_ICR;
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break;
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case HWT_PWM_PHASE_FRQ_CORRECT:
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default:
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wgm = ocra ? HWT_WGM_PWM_PHASE_FRQ_OCRA : HWT_WGM_PWM_PHASE_FRQ_ICR;
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break;
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}
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/* Special 8- 9- 10-bit modes */
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if (pwm_type == HWT_PWM_FAST || pwm_type == HWT_PWM_PHASE_CORRECT) {
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if (ticks == 0xFF) {
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wgm = (pwm_type == HWT_PWM_FAST)
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? HWT_WGM_PWM_FAST_8_BIT
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: HWT_WGM_PWM_PHASE_8_BIT;
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}
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else if (ticks == 0x1FF) {
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wgm = (pwm_type == HWT_PWM_FAST)
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? HWT_WGM_PWM_FAST_9_BIT
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: HWT_WGM_PWM_PHASE_9_BIT;
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}
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else if (ticks == 0x3FF) {
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wgm = (pwm_type == HWT_PWM_FAST)
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? HWT_WGM_PWM_FAST_10_BIT
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: HWT_WGM_PWM_PHASE_10_BIT;
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}
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}
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return hwtimer_ini (timer, wgm, clock, ticks);
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}
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uint32_t hwtimer_pwm_max_ticks (uint8_t timer)
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{
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if (timer > 5) {
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return 0;
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}
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return hwt_max_ticks [timer];
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}
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/*
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* ex:ts=8:et:sw=2
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*/
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/** @} */
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@ -1,103 +0,0 @@
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/*
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* Copyright (c) 2014, Ralf Schlatterbeck Open Source Consulting
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
|
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*/
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/**
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* \addgroup hardware timer
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*
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* @{
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*/
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/**
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* \file
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* Header file for hardware timer of AVR microcontrollers
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* \author
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* Ralf Schlatterbeck <rsc@runtux.com>
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*/
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#include <avr/pgmspace.h>
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#include "contiki.h"
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#include "rtimer-arch.h"
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#include "hw_timer.h"
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#ifndef PLAT_TIMER
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#define PLAT_TIMER 0xFF /* invalid timer for comparison */
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#endif
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int8_t hwtimer_ini (uint8_t timer, uint8_t wgm, uint8_t clock, uint16_t maxt)
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{
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int8_t i;
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HWT_CHECK_TIMER (timer);
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if (wgm > HWT_WGM_MASK || wgm == HWT_WGM_RESERVED) {
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return HWT_ERR_INVALID_WGM;
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}
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if (clock > HWT_CLOCK_MASK) {
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return HWT_ERR_INVALID_CLOCK;
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}
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/* Turn off clock, no need to disable interrupt */
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*HWT_TCCRB (timer) &= ~HWT_CLOCK_MASK;
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*HWT_TCCRA (timer) &= ~(HWT_WGM_MASK_LOW << HWT_WGM_SHIFT_LOW);
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*HWT_TCCRA (timer) |= ((wgm & HWT_WGM_MASK_LOW) << HWT_WGM_SHIFT_LOW);
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*HWT_TCCRB (timer) &= ~(HWT_WGM_MASK_HIGH << HWT_WGM_SHIFT_HIGH);
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*HWT_TCCRB (timer) |= ((wgm & HWT_WGM_MASK_HIGH) << HWT_WGM_SHIFT_HIGH);
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for (i=0; i<3; i++) {
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HWT_SET_COM (timer, i, HWT_COM_NORMAL);
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}
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if ( wgm == HWT_WGM_PWM_PHASE_FRQ_ICR
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|| wgm == HWT_WGM_PWM_PHASE_ICR
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|| wgm == HWT_WGM_CTC_ICR
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|| wgm == HWT_WGM_PWM_FAST_ICR
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)
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{
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*HWT_ICR (timer) = maxt;
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}
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if ( wgm == HWT_WGM_CTC_OCRA
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|| wgm == HWT_WGM_PWM_PHASE_FRQ_OCRA
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|| wgm == HWT_WGM_PWM_PHASE_OCRA
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|| wgm == HWT_WGM_PWM_FAST_OCRA
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)
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{
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*HWT_OCRA (timer) = maxt;
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}
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/* Set clock, finally */
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*HWT_TCCRB (timer) |= clock;
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return 0;
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}
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/*
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* ex:ts=8:et:sw=2
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*/
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/** @} */
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@ -215,7 +215,57 @@
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* Note that this sets the compare output mode COM registers to 0,
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* Note that this sets the compare output mode COM registers to 0,
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* turning off PWM on outputs.
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* turning off PWM on outputs.
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*/
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*/
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int8_t hwtimer_ini (uint8_t timer, uint8_t wgm, uint8_t clock, uint16_t maxt);
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static inline int8_t
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hwtimer_ini (uint8_t timer, uint8_t wgm, uint8_t clock, uint16_t maxt)
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{
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int8_t i;
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HWT_CHECK_TIMER (timer);
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if (wgm > HWT_WGM_MASK || wgm == HWT_WGM_RESERVED) {
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return HWT_ERR_INVALID_WGM;
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}
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if (clock > HWT_CLOCK_MASK) {
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return HWT_ERR_INVALID_CLOCK;
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}
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/* Turn off clock, no need to disable interrupt */
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*HWT_TCCRB (timer) &= ~HWT_CLOCK_MASK;
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*HWT_TCCRA (timer) &= ~(HWT_WGM_MASK_LOW << HWT_WGM_SHIFT_LOW);
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*HWT_TCCRA (timer) |= ((wgm & HWT_WGM_MASK_LOW) << HWT_WGM_SHIFT_LOW);
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*HWT_TCCRB (timer) &= ~(HWT_WGM_MASK_HIGH << HWT_WGM_SHIFT_HIGH);
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*HWT_TCCRB (timer) |= ((wgm & HWT_WGM_MASK_HIGH) << HWT_WGM_SHIFT_HIGH);
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for (i=0; i<3; i++) {
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HWT_SET_COM (timer, i, HWT_COM_NORMAL);
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}
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if ( wgm == HWT_WGM_PWM_PHASE_FRQ_ICR
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|| wgm == HWT_WGM_PWM_PHASE_ICR
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|| wgm == HWT_WGM_CTC_ICR
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|| wgm == HWT_WGM_PWM_FAST_ICR
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)
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{
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*HWT_ICR (timer) = maxt;
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}
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if ( wgm == HWT_WGM_CTC_OCRA
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|| wgm == HWT_WGM_PWM_PHASE_FRQ_OCRA
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|| wgm == HWT_WGM_PWM_PHASE_OCRA
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|| wgm == HWT_WGM_PWM_FAST_OCRA
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)
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{
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*HWT_OCRA (timer) = maxt;
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}
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/* Set clock, finally */
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*HWT_TCCRB (timer) |= clock;
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return 0;
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}
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/* Needed for implementation */
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#define HWT_PERIOD_MAX_ (0xFFFFFFFF / (F_CPU / 1000000))
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/* for 16-bit timer: */
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#define HWT_TICKS_MAX_ 0xFFFF
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#define HWT_TICKS_MIN_ 0xFF
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/**
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/**
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* \brief Convenience function to initialize hardware timer for PWM
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* \brief Convenience function to initialize hardware timer for PWM
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@ -248,8 +298,76 @@ int8_t hwtimer_ini (uint8_t timer, uint8_t wgm, uint8_t clock, uint16_t maxt);
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* pin associated with this register can not be used for PWM. Instead it
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* pin associated with this register can not be used for PWM. Instead it
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* can be used to change the period.
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* can be used to change the period.
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*/
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*/
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int8_t
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static inline int8_t
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hwtimer_pwm_ini (uint8_t timer, uint32_t period_us, uint8_t pwm_type, uint8_t ocra);
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hwtimer_pwm_ini (uint8_t timer, uint32_t period_us, uint8_t pwm_type, uint8_t ocra)
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{
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uint32_t ticks = 0;
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uint8_t clock = HWT_CLOCK_PRESCALER_1024;
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uint8_t wgm = HWT_WGM_NORMAL;
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HWT_CHECK_TIMER (timer);
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if (period_us > HWT_PERIOD_MAX_) {
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period_us = HWT_PERIOD_MAX_;
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}
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ticks = (F_CPU / 1000000) * period_us;
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/* Non-fast PWM modes have half the frequency */
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|
if (pwm_type != HWT_PWM_FAST) {
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|
ticks >>= 1;
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|
}
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|
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||||||
|
/*
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||||||
|
* Divisors are 1, 8, 64, 256, 1024, shifts between these are
|
||||||
|
* 3, 3, 2, 2, respectively. We modify `ticks` in place, the AVR can
|
||||||
|
* shift only one bit in one instruction, so shifting isn't cheap.
|
||||||
|
* We try to get the *maximum* prescaler that still permits a tick
|
||||||
|
* resolution of at least 8 bit.
|
||||||
|
*/
|
||||||
|
if (ticks <= (HWT_TICKS_MIN_ << 3)) {
|
||||||
|
clock = HWT_CLOCK_PRESCALER_1;
|
||||||
|
}
|
||||||
|
else if ((ticks >>= 3) <= (HWT_TICKS_MIN_ << 3)) {
|
||||||
|
clock = HWT_CLOCK_PRESCALER_8;
|
||||||
|
}
|
||||||
|
else if ((ticks >>= 3) <= (HWT_TICKS_MIN_ << 2)) {
|
||||||
|
clock = HWT_CLOCK_PRESCALER_64;
|
||||||
|
}
|
||||||
|
else if ((ticks >>= 2) <= (HWT_TICKS_MIN_ << 2)) {
|
||||||
|
clock = HWT_CLOCK_PRESCALER_256;
|
||||||
|
}
|
||||||
|
else if ((ticks >>= 2) > HWT_TICKS_MAX_) {
|
||||||
|
ticks = HWT_TICKS_MAX_;
|
||||||
|
}
|
||||||
|
switch (pwm_type) {
|
||||||
|
case HWT_PWM_FAST:
|
||||||
|
wgm = ocra ? HWT_WGM_PWM_FAST_OCRA : HWT_WGM_PWM_FAST_ICR;
|
||||||
|
break;
|
||||||
|
case HWT_PWM_PHASE_CORRECT:
|
||||||
|
wgm = ocra ? HWT_WGM_PWM_PHASE_OCRA : HWT_WGM_PWM_PHASE_ICR;
|
||||||
|
break;
|
||||||
|
case HWT_PWM_PHASE_FRQ_CORRECT:
|
||||||
|
default:
|
||||||
|
wgm = ocra ? HWT_WGM_PWM_PHASE_FRQ_OCRA : HWT_WGM_PWM_PHASE_FRQ_ICR;
|
||||||
|
break;
|
||||||
|
}
|
||||||
|
/* Special 8- 9- 10-bit modes */
|
||||||
|
if (pwm_type == HWT_PWM_FAST || pwm_type == HWT_PWM_PHASE_CORRECT) {
|
||||||
|
if (ticks == 0xFF) {
|
||||||
|
wgm = (pwm_type == HWT_PWM_FAST)
|
||||||
|
? HWT_WGM_PWM_FAST_8_BIT
|
||||||
|
: HWT_WGM_PWM_PHASE_8_BIT;
|
||||||
|
}
|
||||||
|
else if (ticks == 0x1FF) {
|
||||||
|
wgm = (pwm_type == HWT_PWM_FAST)
|
||||||
|
? HWT_WGM_PWM_FAST_9_BIT
|
||||||
|
: HWT_WGM_PWM_PHASE_9_BIT;
|
||||||
|
}
|
||||||
|
else if (ticks == 0x3FF) {
|
||||||
|
wgm = (pwm_type == HWT_PWM_FAST)
|
||||||
|
? HWT_WGM_PWM_FAST_10_BIT
|
||||||
|
: HWT_WGM_PWM_PHASE_10_BIT;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
return hwtimer_ini (timer, wgm, clock, ticks);
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Simple init macro for sane default values
|
* Simple init macro for sane default values
|
||||||
|
|
@ -260,11 +378,42 @@ hwtimer_pwm_ini (uint8_t timer, uint32_t period_us, uint8_t pwm_type, uint8_t oc
|
||||||
/**
|
/**
|
||||||
* \brief Maximum timer value usable in hwtimer_set_pwm
|
* \brief Maximum timer value usable in hwtimer_set_pwm
|
||||||
* \param timer: Timer to use
|
* \param timer: Timer to use
|
||||||
* \return
|
* \return max. timer value according to current timer setup
|
||||||
*
|
* negative value if wrong timer given
|
||||||
*
|
* a positive value is guaranteed to fit into 16 bit unsigned.
|
||||||
*/
|
*/
|
||||||
uint32_t hwtimer_pwm_max_ticks (uint8_t timer);
|
static inline int32_t hwtimer_pwm_max_ticks (uint8_t timer)
|
||||||
|
{
|
||||||
|
uint8_t wgm = 0;
|
||||||
|
HWT_CHECK_TIMER (timer);
|
||||||
|
wgm = ((*HWT_TCCRA (timer) >> HWT_WGM_SHIFT_LOW) & HWT_WGM_MASK_LOW)
|
||||||
|
| ((*HWT_TCCRB (timer) >> HWT_WGM_SHIFT_HIGH) & HWT_WGM_MASK_HIGH)
|
||||||
|
;
|
||||||
|
switch (wgm) {
|
||||||
|
case HWT_WGM_PWM_PHASE_8_BIT:
|
||||||
|
case HWT_WGM_PWM_FAST_8_BIT:
|
||||||
|
return 0xFF;
|
||||||
|
case HWT_WGM_PWM_PHASE_9_BIT:
|
||||||
|
case HWT_WGM_PWM_FAST_9_BIT:
|
||||||
|
return 0x1FF;
|
||||||
|
case HWT_WGM_PWM_PHASE_10_BIT:
|
||||||
|
case HWT_WGM_PWM_FAST_10_BIT:
|
||||||
|
return 0x3FF;
|
||||||
|
case HWT_WGM_CTC_OCRA:
|
||||||
|
case HWT_WGM_PWM_PHASE_FRQ_OCRA:
|
||||||
|
case HWT_WGM_PWM_PHASE_OCRA:
|
||||||
|
case HWT_WGM_PWM_FAST_OCRA:
|
||||||
|
return *HWT_OCRA (timer);
|
||||||
|
case HWT_WGM_PWM_PHASE_FRQ_ICR:
|
||||||
|
case HWT_WGM_PWM_PHASE_ICR:
|
||||||
|
case HWT_WGM_CTC_ICR:
|
||||||
|
case HWT_WGM_PWM_FAST_ICR:
|
||||||
|
return *HWT_ICR (timer);
|
||||||
|
case HWT_WGM_NORMAL:
|
||||||
|
return 0xFFFF;
|
||||||
|
}
|
||||||
|
return HWT_ERR_INVALID_WGM;
|
||||||
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* The following functions are defined inline to allow for compiler
|
* The following functions are defined inline to allow for compiler
|
||||||
|
|
|
||||||
Loading…
Reference in a new issue