Merge branch 'master' of git://git.devl.org/git/malvira/libmc1322x into update-lib
This commit is contained in:
Mariano Alvira
commit
fa08b09770
6 changed files with 333 additions and 1 deletions
116
cpu/mc1322x/lib/include/asm.h
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116
cpu/mc1322x/lib/include/asm.h
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@ -0,0 +1,116 @@
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#ifndef ASM_H
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#define ASM_H
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/* Structure-based register definitions */
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/* Example use:
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ASM->KEY0 = 0xaabbccdd;
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ASM->CONTROL1bits = (struct ASM_CONTROL1) {
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.MASK_IRQ = 1,
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.CBC = 1,
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};
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ASM->CONTROL1bits.SELF_TEST = 1;
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*/
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struct ASM_struct {
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uint32_t KEY0;
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uint32_t KEY1;
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uint32_t KEY2;
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uint32_t KEY3;
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uint32_t DATA0;
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uint32_t DATA1;
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uint32_t DATA2;
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uint32_t DATA3;
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uint32_t CTR0;
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uint32_t CTR1;
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uint32_t CTR2;
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uint32_t CTR3;
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uint32_t CTR0_RESULT;
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uint32_t CTR1_RESULT;
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uint32_t CTR2_RESULT;
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uint32_t CTR3_RESULT;
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uint32_t CBC0_RESULT;
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uint32_t CBC1_RESULT;
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uint32_t CBC2_RESULT;
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uint32_t CBC3_RESULT;
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union {
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uint32_t CONTROL0;
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struct ASM_CONTROL0 {
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uint32_t :24;
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uint32_t START:1;
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uint32_t CLEAR:1;
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uint32_t LOAD_MAC:1;
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uint32_t :4;
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uint32_t CLEAR_IRQ:1;
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} CONTROL0bits;
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};
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union {
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uint32_t CONTROL1;
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struct ASM_CONTROL1 {
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uint32_t ON:1;
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uint32_t NORMAL_MODE:1;
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uint32_t BYPASS:1;
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uint32_t :21;
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uint32_t CBC:1;
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uint32_t CTR:1;
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uint32_t SELF_TEST:1;
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uint32_t :4;
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uint32_t MASK_IRQ:1;
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} CONTROL1bits;
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};
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union {
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uint32_t STATUS;
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struct ASM_STATUS {
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uint32_t :24;
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uint32_t DONE:1;
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uint32_t TEST_PASS:1;
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uint32_t :6;
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} STATUSbits;
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};
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uint32_t reserved;
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uint32_t MAC0;
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uint32_t MAC1;
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uint32_t MAC2;
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uint32_t MAC3;
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};
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static volatile struct ASM_struct * const ASM = (void *) (0x80008000);
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#endif
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@ -166,5 +166,7 @@ extern void uart1_isr(void) __attribute__((weak));
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extern void maca_isr(void) __attribute__((weak));
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extern void maca_isr(void) __attribute__((weak));
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extern void asm_isr(void) __attribute__((weak));
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#endif
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#endif
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@ -46,5 +46,6 @@
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#include "packet.h"
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#include "packet.h"
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#include "uart1.h"
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#include "uart1.h"
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#include "utils.h"
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#include "utils.h"
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#include "asm.h"
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#endif
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#endif
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@ -87,6 +87,9 @@ void irq(void)
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cal_isr();
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cal_isr();
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}
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}
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}
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}
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if(bit_is_set(pending, INT_NUM_ASM)) {
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if(asm_isr != 0) { asm_isr(); }
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}
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*INTFRC = 0; /* stop forcing interrupts */
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*INTFRC = 0; /* stop forcing interrupts */
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@ -10,7 +10,8 @@ TARGETS := blink-red blink-green blink-blue blink-white blink-allio \
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uart1-loopback \
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uart1-loopback \
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tmr tmr-ints \
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tmr tmr-ints \
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sleep \
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sleep \
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printf
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printf \
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asm
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# these targets are built with space reserved for variables needed by ROM services
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# these targets are built with space reserved for variables needed by ROM services
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# this space is initialized with a rom call to rom_data_init
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# this space is initialized with a rom call to rom_data_init
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209
cpu/mc1322x/tests/asm.c
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209
cpu/mc1322x/tests/asm.c
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@ -0,0 +1,209 @@
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/*
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* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
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* to the MC1322x project (http://mc1322x.devl.org)
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of libmc1322x: see http://mc1322x.devl.org
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* for details.
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*
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*
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*/
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#include <mc1322x.h>
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#include <board.h>
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#include <stdio.h>
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#include "tests.h"
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#include "config.h"
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void asm_isr(void) {
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printf("asm isr\n\r");
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ASM->CONTROL0bits.CLEAR_IRQ = 1;
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}
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void main(void) {
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volatile int i;
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/* trim the reference osc. to 24MHz */
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trim_xtal();
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uart_init(INC, MOD, SAMP);
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vreg_init();
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enable_irq(ASM);
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print_welcome("asm");
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printf("ASM Control 0: %08x\n\r", (unsigned int)ASM->CONTROL0);
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printf("ASM Control 1: %08x\n\r", (unsigned int)ASM->CONTROL1);
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printf("ASM Status: %08x\n\r", (unsigned int)ASM->STATUS);
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printf("ASM Test pass: %d\n\r", ASM->STATUSbits.TEST_PASS);
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/* ASM module is disabled until self-test passes */
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printf("\n\r*** ASM self-test ***\n\r");
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ASM->CONTROL1bits.ON = 1;
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ASM->CONTROL1bits.SELF_TEST = 1;
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ASM->CONTROL0bits.START = 1;
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/* Self test takes 3330 periph. clocks (default 24Mhz) */
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/* to complete. This doesn't wait 3330 exactly, but should be long enough */
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for(i = 0; i < 3330; i++) { continue; }
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printf("ASM Test pass: %d\n\r", ASM->STATUSbits.TEST_PASS);
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/* must clear the self test bit when done */
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ASM->CONTROL1bits.SELF_TEST = 0;
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/* ASM starts in "BOOT" mode which uses an internal secret key
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* to load encrypted data from an external source */
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/* must set to NORMAL mode */
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ASM->CONTROL1bits.NORMAL_MODE = 1;
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/* setting the bypass bit will disable the encryption */
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/* bypass defaults to off */
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ASM->CONTROL1bits.BYPASS = 0;
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printf("\n\r*** set ASM key ***\n\r");
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ASM->KEY0 = 0xccddeeff;
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ASM->KEY1 = 0x8899aabb;
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ASM->KEY2 = 0x44556677;
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ASM->KEY3 = 0x00112233;
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/* KEY registers appear to be write-only (which is a good thing) */
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/* even though the datasheet says you can read them */
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printf("ASM Key [3,2,1,0] : 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->KEY3,
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(unsigned int) ASM->KEY2,
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(unsigned int) ASM->KEY1,
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(unsigned int) ASM->KEY0);
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printf("\n\r*** CTR test ***\n\r");
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printf("Encrypt\n\r");
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ASM->CONTROL1bits.CTR = 1;
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ASM->DATA0 = 0xdeaddead;
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ASM->DATA1 = 0xbeefbeef;
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ASM->DATA2 = 0xfaceface;
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ASM->DATA3 = 0x01234567;
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printf("ASM Data [3,2,1,0] : 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->DATA3,
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(unsigned int) ASM->DATA2,
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(unsigned int) ASM->DATA1,
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(unsigned int) ASM->DATA0);
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ASM->CTR0 = 0x33333333;
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ASM->CTR1 = 0x22222222;
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ASM->CTR2 = 0x11111111;
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ASM->CTR3 = 0x00000000;
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printf("ASM CTR [3,2,1,0] : 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->CTR3,
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(unsigned int) ASM->CTR2,
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(unsigned int) ASM->CTR1,
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(unsigned int) ASM->CTR0);
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ASM->CONTROL0bits.START = 1;
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while(ASM->STATUSbits.DONE == 0) { continue; }
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printf("ASM CTR RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->CTR3_RESULT,
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(unsigned int) ASM->CTR2_RESULT,
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(unsigned int) ASM->CTR1_RESULT,
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(unsigned int) ASM->CTR0_RESULT);
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printf("Decrypt\n\r");
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ASM->DATA0 = ASM->CTR0_RESULT;
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ASM->DATA1 = ASM->CTR1_RESULT;
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ASM->DATA2 = ASM->CTR2_RESULT;
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ASM->DATA3 = ASM->CTR3_RESULT;
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ASM->CONTROL0bits.START = 1;
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while(ASM->STATUSbits.DONE == 0) { continue; }
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printf("ASM CTR RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->CTR3_RESULT,
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(unsigned int) ASM->CTR2_RESULT,
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(unsigned int) ASM->CTR1_RESULT,
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(unsigned int) ASM->CTR0_RESULT);
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printf("\n\r*** CBC MAC generation ***\n\r");
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ASM->CONTROL1bits.CTR = 0;
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ASM->CONTROL1bits.CBC = 1;
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/* CBC is like a hash */
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/* it doesn't use the CTR data */
|
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/* the accumulated MAC is in the MAC registers */
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/* you must use the CLEAR bit to reset the MAC state */
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ASM->DATA0 = 0xdeaddead;
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ASM->DATA1 = 0xbeefbeef;
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ASM->DATA2 = 0xfaceface;
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ASM->DATA3 = 0x01234567;
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ASM->CONTROL0bits.CLEAR = 1;
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ASM->CONTROL0bits.START = 1;
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while(ASM->STATUSbits.DONE == 0) { continue; }
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printf("ASM CBC RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->CBC3_RESULT,
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(unsigned int) ASM->CBC2_RESULT,
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|
(unsigned int) ASM->CBC1_RESULT,
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(unsigned int) ASM->CBC0_RESULT);
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|
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printf("\n\r*** CCM (CTR+CBC) ***\n\r");
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ASM->CONTROL1bits.CTR = 1;
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ASM->CONTROL1bits.CBC = 1;
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ASM->CONTROL0bits.CLEAR = 1;
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ASM->CONTROL0bits.START = 1;
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while(ASM->STATUSbits.DONE == 0) { continue; }
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|
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printf("ASM CTR RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->CTR3_RESULT,
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|
(unsigned int) ASM->CTR2_RESULT,
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|
(unsigned int) ASM->CTR1_RESULT,
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|
(unsigned int) ASM->CTR0_RESULT);
|
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printf("ASM CBC RESULT [3,2,1,0]: 0x%08x%08x%08x%08x\n",
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(unsigned int) ASM->CBC3_RESULT,
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|
(unsigned int) ASM->CBC2_RESULT,
|
||||||
|
(unsigned int) ASM->CBC1_RESULT,
|
||||||
|
(unsigned int) ASM->CBC0_RESULT);
|
||||||
|
|
||||||
|
while(1) {
|
||||||
|
}
|
||||||
|
}
|
||||||
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