minor refactoring.
This commit is contained in:
nvt-se
parent
b0a8154e96
commit
f9b35795c7
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@ -1,261 +1,265 @@
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#ifndef CC1020_INTERNAL_H
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#define CC1020_INTERNAL_H
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#include <signal.h>
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#define CC1020_MAIN 0x00
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#define CC1020_INTERFACE 0x01
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#define CC1020_RESET 0x02
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#define CC1020_SEQUENCING 0x03
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#define CC1020_FREQ_2A 0x04
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#define CC1020_FREQ_1A 0x05
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#define CC1020_FREQ_0A 0x06
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#define CC1020_CLOCK_A 0x07
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#define CC1020_FREQ_2B 0x08
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#define CC1020_FREQ_1B 0x09
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#define CC1020_FREQ_0B 0x0A
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#define CC1020_CLOCK_B 0x0B
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#define CC1020_VCO 0x0C
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#define CC1020_MODEM 0x0D
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#define CC1020_DEVIATION 0x0E
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#define CC1020_AFC_CONTROL 0x0F
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#define CC1020_FILTER 0x10
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#define CC1020_VGA1 0x11
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#define CC1020_VGA2 0x12
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#define CC1020_VGA3 0x13
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#define CC1020_VGA4 0x14
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#define CC1020_LOCK 0x15
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#define CC1020_FRONTEND 0x16
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#define CC1020_ANALOG 0x17
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#define CC1020_BUFF_SWING 0x18
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#define CC1020_BUFF_CURRENT 0x19
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#define CC1020_PLL_BW 0x1A
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#define CC1020_CALIBRATE 0x1B
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#define CC1020_PA_POWER 0x1C
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#define CC1020_MATCH 0x1D
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#define CC1020_PHASE_COMP 0x1E
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#define CC1020_GAIN_COMP 0x1F
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#define CC1020_POWERDOWN 0x20
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#define CC1020_TEST1 0x21
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#define CC1020_TEST2 0x22
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#define CC1020_TEST3 0x23
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#define CC1020_TEST4 0x24
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#define CC1020_TEST5 0x25
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#define CC1020_TEST6 0x26
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#define CC1020_TEST7 0x27
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#define CC1020_STATUS 0x40
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#define CC1020_RESET_DONE 0x41
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#define CC1020_RSS 0x42
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#define CC1020_AFC 0x43
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#define CC1020_GAUSS_FILTER 0x44
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#define CC1020_STATUS1 0x45
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#define CC1020_STATUS2 0x46
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#define CC1020_STATUS3 0x47
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#define CC1020_STATUS4 0x48
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#define CC1020_STATUS5 0x49
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#define CC1020_STATUS6 0x4A
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#define CC1020_STATUS7 0x4B
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/* Flags for the MAIN register. */
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#define RESET_N 1
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#define BIAS_PD (1<<1)
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#define XOSC_PD (1<<2)
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#define FS_PD (1<<3)
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#define PD_MODE_1 (1<<4)
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#define PD_MODE_2 (1<<5)
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#define F_REG (1<<6)
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#define RXTX (1<<7)
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/* In power up mode, the MAIN register modifies some flags to the following. */
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#define SEQ_PD (1<<1)
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#define SEQ_CAL_1 (1<<2)
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#define SEQ_CAL_2 (1<<3)
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// For CC1020_STATUS
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#define CARRIER_SENSE 0x08
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#define LOCK_CONTINUOUS 0x10
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#define LOCK_INSTANT 0x20
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#define SEQ_ERROR 0x40
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#define CAL_COMPLETE 0x80
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#define PA_POWER 0x0F // initial default for output power
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#define LOCK_NOK 0x00
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#define LOCK_OK 0x01
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#define LOCK_RECAL_OK 0x02
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#define CAL_TIMEOUT 0x7FFE
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#define LOCK_TIMEOUT 0x7FFE
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#define RESET_TIMEOUT 0x7FFE
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#define TX_CURRENT 0x87
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#define RX_CURRENT 0x86
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// CC1020 driver configuration
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#define CC1020_BUFFERSIZE 128
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#define CRC_LEN 2
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// PDI (Data in) is on P21
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#define PDO (P2IN & 0x01)
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// PSEL is on P30 and low active
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#define PSEL_ON do { P3OUT &= ~0x01; } while(0)
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#define PSEL_OFF do { P3OUT |= 0x01; } while(0)
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#define PCLK_HIGH do { P2OUT |= 0x08; } while(0)
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#define PCLK_LOW do { P2OUT &= ~0x08; } while(0)
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// PDO (Data out) is on P22
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#define PDI_HIGH do { P2OUT |= 0x02; } while(0)
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#define PDI_LOW do { P2OUT &= ~0x02; } while(0)
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// Enable power for LNA (P24, low-active)
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#define LNA_POWER_ON() do { P2OUT &= ~0x10; } while(0)
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#define LNA_POWER_OFF() do { P2OUT |= 0x10; } while(0)
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#define CC_LOCK (P2IN & 0x04)
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#define DISABLE_RX_IRQ() \
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do { IE1 &= ~(URXIE0); } while(0)
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#define ENABLE_RX_IRQ() \
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do { IFG1 &= ~URXIFG0; IE1 |= URXIE0; } while(0)
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#define ACK_TIMEOUT_115 4 // In RADIO_STROKE ticks
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#define ACK_TIMEOUT_19 16
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#define MHZ_869525 1
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const uint8_t cc1020_config_19200[41] = {
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0x01, // 0x00, MAIN
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0x0F, // 0x01, INTERFACE
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0xFF, // 0x02, RESET
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0x8F, // 0x03, SEQUENCING
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// 869.525 at 50kHz
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0x3A, // 0x04, FREQ_2A
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0x32, // 0x05, FREQ_1A
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0x97, // 0x06, FREQ_0A // 19200
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0x38, // 0x07, CLOCK_A // 19200
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0x3A, // 0x08, FREQ_2B
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0x37, // 0x09, FREQ_1B
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0xEB, // 0x0A, FREQ_0B // 19200
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0x38, // 0x0B, CLOCK_B // 19200
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0x44, // 0x0C, VCO 44
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0x51, // 0x0D, MODEM Manchester
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0x2B, // 0x0E, DEVIATION // FSK
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0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC
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0x25, // 0x10, FILTER Bandwith 51.2 kHz i.e. channel spacing 100kHz
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0x61, // 0x11, VGA1
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0x55, // 0x12, VGA2
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0x2D, // 0x13, VGA3
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0x37, // 0x14, VGA4 // 0x29, VGA4 ADJUSTED CS to 23!
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0x40, // 0x15, LOCK is Carrier SENSE
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0x76, // 0x16, FRONTEND
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0x87, // 0x17, ANALOG, RX=86/TX=87
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0x10, // 0x18, BUFF_SWING
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0x25, // 0x19, BUFF_CURRENT
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0xAE, // 0x1A, PLL_BW
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0x34, // 0x1B, CALIBRATE
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PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0
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0xF0, // 0x1D, MATCH
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0x00, // 0x1E, PHASE_COMP
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0x00, // 0x1F, GAIN_COMP
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0x00, // 0x20, POWERDOWN
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0x4d, // 0x4d, // 0x21,
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0x10, // 0x10, // 0x22,
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0x06, // 0x06, // 0x23,
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0x00, // 0x00, // 0x24,
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0x40, // 0x40, // 0x25,
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0x00, // 0x00, // 0x26,
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0x00, // 0x00, // 0x27,
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// Not in real config of chipCon from here!!!
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ACK_TIMEOUT_19
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};
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const uint8_t cc1020_config_115200[41] = {
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0x01, // 0x00, MAIN
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0x0F, // 0x01, INTERFACE
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0xFF, // 0x02, RESET
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0x8F, // 0x03, SEQUENCING
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// 869.525 at 200kHz
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0x3A, // 0x04, FREQ_2A
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0x32, // 0x05, FREQ_1A
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0x97, // 0x06, FREQ_0A // 19200
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0x29, // 0x07, CLOCK_A // 19200
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0x3A, // 0x08, FREQ_2B
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0x37, // 0x09, FREQ_1B
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0xEB, // 0x0A, FREQ_0B // 19200
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0x29, // 0x0B, CLOCK_B // 19200
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0x44, // 0x0C, VCO 44
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0x51, // 0x0D, MODEM Manchester
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0x58, // 0x0E, DEVIATION // FSK
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0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC
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0x80, // 0x10, FILTER Bandwith 307.2kHz, i.e. channel spacing 500 kHz
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0x61, // 0x11, VGA1
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0x57, // 0x12, VGA2
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0x30, // 0x13, VGA3
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0x35, // 0x14, VGA4
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0x20, // 0x15, LOCK is Carrier SENSE
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0x76, // 0x16, FRONTEND
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0x87, // 0x17, ANALOG, RX=86/TX=87
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0x10, // 0x18, BUFF_SWING
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0x25, // 0x19, BUFF_CURRENT
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0xAE, // 0x1A, PLL_BW
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0x34, // 0x1B, CALIBRATE
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PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0
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0xF0, // 0x1D, MATCH
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0x00, // 0x1E, PHASE_COMP
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0x00, // 0x1F, GAIN_COMP
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0x00, // 0x20, POWERDOWN
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0x4d, // 0x21,
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0x10, // 0x22,
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0x06, // 0x23,
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0x00, // 0x24,
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0x40, // 0x25,
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0x00, // 0x26,
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0x00, // 0x27,
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// Not in real config of chipCon from here!!!
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ACK_TIMEOUT_115
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};
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/// cc1020 state
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enum cc1020_state {
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CC1020_OFF = 0,
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CC1020_RX = 0x01,
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CC1020_TX = 0x02,
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CC1020_RX_SEARCHING = 0x10, // searching for preamble + sync word
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CC1020_RX_RECEIVING = 0x20, // receiving bytes
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CC1020_RX_PROCESSING = 0x40, // processing data in buffer
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CC1020_OP_STATE = 0x73,
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CC1020_TURN_OFF = 0x80,
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};
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#define CC1020_SET_OPSTATE(opstate) cc1020_state = ((cc1020_state & ~CC1020_OP_STATE) | (opstate))
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/******************************************************************************
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* @name Packet specification
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* @{
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*/
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const uint8_t syncword[2] = {0xD3,0x91};
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// header: number of bytes in packet including header
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struct cc1020_header {
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uint8_t pad;
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uint8_t length;
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} __attribute__((packed));
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#define PREAMBLESIZE 6
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#define PREAMBLE 0xAA
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#define TAILSIZE 2
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#define TAIL 0xFA
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#define SYNCWDSIZE (sizeof (syncword))
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#define HDRSIZE (sizeof (struct cc1020_header))
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///@}
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#endif /* CC1020_INTERNAL_H */
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#ifndef CC1020_INTERNAL_H
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#define CC1020_INTERNAL_H
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#include <signal.h>
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#define CC1020_MAIN 0x00
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#define CC1020_INTERFACE 0x01
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#define CC1020_RESET 0x02
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#define CC1020_SEQUENCING 0x03
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#define CC1020_FREQ_2A 0x04
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#define CC1020_FREQ_1A 0x05
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#define CC1020_FREQ_0A 0x06
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#define CC1020_CLOCK_A 0x07
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#define CC1020_FREQ_2B 0x08
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#define CC1020_FREQ_1B 0x09
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#define CC1020_FREQ_0B 0x0A
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#define CC1020_CLOCK_B 0x0B
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#define CC1020_VCO 0x0C
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#define CC1020_MODEM 0x0D
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#define CC1020_DEVIATION 0x0E
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#define CC1020_AFC_CONTROL 0x0F
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#define CC1020_FILTER 0x10
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#define CC1020_VGA1 0x11
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#define CC1020_VGA2 0x12
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#define CC1020_VGA3 0x13
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#define CC1020_VGA4 0x14
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#define CC1020_LOCK 0x15
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#define CC1020_FRONTEND 0x16
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#define CC1020_ANALOG 0x17
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#define CC1020_BUFF_SWING 0x18
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#define CC1020_BUFF_CURRENT 0x19
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#define CC1020_PLL_BW 0x1A
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#define CC1020_CALIBRATE 0x1B
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#define CC1020_PA_POWER 0x1C
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#define CC1020_MATCH 0x1D
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#define CC1020_PHASE_COMP 0x1E
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#define CC1020_GAIN_COMP 0x1F
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#define CC1020_POWERDOWN 0x20
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#define CC1020_TEST1 0x21
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#define CC1020_TEST2 0x22
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#define CC1020_TEST3 0x23
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#define CC1020_TEST4 0x24
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#define CC1020_TEST5 0x25
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#define CC1020_TEST6 0x26
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#define CC1020_TEST7 0x27
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#define CC1020_STATUS 0x40
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#define CC1020_RESET_DONE 0x41
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#define CC1020_RSS 0x42
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#define CC1020_AFC 0x43
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#define CC1020_GAUSS_FILTER 0x44
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#define CC1020_STATUS1 0x45
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#define CC1020_STATUS2 0x46
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#define CC1020_STATUS3 0x47
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#define CC1020_STATUS4 0x48
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#define CC1020_STATUS5 0x49
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#define CC1020_STATUS6 0x4A
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#define CC1020_STATUS7 0x4B
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/* Flags for the MAIN register. */
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#define RESET_N 1
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#define BIAS_PD (1<<1)
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#define XOSC_PD (1<<2)
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#define FS_PD (1<<3)
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#define PD_MODE_1 (1<<4)
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#define PD_MODE_2 (1<<5)
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#define F_REG (1<<6)
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#define RXTX (1<<7)
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/* In power up mode, the MAIN register modifies some flags to the following. */
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#define SEQ_PD (1<<1)
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#define SEQ_CAL_1 (1<<2)
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#define SEQ_CAL_2 (1<<3)
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// For CC1020_STATUS
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#define CARRIER_SENSE 0x08
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#define LOCK_CONTINUOUS 0x10
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#define LOCK_INSTANT 0x20
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#define SEQ_ERROR 0x40
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#define CAL_COMPLETE 0x80
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#define PA_POWER 0x0F // initial default for output power
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#define LOCK_NOK 0x00
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#define LOCK_OK 0x01
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#define LOCK_RECAL_OK 0x02
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#define CAL_TIMEOUT 0x7FFE
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#define LOCK_TIMEOUT 0x7FFE
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#define RESET_TIMEOUT 0x7FFE
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#define TX_CURRENT 0x87
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#define RX_CURRENT 0x86
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// CC1020 driver configuration
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// PDI (Data in) is on P21
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#define PDO (P2IN & 0x01)
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// PSEL is on P30 and low active
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#define PSEL_ON do { P3OUT &= ~0x01; } while(0)
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#define PSEL_OFF do { P3OUT |= 0x01; } while(0)
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#define PCLK_HIGH do { P2OUT |= 0x08; } while(0)
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#define PCLK_LOW do { P2OUT &= ~0x08; } while(0)
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// PDO (Data out) is on P22
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#define PDI_HIGH do { P2OUT |= 0x02; } while(0)
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#define PDI_LOW do { P2OUT &= ~0x02; } while(0)
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// Enable power for LNA (P24, low-active)
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#define LNA_POWER_ON() do { P2OUT &= ~0x10; } while(0)
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#define LNA_POWER_OFF() do { P2OUT |= 0x10; } while(0)
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#define CC_LOCK (P2IN & 0x04)
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#define DISABLE_RX_IRQ() \
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do { IE1 &= ~(URXIE0); } while(0)
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#define ENABLE_RX_IRQ() \
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do { IFG1 &= ~URXIFG0; IE1 |= URXIE0; } while(0)
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#define ACK_TIMEOUT_115 4 // In RADIO_STROKE ticks
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#define ACK_TIMEOUT_19 16
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#define MHZ_869525 1
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const uint8_t cc1020_config_19200[41] = {
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0x01, // 0x00, MAIN
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0x0F, // 0x01, INTERFACE
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0xFF, // 0x02, RESET
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0x8F, // 0x03, SEQUENCING
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// 869.525 at 50kHz
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0x3A, // 0x04, FREQ_2A
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0x32, // 0x05, FREQ_1A
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0x97, // 0x06, FREQ_0A // 19200
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0x38, // 0x07, CLOCK_A // 19200
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0x3A, // 0x08, FREQ_2B
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0x37, // 0x09, FREQ_1B
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0xEB, // 0x0A, FREQ_0B // 19200
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0x38, // 0x0B, CLOCK_B // 19200
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0x44, // 0x0C, VCO 44
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0x51, // 0x0D, MODEM Manchester
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0x2B, // 0x0E, DEVIATION // FSK
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0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC
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0x25, // 0x10, FILTER Bandwith 51.2 kHz i.e. channel spacing 100kHz
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0x61, // 0x11, VGA1
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0x55, // 0x12, VGA2
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0x2D, // 0x13, VGA3
|
||||
0x37, // 0x14, VGA4 // 0x29, VGA4 ADJUSTED CS to 23!
|
||||
0x40, // 0x15, LOCK is Carrier SENSE
|
||||
0x76, // 0x16, FRONTEND
|
||||
0x87, // 0x17, ANALOG, RX=86/TX=87
|
||||
0x10, // 0x18, BUFF_SWING
|
||||
0x25, // 0x19, BUFF_CURRENT
|
||||
0xAE, // 0x1A, PLL_BW
|
||||
0x34, // 0x1B, CALIBRATE
|
||||
PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0
|
||||
0xF0, // 0x1D, MATCH
|
||||
0x00, // 0x1E, PHASE_COMP
|
||||
0x00, // 0x1F, GAIN_COMP
|
||||
0x00, // 0x20, POWERDOWN
|
||||
0x4d, // 0x4d, // 0x21,
|
||||
0x10, // 0x10, // 0x22,
|
||||
0x06, // 0x06, // 0x23,
|
||||
0x00, // 0x00, // 0x24,
|
||||
0x40, // 0x40, // 0x25,
|
||||
0x00, // 0x00, // 0x26,
|
||||
0x00, // 0x00, // 0x27,
|
||||
// Not in real config of chipCon from here!!!
|
||||
ACK_TIMEOUT_19
|
||||
};
|
||||
|
||||
const uint8_t cc1020_config_115200[41] = {
|
||||
0x01, // 0x00, MAIN
|
||||
0x0F, // 0x01, INTERFACE
|
||||
0xFF, // 0x02, RESET
|
||||
0x8F, // 0x03, SEQUENCING
|
||||
// 869.525 at 200kHz
|
||||
0x3A, // 0x04, FREQ_2A
|
||||
0x32, // 0x05, FREQ_1A
|
||||
0x97, // 0x06, FREQ_0A // 19200
|
||||
0x29, // 0x07, CLOCK_A // 19200
|
||||
0x3A, // 0x08, FREQ_2B
|
||||
0x37, // 0x09, FREQ_1B
|
||||
0xEB, // 0x0A, FREQ_0B // 19200
|
||||
0x29, // 0x0B, CLOCK_B // 19200
|
||||
0x44, // 0x0C, VCO 44
|
||||
0x51, // 0x0D, MODEM Manchester
|
||||
0x58, // 0x0E, DEVIATION // FSK
|
||||
0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC
|
||||
0x80, // 0x10, FILTER Bandwith 307.2kHz, i.e. channel spacing 500 kHz
|
||||
0x61, // 0x11, VGA1
|
||||
0x57, // 0x12, VGA2
|
||||
0x30, // 0x13, VGA3
|
||||
0x35, // 0x14, VGA4
|
||||
0x20, // 0x15, LOCK is Carrier SENSE
|
||||
0x76, // 0x16, FRONTEND
|
||||
0x87, // 0x17, ANALOG, RX=86/TX=87
|
||||
0x10, // 0x18, BUFF_SWING
|
||||
0x25, // 0x19, BUFF_CURRENT
|
||||
0xAE, // 0x1A, PLL_BW
|
||||
0x34, // 0x1B, CALIBRATE
|
||||
PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0
|
||||
0xF0, // 0x1D, MATCH
|
||||
0x00, // 0x1E, PHASE_COMP
|
||||
0x00, // 0x1F, GAIN_COMP
|
||||
0x00, // 0x20, POWERDOWN
|
||||
0x4d, // 0x21,
|
||||
0x10, // 0x22,
|
||||
0x06, // 0x23,
|
||||
0x00, // 0x24,
|
||||
0x40, // 0x25,
|
||||
0x00, // 0x26,
|
||||
0x00, // 0x27,
|
||||
// Not in real config of chipCon from here!!!
|
||||
ACK_TIMEOUT_115
|
||||
};
|
||||
|
||||
/// cc1020 state
|
||||
enum cc1020_state {
|
||||
CC1020_OFF = 0,
|
||||
CC1020_RX = 0x01,
|
||||
CC1020_TX = 0x02,
|
||||
|
||||
CC1020_RX_SEARCHING = 0x10, // searching for preamble + sync word
|
||||
CC1020_RX_RECEIVING = 0x20, // receiving bytes
|
||||
CC1020_RX_PROCESSING = 0x40, // processing data in buffer
|
||||
|
||||
CC1020_OP_STATE = 0x73,
|
||||
|
||||
CC1020_TURN_OFF = 0x80,
|
||||
};
|
||||
|
||||
#define CC1020_SET_OPSTATE(opstate) cc1020_state = ((cc1020_state & ~CC1020_OP_STATE) | (opstate))
|
||||
|
||||
/******************************************************************************
|
||||
* @name Packet specification
|
||||
* @{
|
||||
*/
|
||||
|
||||
const uint8_t syncword[2] = {0xD3,0x91};
|
||||
|
||||
// header: number of bytes in packet including header
|
||||
struct cc1020_header {
|
||||
uint8_t pad;
|
||||
uint8_t length;
|
||||
} __attribute__((packed));
|
||||
|
||||
|
||||
#define CC1020_BUFFERSIZE 128
|
||||
|
||||
|
||||
#define PREAMBLE_SIZE 6
|
||||
#define PREAMBLE 0xAA
|
||||
|
||||
#define SYNCWORD_SIZE (sizeof (syncword))
|
||||
#define HDR_SIZE (sizeof (struct cc1020_header))
|
||||
|
||||
#define CRC_SIZE 2
|
||||
|
||||
#define TAIL_SIZE 2
|
||||
#define TAIL 0xFA
|
||||
|
||||
|
||||
///@}
|
||||
|
||||
#endif /* CC1020_INTERNAL_H */
|
||||
|
|
|
|||
|
|
@ -77,9 +77,9 @@ static void cc1020_reset(void);
|
|||
|
||||
/* current mode of cc1020 chip */
|
||||
static volatile enum cc1020_state cc1020_state = CC1020_OFF;
|
||||
static volatile uint8_t cc1020_rxbuf[HDRSIZE + CC1020_BUFFERSIZE];
|
||||
static uint8_t cc1020_txbuf[PREAMBLESIZE + SYNCWDSIZE + HDRSIZE +
|
||||
CC1020_BUFFERSIZE + TAILSIZE];
|
||||
static volatile uint8_t cc1020_rxbuf[HDR_SIZE + CC1020_BUFFERSIZE];
|
||||
static uint8_t cc1020_txbuf[PREAMBLE_SIZE + SYNCWORD_SIZE + HDR_SIZE +
|
||||
CC1020_BUFFERSIZE + TAIL_SIZE];
|
||||
|
||||
/* number of bytes in receive and transmit buffers respectively. */
|
||||
static uint8_t cc1020_rxlen;
|
||||
|
|
@ -137,8 +137,8 @@ cc1020_init(const uint8_t *config)
|
|||
cc1020_load_config(config);
|
||||
|
||||
/* init tx buffer with preamble + syncword */
|
||||
memset(cc1020_txbuf, PREAMBLE, PREAMBLESIZE);
|
||||
memcpy((char *)cc1020_txbuf + PREAMBLESIZE, &syncword, SYNCWDSIZE);
|
||||
memset(cc1020_txbuf, PREAMBLE, PREAMBLE_SIZE);
|
||||
memcpy((char *)cc1020_txbuf + PREAMBLE_SIZE, &syncword, SYNCWORD_SIZE);
|
||||
|
||||
/* calibrate receiver */
|
||||
cc1020_wakeupRX(RX_CURRENT);
|
||||
|
|
@ -233,9 +233,8 @@ int
|
|||
cc1020_send(const void *buf, unsigned short len)
|
||||
{
|
||||
int try;
|
||||
int normal_header = HDRSIZE + len;
|
||||
int i;
|
||||
uint16_t rxcrc = 0xFFFF; /* For checksum purposes */
|
||||
int normal_header = HDR_SIZE + len;
|
||||
uint16_t rxcrc = 0xffff; /* For checksum purposes */
|
||||
rtimer_clock_t timeout_time;
|
||||
|
||||
timeout_time = RTIMER_NOW() + RTIMER_SECOND / 1000 * SEND_TIMEOUT;
|
||||
|
|
@ -255,27 +254,25 @@ cc1020_send(const void *buf, unsigned short len)
|
|||
}
|
||||
|
||||
/* The preamble and the sync word are already in buffer. */
|
||||
cc1020_txlen = PREAMBLESIZE + SYNCWDSIZE;
|
||||
cc1020_txlen = PREAMBLE_SIZE + SYNCWORD_SIZE;
|
||||
|
||||
/* header */
|
||||
cc1020_txbuf[cc1020_txlen++] = 0x00;
|
||||
cc1020_txbuf[cc1020_txlen++] = normal_header + CRC_LEN;
|
||||
cc1020_txbuf[cc1020_txlen++] = normal_header + CRC_SIZE;
|
||||
|
||||
/* Adding the checksum on header and data */
|
||||
rxcrc = crc16_add((uint8_t) (normal_header & 0xff), rxcrc);
|
||||
rxcrc = crc16_add((uint8_t) ((normal_header >> 8)& 0xff), rxcrc);
|
||||
|
||||
for(i = 0; i < len; i++) {
|
||||
rxcrc = crc16_add((uint8_t) ((char*)buf)[i], rxcrc);
|
||||
}
|
||||
rxcrc = crc16_add(normal_header & 0xff, rxcrc);
|
||||
rxcrc = crc16_add((normal_header >> 8) & 0xff, rxcrc);
|
||||
|
||||
rxcrc = crc16_data(buf, len, rxcrc);
|
||||
|
||||
/* data to send */
|
||||
memcpy((char *)cc1020_txbuf + cc1020_txlen, buf, len);
|
||||
cc1020_txlen += len;
|
||||
|
||||
/* Send checksum */
|
||||
cc1020_txbuf[cc1020_txlen++] = (uint8_t)(rxcrc >> 8);
|
||||
cc1020_txbuf[cc1020_txlen++] = (uint8_t)(rxcrc & 0xFF);
|
||||
cc1020_txbuf[cc1020_txlen++] = rxcrc >> 8;
|
||||
cc1020_txbuf[cc1020_txlen++] = rxcrc & 0xff;
|
||||
|
||||
/* suffix */
|
||||
cc1020_txbuf[cc1020_txlen++] = TAIL;
|
||||
|
|
@ -325,17 +322,17 @@ cc1020_read(void *buf, unsigned short size)
|
|||
{
|
||||
unsigned len;
|
||||
|
||||
if(cc1020_rxlen <= HDRSIZE) {
|
||||
if(cc1020_rxlen <= HDR_SIZE) {
|
||||
return 0;
|
||||
}
|
||||
|
||||
len = cc1020_rxlen - HDRSIZE;
|
||||
len = cc1020_rxlen - HDR_SIZE;
|
||||
if(len > size) {
|
||||
RIMESTATS_ADD(toolong);
|
||||
return -1;
|
||||
}
|
||||
|
||||
memcpy(buf, (char *)cc1020_rxbuf + HDRSIZE, len);
|
||||
memcpy(buf, (char *)cc1020_rxbuf + HDR_SIZE, len);
|
||||
RIMESTATS_ADD(llrx);
|
||||
|
||||
reset_receiver();
|
||||
|
|
@ -414,17 +411,16 @@ PROCESS_THREAD(cc1020_receiver_process, ev, data)
|
|||
if(receiver_callback != NULL) {
|
||||
/* Verify the checksum. */
|
||||
uint16_t expected_crc = 0xffff;
|
||||
uint16_t actual_crc = -1;
|
||||
actual_crc = (cc1020_rxbuf[cc1020_rxlen - CRC_LEN] << 8) | cc1020_rxbuf[cc1020_rxlen - CRC_LEN + 1];
|
||||
cc1020_rxlen -= CRC_LEN;
|
||||
uint16_t actual_crc;
|
||||
|
||||
actual_crc = (cc1020_rxbuf[cc1020_rxlen - CRC_SIZE] << 8) |
|
||||
cc1020_rxbuf[cc1020_rxlen - CRC_SIZE + 1];
|
||||
cc1020_rxlen -= CRC_SIZE;
|
||||
|
||||
expected_crc = crc16_add((uint8_t) (cc1020_rxlen & 0xff), expected_crc);
|
||||
expected_crc = crc16_add((uint8_t) ((cc1020_rxlen >> 8) & 0xff),
|
||||
expected_crc);
|
||||
int i;
|
||||
for(i = HDRSIZE; i < cc1020_rxlen; i++){
|
||||
expected_crc = crc16_add(cc1020_rxbuf[i], expected_crc);
|
||||
}
|
||||
expected_crc = crc16_add(cc1020_rxlen & 0xff, expected_crc);
|
||||
expected_crc = crc16_add((cc1020_rxlen >> 8) & 0xff, expected_crc);
|
||||
expected_crc = crc16_data((char *)&cc1020_rxbuf[HDR_SIZE],
|
||||
cc1020_rxlen - HDR_SIZE, expected_crc);
|
||||
|
||||
if(expected_crc == actual_crc) {
|
||||
receiver_callback(&cc1020_driver);
|
||||
|
|
@ -507,13 +503,13 @@ interrupt(UART0RX_VECTOR) cc1020_rxhandler(void)
|
|||
|
||||
cc1020_rxlen++;
|
||||
|
||||
if(cc1020_rxlen == HDRSIZE) {
|
||||
if(cc1020_rxlen == HDR_SIZE) {
|
||||
pktlen = ((struct cc1020_header *)cc1020_rxbuf)->length;
|
||||
if(pktlen == 0 || pktlen > sizeof (cc1020_rxbuf)) {
|
||||
cc1020_rxlen = 0;
|
||||
CC1020_SET_OPSTATE(CC1020_RX | CC1020_RX_SEARCHING);
|
||||
}
|
||||
} else if(cc1020_rxlen > HDRSIZE) {
|
||||
} else if(cc1020_rxlen > HDR_SIZE) {
|
||||
if(cc1020_rxlen == pktlen) {
|
||||
/* Disable interrupts while processing the packet. */
|
||||
DISABLE_RX_IRQ();
|
||||
|
|
|
|||
|
|
@ -1,75 +1,75 @@
|
|||
/*
|
||||
Copyright 2006, Freie Universitaet Berlin. All rights reserved.
|
||||
|
||||
These sources were developed at the Freie Universitaet Berlin, Computer
|
||||
Systems and Telematics group.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
- Neither the name of Freie Universitaet Berlin (FUB) nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
This software is provided by FUB and the contributors on an "as is"
|
||||
basis, without any representations or warranties of any kind, express
|
||||
or implied including, but not limited to, representations or
|
||||
warranties of non-infringement, merchantability or fitness for a
|
||||
particular purpose. In no event shall FUB or contributors be liable
|
||||
for any direct, indirect, incidental, special, exemplary, or
|
||||
consequential damages (including, but not limited to, procurement of
|
||||
substitute goods or services; loss of use, data, or profits; or
|
||||
business interruption) however caused and on any theory of liability,
|
||||
whether in contract, strict liability, or tort (including negligence
|
||||
or otherwise) arising in any way out of the use of this software, even
|
||||
if advised of the possibility of such damage.
|
||||
|
||||
This implementation was developed by the CST group at the FUB.
|
||||
|
||||
For documentation and questions please use the web site
|
||||
http://scatterweb.mi.fu-berlin.de and the mailinglist
|
||||
scatterweb@lists.spline.inf.fu-berlin.de (subscription via the Website).
|
||||
Berlin, 2006
|
||||
*/
|
||||
|
||||
/**
|
||||
* \file cc1020.h
|
||||
* \author FUB ScatterWeb Developers, Michael Baar, Nicolas Tsiftes
|
||||
**/
|
||||
|
||||
#ifndef CC1020_H
|
||||
#define CC1020_H
|
||||
|
||||
#include "dev/radio.h"
|
||||
|
||||
extern const uint8_t cc1020_config_19200[];
|
||||
extern const uint8_t cc1020_config_115200[];
|
||||
|
||||
void cc1020_init(const uint8_t* config);
|
||||
void cc1020_set_rx(void);
|
||||
void cc1020_set_tx(void);
|
||||
void cc1020_set_power(uint8_t pa_power);
|
||||
int cc1020_carrier_sense(void);
|
||||
uint8_t cc1020_get_rssi(void);
|
||||
uint8_t cc1020_get_packet_rssi(void);
|
||||
int cc1020_sending(void);
|
||||
|
||||
int cc1020_send(const void *buf, unsigned short size);
|
||||
int cc1020_read(void *buf, unsigned short size);
|
||||
void cc1020_set_receiver(void (*recv)(const struct radio_driver *));
|
||||
int cc1020_on(void);
|
||||
int cc1020_off(void);
|
||||
|
||||
extern const struct radio_driver cc1020_driver;
|
||||
|
||||
PROCESS_NAME(cc1020_sender_process);
|
||||
|
||||
#endif
|
||||
/*
|
||||
Copyright 2006, Freie Universitaet Berlin. All rights reserved.
|
||||
|
||||
These sources were developed at the Freie Universitaet Berlin, Computer
|
||||
Systems and Telematics group.
|
||||
|
||||
Redistribution and use in source and binary forms, with or without
|
||||
modification, are permitted provided that the following conditions are
|
||||
met:
|
||||
|
||||
- Redistributions of source code must retain the above copyright
|
||||
notice, this list of conditions and the following disclaimer.
|
||||
|
||||
- Redistributions in binary form must reproduce the above copyright
|
||||
notice, this list of conditions and the following disclaimer in the
|
||||
documentation and/or other materials provided with the distribution.
|
||||
|
||||
- Neither the name of Freie Universitaet Berlin (FUB) nor the names of its
|
||||
contributors may be used to endorse or promote products derived from
|
||||
this software without specific prior written permission.
|
||||
|
||||
This software is provided by FUB and the contributors on an "as is"
|
||||
basis, without any representations or warranties of any kind, express
|
||||
or implied including, but not limited to, representations or
|
||||
warranties of non-infringement, merchantability or fitness for a
|
||||
particular purpose. In no event shall FUB or contributors be liable
|
||||
for any direct, indirect, incidental, special, exemplary, or
|
||||
consequential damages (including, but not limited to, procurement of
|
||||
substitute goods or services; loss of use, data, or profits; or
|
||||
business interruption) however caused and on any theory of liability,
|
||||
whether in contract, strict liability, or tort (including negligence
|
||||
or otherwise) arising in any way out of the use of this software, even
|
||||
if advised of the possibility of such damage.
|
||||
|
||||
This implementation was developed by the CST group at the FUB.
|
||||
|
||||
For documentation and questions please use the web site
|
||||
http://scatterweb.mi.fu-berlin.de and the mailinglist
|
||||
scatterweb@lists.spline.inf.fu-berlin.de (subscription via the Website).
|
||||
Berlin, 2006
|
||||
*/
|
||||
|
||||
/**
|
||||
* \file cc1020.h
|
||||
* \author FUB ScatterWeb Developers, Michael Baar, Nicolas Tsiftes
|
||||
**/
|
||||
|
||||
#ifndef CC1020_H
|
||||
#define CC1020_H
|
||||
|
||||
#include "dev/radio.h"
|
||||
|
||||
extern const uint8_t cc1020_config_19200[];
|
||||
extern const uint8_t cc1020_config_115200[];
|
||||
|
||||
void cc1020_init(const uint8_t* config);
|
||||
void cc1020_set_rx(void);
|
||||
void cc1020_set_tx(void);
|
||||
void cc1020_set_power(uint8_t pa_power);
|
||||
int cc1020_carrier_sense(void);
|
||||
uint8_t cc1020_get_rssi(void);
|
||||
uint8_t cc1020_get_packet_rssi(void);
|
||||
int cc1020_sending(void);
|
||||
|
||||
int cc1020_send(const void *buf, unsigned short size);
|
||||
int cc1020_read(void *buf, unsigned short size);
|
||||
void cc1020_set_receiver(void (*recv)(const struct radio_driver *));
|
||||
int cc1020_on(void);
|
||||
int cc1020_off(void);
|
||||
|
||||
extern const struct radio_driver cc1020_driver;
|
||||
|
||||
PROCESS_NAME(cc1020_sender_process);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in a new issue