minor refactoring.

This commit is contained in:
nvt-se 2009-05-14 12:18:49 +00:00
parent b0a8154e96
commit f9b35795c7
3 changed files with 369 additions and 369 deletions

View file

@ -1,261 +1,265 @@
#ifndef CC1020_INTERNAL_H #ifndef CC1020_INTERNAL_H
#define CC1020_INTERNAL_H #define CC1020_INTERNAL_H
#include <signal.h> #include <signal.h>
#define CC1020_MAIN 0x00 #define CC1020_MAIN 0x00
#define CC1020_INTERFACE 0x01 #define CC1020_INTERFACE 0x01
#define CC1020_RESET 0x02 #define CC1020_RESET 0x02
#define CC1020_SEQUENCING 0x03 #define CC1020_SEQUENCING 0x03
#define CC1020_FREQ_2A 0x04 #define CC1020_FREQ_2A 0x04
#define CC1020_FREQ_1A 0x05 #define CC1020_FREQ_1A 0x05
#define CC1020_FREQ_0A 0x06 #define CC1020_FREQ_0A 0x06
#define CC1020_CLOCK_A 0x07 #define CC1020_CLOCK_A 0x07
#define CC1020_FREQ_2B 0x08 #define CC1020_FREQ_2B 0x08
#define CC1020_FREQ_1B 0x09 #define CC1020_FREQ_1B 0x09
#define CC1020_FREQ_0B 0x0A #define CC1020_FREQ_0B 0x0A
#define CC1020_CLOCK_B 0x0B #define CC1020_CLOCK_B 0x0B
#define CC1020_VCO 0x0C #define CC1020_VCO 0x0C
#define CC1020_MODEM 0x0D #define CC1020_MODEM 0x0D
#define CC1020_DEVIATION 0x0E #define CC1020_DEVIATION 0x0E
#define CC1020_AFC_CONTROL 0x0F #define CC1020_AFC_CONTROL 0x0F
#define CC1020_FILTER 0x10 #define CC1020_FILTER 0x10
#define CC1020_VGA1 0x11 #define CC1020_VGA1 0x11
#define CC1020_VGA2 0x12 #define CC1020_VGA2 0x12
#define CC1020_VGA3 0x13 #define CC1020_VGA3 0x13
#define CC1020_VGA4 0x14 #define CC1020_VGA4 0x14
#define CC1020_LOCK 0x15 #define CC1020_LOCK 0x15
#define CC1020_FRONTEND 0x16 #define CC1020_FRONTEND 0x16
#define CC1020_ANALOG 0x17 #define CC1020_ANALOG 0x17
#define CC1020_BUFF_SWING 0x18 #define CC1020_BUFF_SWING 0x18
#define CC1020_BUFF_CURRENT 0x19 #define CC1020_BUFF_CURRENT 0x19
#define CC1020_PLL_BW 0x1A #define CC1020_PLL_BW 0x1A
#define CC1020_CALIBRATE 0x1B #define CC1020_CALIBRATE 0x1B
#define CC1020_PA_POWER 0x1C #define CC1020_PA_POWER 0x1C
#define CC1020_MATCH 0x1D #define CC1020_MATCH 0x1D
#define CC1020_PHASE_COMP 0x1E #define CC1020_PHASE_COMP 0x1E
#define CC1020_GAIN_COMP 0x1F #define CC1020_GAIN_COMP 0x1F
#define CC1020_POWERDOWN 0x20 #define CC1020_POWERDOWN 0x20
#define CC1020_TEST1 0x21 #define CC1020_TEST1 0x21
#define CC1020_TEST2 0x22 #define CC1020_TEST2 0x22
#define CC1020_TEST3 0x23 #define CC1020_TEST3 0x23
#define CC1020_TEST4 0x24 #define CC1020_TEST4 0x24
#define CC1020_TEST5 0x25 #define CC1020_TEST5 0x25
#define CC1020_TEST6 0x26 #define CC1020_TEST6 0x26
#define CC1020_TEST7 0x27 #define CC1020_TEST7 0x27
#define CC1020_STATUS 0x40 #define CC1020_STATUS 0x40
#define CC1020_RESET_DONE 0x41 #define CC1020_RESET_DONE 0x41
#define CC1020_RSS 0x42 #define CC1020_RSS 0x42
#define CC1020_AFC 0x43 #define CC1020_AFC 0x43
#define CC1020_GAUSS_FILTER 0x44 #define CC1020_GAUSS_FILTER 0x44
#define CC1020_STATUS1 0x45 #define CC1020_STATUS1 0x45
#define CC1020_STATUS2 0x46 #define CC1020_STATUS2 0x46
#define CC1020_STATUS3 0x47 #define CC1020_STATUS3 0x47
#define CC1020_STATUS4 0x48 #define CC1020_STATUS4 0x48
#define CC1020_STATUS5 0x49 #define CC1020_STATUS5 0x49
#define CC1020_STATUS6 0x4A #define CC1020_STATUS6 0x4A
#define CC1020_STATUS7 0x4B #define CC1020_STATUS7 0x4B
/* Flags for the MAIN register. */ /* Flags for the MAIN register. */
#define RESET_N 1 #define RESET_N 1
#define BIAS_PD (1<<1) #define BIAS_PD (1<<1)
#define XOSC_PD (1<<2) #define XOSC_PD (1<<2)
#define FS_PD (1<<3) #define FS_PD (1<<3)
#define PD_MODE_1 (1<<4) #define PD_MODE_1 (1<<4)
#define PD_MODE_2 (1<<5) #define PD_MODE_2 (1<<5)
#define F_REG (1<<6) #define F_REG (1<<6)
#define RXTX (1<<7) #define RXTX (1<<7)
/* In power up mode, the MAIN register modifies some flags to the following. */ /* In power up mode, the MAIN register modifies some flags to the following. */
#define SEQ_PD (1<<1) #define SEQ_PD (1<<1)
#define SEQ_CAL_1 (1<<2) #define SEQ_CAL_1 (1<<2)
#define SEQ_CAL_2 (1<<3) #define SEQ_CAL_2 (1<<3)
// For CC1020_STATUS // For CC1020_STATUS
#define CARRIER_SENSE 0x08 #define CARRIER_SENSE 0x08
#define LOCK_CONTINUOUS 0x10 #define LOCK_CONTINUOUS 0x10
#define LOCK_INSTANT 0x20 #define LOCK_INSTANT 0x20
#define SEQ_ERROR 0x40 #define SEQ_ERROR 0x40
#define CAL_COMPLETE 0x80 #define CAL_COMPLETE 0x80
#define PA_POWER 0x0F // initial default for output power #define PA_POWER 0x0F // initial default for output power
#define LOCK_NOK 0x00 #define LOCK_NOK 0x00
#define LOCK_OK 0x01 #define LOCK_OK 0x01
#define LOCK_RECAL_OK 0x02 #define LOCK_RECAL_OK 0x02
#define CAL_TIMEOUT 0x7FFE #define CAL_TIMEOUT 0x7FFE
#define LOCK_TIMEOUT 0x7FFE #define LOCK_TIMEOUT 0x7FFE
#define RESET_TIMEOUT 0x7FFE #define RESET_TIMEOUT 0x7FFE
#define TX_CURRENT 0x87 #define TX_CURRENT 0x87
#define RX_CURRENT 0x86 #define RX_CURRENT 0x86
// CC1020 driver configuration // CC1020 driver configuration
#define CC1020_BUFFERSIZE 128
// PDI (Data in) is on P21
#define CRC_LEN 2 #define PDO (P2IN & 0x01)
// PDI (Data in) is on P21 // PSEL is on P30 and low active
#define PDO (P2IN & 0x01) #define PSEL_ON do { P3OUT &= ~0x01; } while(0)
#define PSEL_OFF do { P3OUT |= 0x01; } while(0)
// PSEL is on P30 and low active #define PCLK_HIGH do { P2OUT |= 0x08; } while(0)
#define PSEL_ON do { P3OUT &= ~0x01; } while(0) #define PCLK_LOW do { P2OUT &= ~0x08; } while(0)
#define PSEL_OFF do { P3OUT |= 0x01; } while(0)
#define PCLK_HIGH do { P2OUT |= 0x08; } while(0) // PDO (Data out) is on P22
#define PCLK_LOW do { P2OUT &= ~0x08; } while(0) #define PDI_HIGH do { P2OUT |= 0x02; } while(0)
// PDO (Data out) is on P22 #define PDI_LOW do { P2OUT &= ~0x02; } while(0)
#define PDI_HIGH do { P2OUT |= 0x02; } while(0)
// Enable power for LNA (P24, low-active)
#define PDI_LOW do { P2OUT &= ~0x02; } while(0) #define LNA_POWER_ON() do { P2OUT &= ~0x10; } while(0)
// Enable power for LNA (P24, low-active) #define LNA_POWER_OFF() do { P2OUT |= 0x10; } while(0)
#define LNA_POWER_ON() do { P2OUT &= ~0x10; } while(0)
#define CC_LOCK (P2IN & 0x04)
#define LNA_POWER_OFF() do { P2OUT |= 0x10; } while(0)
#define DISABLE_RX_IRQ() \
#define CC_LOCK (P2IN & 0x04) do { IE1 &= ~(URXIE0); } while(0)
#define DISABLE_RX_IRQ() \ #define ENABLE_RX_IRQ() \
do { IE1 &= ~(URXIE0); } while(0) do { IFG1 &= ~URXIFG0; IE1 |= URXIE0; } while(0)
#define ENABLE_RX_IRQ() \ #define ACK_TIMEOUT_115 4 // In RADIO_STROKE ticks
do { IFG1 &= ~URXIFG0; IE1 |= URXIE0; } while(0) #define ACK_TIMEOUT_19 16
#define ACK_TIMEOUT_115 4 // In RADIO_STROKE ticks #define MHZ_869525 1
#define ACK_TIMEOUT_19 16
const uint8_t cc1020_config_19200[41] = {
#define MHZ_869525 1 0x01, // 0x00, MAIN
0x0F, // 0x01, INTERFACE
const uint8_t cc1020_config_19200[41] = { 0xFF, // 0x02, RESET
0x01, // 0x00, MAIN 0x8F, // 0x03, SEQUENCING
0x0F, // 0x01, INTERFACE // 869.525 at 50kHz
0xFF, // 0x02, RESET 0x3A, // 0x04, FREQ_2A
0x8F, // 0x03, SEQUENCING 0x32, // 0x05, FREQ_1A
// 869.525 at 50kHz 0x97, // 0x06, FREQ_0A // 19200
0x3A, // 0x04, FREQ_2A 0x38, // 0x07, CLOCK_A // 19200
0x32, // 0x05, FREQ_1A 0x3A, // 0x08, FREQ_2B
0x97, // 0x06, FREQ_0A // 19200 0x37, // 0x09, FREQ_1B
0x38, // 0x07, CLOCK_A // 19200 0xEB, // 0x0A, FREQ_0B // 19200
0x3A, // 0x08, FREQ_2B 0x38, // 0x0B, CLOCK_B // 19200
0x37, // 0x09, FREQ_1B 0x44, // 0x0C, VCO 44
0xEB, // 0x0A, FREQ_0B // 19200 0x51, // 0x0D, MODEM Manchester
0x38, // 0x0B, CLOCK_B // 19200 0x2B, // 0x0E, DEVIATION // FSK
0x44, // 0x0C, VCO 44 0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC
0x51, // 0x0D, MODEM Manchester 0x25, // 0x10, FILTER Bandwith 51.2 kHz i.e. channel spacing 100kHz
0x2B, // 0x0E, DEVIATION // FSK 0x61, // 0x11, VGA1
0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC 0x55, // 0x12, VGA2
0x25, // 0x10, FILTER Bandwith 51.2 kHz i.e. channel spacing 100kHz 0x2D, // 0x13, VGA3
0x61, // 0x11, VGA1 0x37, // 0x14, VGA4 // 0x29, VGA4 ADJUSTED CS to 23!
0x55, // 0x12, VGA2 0x40, // 0x15, LOCK is Carrier SENSE
0x2D, // 0x13, VGA3 0x76, // 0x16, FRONTEND
0x37, // 0x14, VGA4 // 0x29, VGA4 ADJUSTED CS to 23! 0x87, // 0x17, ANALOG, RX=86/TX=87
0x40, // 0x15, LOCK is Carrier SENSE 0x10, // 0x18, BUFF_SWING
0x76, // 0x16, FRONTEND 0x25, // 0x19, BUFF_CURRENT
0x87, // 0x17, ANALOG, RX=86/TX=87 0xAE, // 0x1A, PLL_BW
0x10, // 0x18, BUFF_SWING 0x34, // 0x1B, CALIBRATE
0x25, // 0x19, BUFF_CURRENT PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0
0xAE, // 0x1A, PLL_BW 0xF0, // 0x1D, MATCH
0x34, // 0x1B, CALIBRATE 0x00, // 0x1E, PHASE_COMP
PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0 0x00, // 0x1F, GAIN_COMP
0xF0, // 0x1D, MATCH 0x00, // 0x20, POWERDOWN
0x00, // 0x1E, PHASE_COMP 0x4d, // 0x4d, // 0x21,
0x00, // 0x1F, GAIN_COMP 0x10, // 0x10, // 0x22,
0x00, // 0x20, POWERDOWN 0x06, // 0x06, // 0x23,
0x4d, // 0x4d, // 0x21, 0x00, // 0x00, // 0x24,
0x10, // 0x10, // 0x22, 0x40, // 0x40, // 0x25,
0x06, // 0x06, // 0x23, 0x00, // 0x00, // 0x26,
0x00, // 0x00, // 0x24, 0x00, // 0x00, // 0x27,
0x40, // 0x40, // 0x25, // Not in real config of chipCon from here!!!
0x00, // 0x00, // 0x26, ACK_TIMEOUT_19
0x00, // 0x00, // 0x27, };
// Not in real config of chipCon from here!!!
ACK_TIMEOUT_19 const uint8_t cc1020_config_115200[41] = {
}; 0x01, // 0x00, MAIN
0x0F, // 0x01, INTERFACE
const uint8_t cc1020_config_115200[41] = { 0xFF, // 0x02, RESET
0x01, // 0x00, MAIN 0x8F, // 0x03, SEQUENCING
0x0F, // 0x01, INTERFACE // 869.525 at 200kHz
0xFF, // 0x02, RESET 0x3A, // 0x04, FREQ_2A
0x8F, // 0x03, SEQUENCING 0x32, // 0x05, FREQ_1A
// 869.525 at 200kHz 0x97, // 0x06, FREQ_0A // 19200
0x3A, // 0x04, FREQ_2A 0x29, // 0x07, CLOCK_A // 19200
0x32, // 0x05, FREQ_1A 0x3A, // 0x08, FREQ_2B
0x97, // 0x06, FREQ_0A // 19200 0x37, // 0x09, FREQ_1B
0x29, // 0x07, CLOCK_A // 19200 0xEB, // 0x0A, FREQ_0B // 19200
0x3A, // 0x08, FREQ_2B 0x29, // 0x0B, CLOCK_B // 19200
0x37, // 0x09, FREQ_1B 0x44, // 0x0C, VCO 44
0xEB, // 0x0A, FREQ_0B // 19200 0x51, // 0x0D, MODEM Manchester
0x29, // 0x0B, CLOCK_B // 19200 0x58, // 0x0E, DEVIATION // FSK
0x44, // 0x0C, VCO 44 0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC
0x51, // 0x0D, MODEM Manchester 0x80, // 0x10, FILTER Bandwith 307.2kHz, i.e. channel spacing 500 kHz
0x58, // 0x0E, DEVIATION // FSK 0x61, // 0x11, VGA1
0x4C, // 0x0F, AFC_CONTROL Ruetten 0xCC 0x57, // 0x12, VGA2
0x80, // 0x10, FILTER Bandwith 307.2kHz, i.e. channel spacing 500 kHz 0x30, // 0x13, VGA3
0x61, // 0x11, VGA1 0x35, // 0x14, VGA4
0x57, // 0x12, VGA2 0x20, // 0x15, LOCK is Carrier SENSE
0x30, // 0x13, VGA3 0x76, // 0x16, FRONTEND
0x35, // 0x14, VGA4 0x87, // 0x17, ANALOG, RX=86/TX=87
0x20, // 0x15, LOCK is Carrier SENSE 0x10, // 0x18, BUFF_SWING
0x76, // 0x16, FRONTEND 0x25, // 0x19, BUFF_CURRENT
0x87, // 0x17, ANALOG, RX=86/TX=87 0xAE, // 0x1A, PLL_BW
0x10, // 0x18, BUFF_SWING 0x34, // 0x1B, CALIBRATE
0x25, // 0x19, BUFF_CURRENT PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0
0xAE, // 0x1A, PLL_BW 0xF0, // 0x1D, MATCH
0x34, // 0x1B, CALIBRATE 0x00, // 0x1E, PHASE_COMP
PA_POWER, // 0x1C, PA_POWER AN025 = 0xA0 0x00, // 0x1F, GAIN_COMP
0xF0, // 0x1D, MATCH 0x00, // 0x20, POWERDOWN
0x00, // 0x1E, PHASE_COMP 0x4d, // 0x21,
0x00, // 0x1F, GAIN_COMP 0x10, // 0x22,
0x00, // 0x20, POWERDOWN 0x06, // 0x23,
0x4d, // 0x21, 0x00, // 0x24,
0x10, // 0x22, 0x40, // 0x25,
0x06, // 0x23, 0x00, // 0x26,
0x00, // 0x24, 0x00, // 0x27,
0x40, // 0x25, // Not in real config of chipCon from here!!!
0x00, // 0x26, ACK_TIMEOUT_115
0x00, // 0x27, };
// Not in real config of chipCon from here!!!
ACK_TIMEOUT_115 /// cc1020 state
}; enum cc1020_state {
CC1020_OFF = 0,
/// cc1020 state CC1020_RX = 0x01,
enum cc1020_state { CC1020_TX = 0x02,
CC1020_OFF = 0,
CC1020_RX = 0x01, CC1020_RX_SEARCHING = 0x10, // searching for preamble + sync word
CC1020_TX = 0x02, CC1020_RX_RECEIVING = 0x20, // receiving bytes
CC1020_RX_PROCESSING = 0x40, // processing data in buffer
CC1020_RX_SEARCHING = 0x10, // searching for preamble + sync word
CC1020_RX_RECEIVING = 0x20, // receiving bytes CC1020_OP_STATE = 0x73,
CC1020_RX_PROCESSING = 0x40, // processing data in buffer
CC1020_TURN_OFF = 0x80,
CC1020_OP_STATE = 0x73, };
CC1020_TURN_OFF = 0x80, #define CC1020_SET_OPSTATE(opstate) cc1020_state = ((cc1020_state & ~CC1020_OP_STATE) | (opstate))
};
/******************************************************************************
#define CC1020_SET_OPSTATE(opstate) cc1020_state = ((cc1020_state & ~CC1020_OP_STATE) | (opstate)) * @name Packet specification
* @{
/****************************************************************************** */
* @name Packet specification
* @{ const uint8_t syncword[2] = {0xD3,0x91};
*/
// header: number of bytes in packet including header
const uint8_t syncword[2] = {0xD3,0x91}; struct cc1020_header {
uint8_t pad;
// header: number of bytes in packet including header uint8_t length;
struct cc1020_header { } __attribute__((packed));
uint8_t pad;
uint8_t length;
} __attribute__((packed)); #define CC1020_BUFFERSIZE 128
#define PREAMBLESIZE 6 #define PREAMBLE_SIZE 6
#define PREAMBLE 0xAA #define PREAMBLE 0xAA
#define TAILSIZE 2
#define TAIL 0xFA #define SYNCWORD_SIZE (sizeof (syncword))
#define HDR_SIZE (sizeof (struct cc1020_header))
#define SYNCWDSIZE (sizeof (syncword))
#define HDRSIZE (sizeof (struct cc1020_header)) #define CRC_SIZE 2
///@} #define TAIL_SIZE 2
#define TAIL 0xFA
#endif /* CC1020_INTERNAL_H */
///@}
#endif /* CC1020_INTERNAL_H */

View file

@ -77,9 +77,9 @@ static void cc1020_reset(void);
/* current mode of cc1020 chip */ /* current mode of cc1020 chip */
static volatile enum cc1020_state cc1020_state = CC1020_OFF; static volatile enum cc1020_state cc1020_state = CC1020_OFF;
static volatile uint8_t cc1020_rxbuf[HDRSIZE + CC1020_BUFFERSIZE]; static volatile uint8_t cc1020_rxbuf[HDR_SIZE + CC1020_BUFFERSIZE];
static uint8_t cc1020_txbuf[PREAMBLESIZE + SYNCWDSIZE + HDRSIZE + static uint8_t cc1020_txbuf[PREAMBLE_SIZE + SYNCWORD_SIZE + HDR_SIZE +
CC1020_BUFFERSIZE + TAILSIZE]; CC1020_BUFFERSIZE + TAIL_SIZE];
/* number of bytes in receive and transmit buffers respectively. */ /* number of bytes in receive and transmit buffers respectively. */
static uint8_t cc1020_rxlen; static uint8_t cc1020_rxlen;
@ -137,8 +137,8 @@ cc1020_init(const uint8_t *config)
cc1020_load_config(config); cc1020_load_config(config);
/* init tx buffer with preamble + syncword */ /* init tx buffer with preamble + syncword */
memset(cc1020_txbuf, PREAMBLE, PREAMBLESIZE); memset(cc1020_txbuf, PREAMBLE, PREAMBLE_SIZE);
memcpy((char *)cc1020_txbuf + PREAMBLESIZE, &syncword, SYNCWDSIZE); memcpy((char *)cc1020_txbuf + PREAMBLE_SIZE, &syncword, SYNCWORD_SIZE);
/* calibrate receiver */ /* calibrate receiver */
cc1020_wakeupRX(RX_CURRENT); cc1020_wakeupRX(RX_CURRENT);
@ -233,9 +233,8 @@ int
cc1020_send(const void *buf, unsigned short len) cc1020_send(const void *buf, unsigned short len)
{ {
int try; int try;
int normal_header = HDRSIZE + len; int normal_header = HDR_SIZE + len;
int i; uint16_t rxcrc = 0xffff; /* For checksum purposes */
uint16_t rxcrc = 0xFFFF; /* For checksum purposes */
rtimer_clock_t timeout_time; rtimer_clock_t timeout_time;
timeout_time = RTIMER_NOW() + RTIMER_SECOND / 1000 * SEND_TIMEOUT; timeout_time = RTIMER_NOW() + RTIMER_SECOND / 1000 * SEND_TIMEOUT;
@ -255,27 +254,25 @@ cc1020_send(const void *buf, unsigned short len)
} }
/* The preamble and the sync word are already in buffer. */ /* The preamble and the sync word are already in buffer. */
cc1020_txlen = PREAMBLESIZE + SYNCWDSIZE; cc1020_txlen = PREAMBLE_SIZE + SYNCWORD_SIZE;
/* header */ /* header */
cc1020_txbuf[cc1020_txlen++] = 0x00; cc1020_txbuf[cc1020_txlen++] = 0x00;
cc1020_txbuf[cc1020_txlen++] = normal_header + CRC_LEN; cc1020_txbuf[cc1020_txlen++] = normal_header + CRC_SIZE;
/* Adding the checksum on header and data */ /* Adding the checksum on header and data */
rxcrc = crc16_add((uint8_t) (normal_header & 0xff), rxcrc); rxcrc = crc16_add(normal_header & 0xff, rxcrc);
rxcrc = crc16_add((uint8_t) ((normal_header >> 8)& 0xff), rxcrc); rxcrc = crc16_add((normal_header >> 8) & 0xff, rxcrc);
for(i = 0; i < len; i++) { rxcrc = crc16_data(buf, len, rxcrc);
rxcrc = crc16_add((uint8_t) ((char*)buf)[i], rxcrc);
}
/* data to send */ /* data to send */
memcpy((char *)cc1020_txbuf + cc1020_txlen, buf, len); memcpy((char *)cc1020_txbuf + cc1020_txlen, buf, len);
cc1020_txlen += len; cc1020_txlen += len;
/* Send checksum */ /* Send checksum */
cc1020_txbuf[cc1020_txlen++] = (uint8_t)(rxcrc >> 8); cc1020_txbuf[cc1020_txlen++] = rxcrc >> 8;
cc1020_txbuf[cc1020_txlen++] = (uint8_t)(rxcrc & 0xFF); cc1020_txbuf[cc1020_txlen++] = rxcrc & 0xff;
/* suffix */ /* suffix */
cc1020_txbuf[cc1020_txlen++] = TAIL; cc1020_txbuf[cc1020_txlen++] = TAIL;
@ -325,17 +322,17 @@ cc1020_read(void *buf, unsigned short size)
{ {
unsigned len; unsigned len;
if(cc1020_rxlen <= HDRSIZE) { if(cc1020_rxlen <= HDR_SIZE) {
return 0; return 0;
} }
len = cc1020_rxlen - HDRSIZE; len = cc1020_rxlen - HDR_SIZE;
if(len > size) { if(len > size) {
RIMESTATS_ADD(toolong); RIMESTATS_ADD(toolong);
return -1; return -1;
} }
memcpy(buf, (char *)cc1020_rxbuf + HDRSIZE, len); memcpy(buf, (char *)cc1020_rxbuf + HDR_SIZE, len);
RIMESTATS_ADD(llrx); RIMESTATS_ADD(llrx);
reset_receiver(); reset_receiver();
@ -414,17 +411,16 @@ PROCESS_THREAD(cc1020_receiver_process, ev, data)
if(receiver_callback != NULL) { if(receiver_callback != NULL) {
/* Verify the checksum. */ /* Verify the checksum. */
uint16_t expected_crc = 0xffff; uint16_t expected_crc = 0xffff;
uint16_t actual_crc = -1; uint16_t actual_crc;
actual_crc = (cc1020_rxbuf[cc1020_rxlen - CRC_LEN] << 8) | cc1020_rxbuf[cc1020_rxlen - CRC_LEN + 1];
cc1020_rxlen -= CRC_LEN; actual_crc = (cc1020_rxbuf[cc1020_rxlen - CRC_SIZE] << 8) |
cc1020_rxbuf[cc1020_rxlen - CRC_SIZE + 1];
cc1020_rxlen -= CRC_SIZE;
expected_crc = crc16_add((uint8_t) (cc1020_rxlen & 0xff), expected_crc); expected_crc = crc16_add(cc1020_rxlen & 0xff, expected_crc);
expected_crc = crc16_add((uint8_t) ((cc1020_rxlen >> 8) & 0xff), expected_crc = crc16_add((cc1020_rxlen >> 8) & 0xff, expected_crc);
expected_crc); expected_crc = crc16_data((char *)&cc1020_rxbuf[HDR_SIZE],
int i; cc1020_rxlen - HDR_SIZE, expected_crc);
for(i = HDRSIZE; i < cc1020_rxlen; i++){
expected_crc = crc16_add(cc1020_rxbuf[i], expected_crc);
}
if(expected_crc == actual_crc) { if(expected_crc == actual_crc) {
receiver_callback(&cc1020_driver); receiver_callback(&cc1020_driver);
@ -507,13 +503,13 @@ interrupt(UART0RX_VECTOR) cc1020_rxhandler(void)
cc1020_rxlen++; cc1020_rxlen++;
if(cc1020_rxlen == HDRSIZE) { if(cc1020_rxlen == HDR_SIZE) {
pktlen = ((struct cc1020_header *)cc1020_rxbuf)->length; pktlen = ((struct cc1020_header *)cc1020_rxbuf)->length;
if(pktlen == 0 || pktlen > sizeof (cc1020_rxbuf)) { if(pktlen == 0 || pktlen > sizeof (cc1020_rxbuf)) {
cc1020_rxlen = 0; cc1020_rxlen = 0;
CC1020_SET_OPSTATE(CC1020_RX | CC1020_RX_SEARCHING); CC1020_SET_OPSTATE(CC1020_RX | CC1020_RX_SEARCHING);
} }
} else if(cc1020_rxlen > HDRSIZE) { } else if(cc1020_rxlen > HDR_SIZE) {
if(cc1020_rxlen == pktlen) { if(cc1020_rxlen == pktlen) {
/* Disable interrupts while processing the packet. */ /* Disable interrupts while processing the packet. */
DISABLE_RX_IRQ(); DISABLE_RX_IRQ();

View file

@ -1,75 +1,75 @@
/* /*
Copyright 2006, Freie Universitaet Berlin. All rights reserved. Copyright 2006, Freie Universitaet Berlin. All rights reserved.
These sources were developed at the Freie Universitaet Berlin, Computer These sources were developed at the Freie Universitaet Berlin, Computer
Systems and Telematics group. Systems and Telematics group.
Redistribution and use in source and binary forms, with or without Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are modification, are permitted provided that the following conditions are
met: met:
- Redistributions of source code must retain the above copyright - Redistributions of source code must retain the above copyright
notice, this list of conditions and the following disclaimer. notice, this list of conditions and the following disclaimer.
- Redistributions in binary form must reproduce the above copyright - Redistributions in binary form must reproduce the above copyright
notice, this list of conditions and the following disclaimer in the notice, this list of conditions and the following disclaimer in the
documentation and/or other materials provided with the distribution. documentation and/or other materials provided with the distribution.
- Neither the name of Freie Universitaet Berlin (FUB) nor the names of its - Neither the name of Freie Universitaet Berlin (FUB) nor the names of its
contributors may be used to endorse or promote products derived from contributors may be used to endorse or promote products derived from
this software without specific prior written permission. this software without specific prior written permission.
This software is provided by FUB and the contributors on an "as is" This software is provided by FUB and the contributors on an "as is"
basis, without any representations or warranties of any kind, express basis, without any representations or warranties of any kind, express
or implied including, but not limited to, representations or or implied including, but not limited to, representations or
warranties of non-infringement, merchantability or fitness for a warranties of non-infringement, merchantability or fitness for a
particular purpose. In no event shall FUB or contributors be liable particular purpose. In no event shall FUB or contributors be liable
for any direct, indirect, incidental, special, exemplary, or for any direct, indirect, incidental, special, exemplary, or
consequential damages (including, but not limited to, procurement of consequential damages (including, but not limited to, procurement of
substitute goods or services; loss of use, data, or profits; or substitute goods or services; loss of use, data, or profits; or
business interruption) however caused and on any theory of liability, business interruption) however caused and on any theory of liability,
whether in contract, strict liability, or tort (including negligence whether in contract, strict liability, or tort (including negligence
or otherwise) arising in any way out of the use of this software, even or otherwise) arising in any way out of the use of this software, even
if advised of the possibility of such damage. if advised of the possibility of such damage.
This implementation was developed by the CST group at the FUB. This implementation was developed by the CST group at the FUB.
For documentation and questions please use the web site For documentation and questions please use the web site
http://scatterweb.mi.fu-berlin.de and the mailinglist http://scatterweb.mi.fu-berlin.de and the mailinglist
scatterweb@lists.spline.inf.fu-berlin.de (subscription via the Website). scatterweb@lists.spline.inf.fu-berlin.de (subscription via the Website).
Berlin, 2006 Berlin, 2006
*/ */
/** /**
* \file cc1020.h * \file cc1020.h
* \author FUB ScatterWeb Developers, Michael Baar, Nicolas Tsiftes * \author FUB ScatterWeb Developers, Michael Baar, Nicolas Tsiftes
**/ **/
#ifndef CC1020_H #ifndef CC1020_H
#define CC1020_H #define CC1020_H
#include "dev/radio.h" #include "dev/radio.h"
extern const uint8_t cc1020_config_19200[]; extern const uint8_t cc1020_config_19200[];
extern const uint8_t cc1020_config_115200[]; extern const uint8_t cc1020_config_115200[];
void cc1020_init(const uint8_t* config); void cc1020_init(const uint8_t* config);
void cc1020_set_rx(void); void cc1020_set_rx(void);
void cc1020_set_tx(void); void cc1020_set_tx(void);
void cc1020_set_power(uint8_t pa_power); void cc1020_set_power(uint8_t pa_power);
int cc1020_carrier_sense(void); int cc1020_carrier_sense(void);
uint8_t cc1020_get_rssi(void); uint8_t cc1020_get_rssi(void);
uint8_t cc1020_get_packet_rssi(void); uint8_t cc1020_get_packet_rssi(void);
int cc1020_sending(void); int cc1020_sending(void);
int cc1020_send(const void *buf, unsigned short size); int cc1020_send(const void *buf, unsigned short size);
int cc1020_read(void *buf, unsigned short size); int cc1020_read(void *buf, unsigned short size);
void cc1020_set_receiver(void (*recv)(const struct radio_driver *)); void cc1020_set_receiver(void (*recv)(const struct radio_driver *));
int cc1020_on(void); int cc1020_on(void);
int cc1020_off(void); int cc1020_off(void);
extern const struct radio_driver cc1020_driver; extern const struct radio_driver cc1020_driver;
PROCESS_NAME(cc1020_sender_process); PROCESS_NAME(cc1020_sender_process);
#endif #endif