split SPI code into generic and CC2420-related and renamed constants in CC2420
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joxe
parent
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3 changed files with 203 additions and 272 deletions
302
core/dev/spi.h
302
core/dev/spi.h
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@ -1,8 +1,44 @@
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/* -*- C -*- */
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/* @(#)$Id: spi.h,v 1.7 2010/03/15 23:01:37 nifi Exp $ */
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/*
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* Copyright (c) 2010, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: spi.h,v 1.8 2010/06/23 10:15:28 joxe Exp $
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*/
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#ifndef SPI_H
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#define SPI_H
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/**
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* \file
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* Basic SPI macros
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* \author
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* Joakim Eriksson <joakime@sics.se>
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* Niclas Finne <nfi@sics.se>
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*/
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#ifndef __SPI_H__
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#define __SPI_H__
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/* Define macros to use for checking SPI transmission status depending
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on if it is possible to wait for TX buffer ready. This is possible
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@ -21,238 +57,36 @@ extern unsigned char spi_busy;
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void spi_init(void);
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/******************************************************************************************************
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* TEXAS INSTRUMENTS INC., *
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* MSP430 APPLICATIONS. *
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* Copyright Texas Instruments Inc, 2004 *
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*****************************************************************************************************/
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/* Write one character to SPI */
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#define SPI_WRITE(data) \
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do { \
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SPI_WAITFORTx_BEFORE(); \
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SPI_TXBUF = data; \
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SPI_WAITFOREOTx(); \
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} while(0)
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/***********************************************************
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FAST SPI: Low level functions
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***********************************************************/
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/* Write one character to SPI - will not wait for end
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useful for multiple writes with wait after final */
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#define SPI_WRITE_FAST(data) \
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do { \
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SPI_WAITFORTx_BEFORE(); \
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SPI_TXBUF = data; \
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SPI_WAITFORTx_AFTER(); \
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} while(0)
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#define FASTSPI_TX(x)\
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do {\
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SPI_WAITFORTx_BEFORE();\
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SPI_TXBUF = x;\
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SPI_WAITFORTx_AFTER();\
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} while(0)
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/* Read one character from SPI */
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#define SPI_READ(data) \
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do { \
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SPI_TXBUF = 0; \
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SPI_WAITFOREORx(); \
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data = SPI_RXBUF; \
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} while(0)
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#define FASTSPI_RX(x)\
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do {\
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SPI_TXBUF = 0;\
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SPI_WAITFOREORx();\
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x = SPI_RXBUF;\
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} while(0)
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#define FASTSPI_CLEAR_RX(x) do{ SPI_RXBUF; }while(0)
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#define FASTSPI_RX_GARBAGE()\
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do {\
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SPI_TXBUF = 0;\
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SPI_WAITFOREORx();\
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(void)SPI_RXBUF;\
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} while(0)
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#define FASTSPI_TX_MANY(p,c)\
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do {\
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u8_t spiCnt;\
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for (spiCnt = 0; spiCnt < (c); spiCnt++) {\
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FASTSPI_TX(((u8_t*)(p))[spiCnt]);\
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}\
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SPI_WAITFORTx_ENDED();\
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} while(0)
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/* Flush the SPI read register */
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#define SPI_FLUSH() \
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do { \
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SPI_RXBUF; \
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} while(0);
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#define FASTSPI_RX_WORD(x)\
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do {\
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SPI_TXBUF = 0;\
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SPI_WAITFOREORx();\
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x = SPI_RXBUF << 8;\
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SPI_TXBUF = 0;\
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SPI_WAITFOREORx();\
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x |= SPI_RXBUF;\
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} while (0)
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#define FASTSPI_TX_ADDR(a)\
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do {\
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SPI_TXBUF = a;\
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SPI_WAITFOREOTx();\
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} while (0)
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#define FASTSPI_RX_ADDR(a)\
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do {\
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SPI_TXBUF = (a) | 0x40;\
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SPI_WAITFOREOTx();\
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} while (0)
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/***********************************************************
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FAST SPI: Register access
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***********************************************************/
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// s = command strobe
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// a = register address
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// v = register value
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#define FASTSPI_STROBE(s) \
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do {\
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SPI_ENABLE();\
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FASTSPI_TX_ADDR(s);\
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SPI_DISABLE();\
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} while (0)
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#define FASTSPI_SETREG(a,v)\
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do {\
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SPI_ENABLE();\
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FASTSPI_TX_ADDR(a);\
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FASTSPI_TX((u8_t) ((v) >> 8));\
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FASTSPI_TX((u8_t) (v));\
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SPI_WAITFORTx_ENDED();\
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SPI_DISABLE();\
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} while (0)
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#define FASTSPI_GETREG(a,v)\
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do {\
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SPI_ENABLE();\
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FASTSPI_RX_ADDR(a);\
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v= (u8_t)SPI_RXBUF;\
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FASTSPI_RX_WORD(v);\
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clock_delay(1);\
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SPI_DISABLE();\
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} while (0)
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// Updates the SPI status byte
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#define FASTSPI_UPD_STATUS(s)\
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do {\
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SPI_ENABLE();\
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SPI_TXBUF = CC2420_SNOP;\
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SPI_WAITFOREOTx();\
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s = SPI_RXBUF;\
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SPI_DISABLE();\
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} while (0)
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/***********************************************************
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FAST SPI: FIFO Access
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***********************************************************/
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// p = pointer to the byte array to be read/written
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// c = the number of bytes to read/write
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// b = single data byte
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#define FASTSPI_WRITE_FIFO(p,c)\
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do {\
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SPI_ENABLE();\
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u8_t i;\
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FASTSPI_TX_ADDR(CC2420_TXFIFO);\
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for (i = 0; i < (c); i++) {\
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FASTSPI_TX(((u8_t*)(p))[i]);\
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}\
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SPI_WAITFORTx_ENDED();\
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SPI_DISABLE();\
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} while (0)
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#define FASTSPI_WRITE_FIFO_NOCE(p,c)\
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do {\
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FASTSPI_TX_ADDR(CC2420_TXFIFO);\
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for (u8_t spiCnt = 0; spiCnt < (c); spiCnt++) {\
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FASTSPI_TX(((u8_t*)(p))[spiCnt]);\
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}\
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SPI_WAITFORTx_ENDED();\
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} while (0)
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#define FASTSPI_READ_FIFO_BYTE(b)\
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do {\
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SPI_ENABLE();\
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FASTSPI_RX_ADDR(CC2420_RXFIFO);\
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(void)SPI_RXBUF;\
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FASTSPI_RX(b);\
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clock_delay(1);\
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SPI_DISABLE();\
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} while (0)
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#define FASTSPI_READ_FIFO_NO_WAIT(p,c)\
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do {\
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u8_t spiCnt;\
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SPI_ENABLE();\
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FASTSPI_RX_ADDR(CC2420_RXFIFO);\
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(void)SPI_RXBUF;\
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for (spiCnt = 0; spiCnt < (c); spiCnt++) {\
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FASTSPI_RX(((u8_t*)(p))[spiCnt]);\
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}\
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clock_delay(1);\
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SPI_DISABLE();\
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} while (0)
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#define FASTSPI_READ_FIFO_GARBAGE(c)\
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do {\
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u8_t spiCnt;\
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SPI_ENABLE();\
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FASTSPI_RX_ADDR(CC2420_RXFIFO);\
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(void)SPI_RXBUF;\
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for (spiCnt = 0; spiCnt < (c); spiCnt++) {\
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FASTSPI_RX_GARBAGE();\
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}\
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clock_delay(1);\
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SPI_DISABLE();\
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} while (0)
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/***********************************************************
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FAST SPI: CC2420 RAM access (big or little-endian order)
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***********************************************************/
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// FAST SPI: CC2420 RAM access (big or little-endian order)
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// p = pointer to the variable to be written
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// a = the CC2420 RAM address
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// c = the number of bytes to write
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// n = counter variable which is used in for/while loops (u8_t)
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//
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// Example of usage:
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// u8_t n;
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// u16_t shortAddress = 0xBEEF;
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// FASTSPI_WRITE_RAM_LE(&shortAddress, CC2420RAM_SHORTADDR, 2);
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#define FASTSPI_WRITE_RAM_LE(p,a,c,n)\
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do {\
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SPI_ENABLE();\
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FASTSPI_TX(0x80 | (a & 0x7F));\
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FASTSPI_TX((a >> 1) & 0xC0);\
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for (n = 0; n < (c); n++) {\
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FASTSPI_TX(((u8_t*)(p))[n]);\
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}\
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SPI_WAITFORTx_ENDED();\
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SPI_DISABLE();\
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} while (0)
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#define FASTSPI_WRITE_RAM_BE(p,a,c,n) \
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do { \
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SPI_ENABLE(); \
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FASTSPI_TX(0x80 | (a & 0x7F)); \
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FASTSPI_TX((a >> 1) & 0xC0); \
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for (n = (c); n > 0; n--) { \
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FASTSPI_TX(((uint8_t *)(p))[n - 1]); \
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} \
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SPI_WAITFORTx_ENDED(); \
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SPI_DISABLE(); \
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} while (0)
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#define FASTSPI_READ_RAM_LE(p,a,c,n)\
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do {\
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SPI_ENABLE();\
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FASTSPI_TX(0x80 | (a & 0x7F));\
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FASTSPI_TX(((a >> 1) & 0xC0) | 0x20);\
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SPI_WAITFORTx_ENDED();\
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SPI_RXBUF;\
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for (n = 0; n < (c); n++) {\
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FASTSPI_RX(((u8_t*)(p))[n]);\
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}\
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SPI_DISABLE();\
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} while (0)
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#endif /* SPI_H */
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#endif /* __SPI_H__ */
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