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IRIS port is working with uIPv6

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This commit is contained in:
HATATANI Shinta 2011-06-15 17:18:20 +09:00
parent 9a201f6934
commit f4740a062a
11 changed files with 85 additions and 338 deletions
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69
platform/iris/dev/cc2420-arch.c
View file

@ -1,69 +0,0 @@
/*
* Copyright (c) 2009, University of Colombo School of Computing
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the Contiki operating system.
*
* @(#)$$
*/
#include <avr/io.h>
#include "contiki.h"
#include "contiki-net.h"
#include "dev/spi.h"
#include "dev/cc2420.h"
#include "dev/leds.h"
void
cc2420_arch_init(void)
{
SFIOR |= BV(PUD); /* Beware, disable all pull-ups. */
spi_init();
DDRA |= BV(CC2420_RESET_PIN);
DDRA |= BV(CC2420_VREG_PIN);
DDRB &= ~BV(CC2420_FIFO_PIN);
DDRD &= ~BV(CC2420_CCA_PIN);
DDRD &= ~BV(CC2420_SFD_PIN);
DDRE &= ~BV(CC2420_FIFOP_PIN);
PORTA |= BV(CC2420_RESET_PIN);
PORTB |= BV(CC2420_CSN_PIN);
CC2420_SPI_DISABLE(); /* Unselect radio. */
}
ISR(CC2420_IRQ_VECTOR)
{
/* TODO : wakeup from sleep mode */
cc2420_interrupt();
}

160
platform/iris/dev/clock.c
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@ -1,160 +0,0 @@
/*
* Copyright (c) 2009, University of Colombo School of Computing
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is part of the Contiki operating system.
*
* @(#)$$
*/
#include "sys/clock.h"
#include "sys/etimer.h"
#include <avr/io.h>
#include <avr/interrupt.h>
static volatile clock_time_t count, scount;
static volatile unsigned long seconds;
/*---------------------------------------------------------------------------*/
ISR(TIMER0_COMP_vect)
{
count++;
if(++scount == CLOCK_SECOND) {
scount = 0;
seconds++;
}
if(etimer_pending()) {
etimer_request_poll();
}
}
/*---------------------------------------------------------------------------*/
void
clock_init(void)
{
/* Disable interrupts*/
cli();
/* Disable compare match interrupts and overflow interrupts. */
TIMSK &= ~( _BV(TOIE0) | _BV(OCIE0) );
/**
* set Timer/Counter0 to be asynchronous
* from the CPU clock with a second external
* clock(32,768kHz) driving it.
*/
ASSR |= _BV(AS0);
/*
* Set timer control register:
* - prescale: 32 (CS00 and CS01)
* - counter reset via comparison register (WGM01)
*/
TCCR0 = _BV(CS00) | _BV(CS01) | _BV(WGM01);
/* Set counter to zero */
TCNT0 = 0;
/*
* 128 clock ticks per second.
* 32,768 = 32 * 8 * 128
*/
OCR0 = 8;
/* Clear interrupt flag register */
TIFR = 0x00;
/**
* Wait for TCN0UB, OCR0UB, and TCR0UB.
*
*/
while(ASSR & 0x07);
/* Raise interrupt when value in OCR0 is reached. */
TIMSK |= _BV(OCIE0);
count = 0;
/* enable all interrupts*/
sei();
}
/*---------------------------------------------------------------------------*/
clock_time_t
clock_time(void)
{
clock_time_t tmp;
do {
tmp = count;
} while(tmp != count);
return tmp;
}
/*---------------------------------------------------------------------------*/
/**
* Delay the CPU for a multiple of TODO
*/
void
clock_delay(unsigned int i)
{
for (; i > 0; i--) { /* Needs fixing XXX */
unsigned j;
for (j = 50; j > 0; j--)
asm volatile("nop");
}
}
/*---------------------------------------------------------------------------*/
/**
* Wait for a multiple of 1 / 128 sec = 7.8125 ms.
*
*/
void
clock_wait(int i)
{
clock_time_t start;
start = clock_time();
while(clock_time() - start < (clock_time_t)i);
}
/*---------------------------------------------------------------------------*/
void
clock_set_seconds(unsigned long sec)
{
// TODO
}
/*---------------------------------------------------------------------------*/
unsigned long
clock_seconds(void)
{
unsigned long tmp;
do {
tmp = seconds;
} while(tmp != seconds);
return tmp;
}
/*---------------------------------------------------------------------------*/

16
platform/iris/dev/ds2401.c
View file

@ -109,14 +109,14 @@ unsigned char ds2401_id[8];
* where n is the number of iterations and XTAL is the clock frequency(in MHz).
* TODO: Moving the delay_loop to dev/clock.c
*/
static void
delay_loop(uint16_t __count)
{
asm volatile ("1: sbiw %0,1" "\n\t"
"brne 1b"
: "=w" (__count)
: "0" (__count)
);
static void
delay_loop(uint16_t __count)
{
asm volatile ("1: sbiw %0,1" "\n\t"
"brne 1b"
: "=w" (__count)
: "0" (__count)
);
}
/*---------------------------------------------------------------------------*/
/*