Minor optimisations of timer init
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d5284eebe1
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f0ad042bfc
1 changed files with 12 additions and 5 deletions
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@ -177,9 +177,12 @@
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: ((t)==4?(&TCNT4) :(&TCNT5)) \
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: ((t)==4?(&TCNT4) :(&TCNT5)) \
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)
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)
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#define HWT_SET_COM(timer, channel, com) \
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#define HWT_CLR_COM(timer, channel) \
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((*HWT_TCCRA (timer) &= ~(HWT_COM_MASK << (6 - 2 * (channel)))) \
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(*HWT_TCCRA (timer) &= ~(HWT_COM_MASK << (6 - 2 * (channel))))
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,(*HWT_TCCRA (timer) |= ((com) << (6 - 2 * (channel)))) \
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#define HWT_SET_COM(timer, channel, com) \
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( HWT_CLR_COM (timer, channel) \
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, (*HWT_TCCRA (timer) |= ((com) << (6 - 2 * (channel)))) \
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)
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)
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#define HWT_CHECK_TIMER(timer) \
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#define HWT_CHECK_TIMER(timer) \
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@ -235,7 +238,7 @@ hwtimer_ini (uint8_t timer, uint8_t wgm, uint8_t clock, uint16_t maxt)
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*HWT_TCCRB (timer) |= ((wgm & HWT_WGM_MASK_HIGH) << HWT_WGM_SHIFT_HIGH);
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*HWT_TCCRB (timer) |= ((wgm & HWT_WGM_MASK_HIGH) << HWT_WGM_SHIFT_HIGH);
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for (i=0; i<3; i++) {
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for (i=0; i<3; i++) {
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HWT_SET_COM (timer, i, HWT_COM_NORMAL);
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HWT_CLR_COM (timer, i);
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}
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}
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if ( wgm == HWT_WGM_PWM_PHASE_FRQ_ICR
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if ( wgm == HWT_WGM_PWM_PHASE_FRQ_ICR
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@ -458,7 +461,11 @@ hwtimer_set_com (uint8_t timer, uint8_t channel, uint8_t com)
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if (com > HWT_COM_MASK) {
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if (com > HWT_COM_MASK) {
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return HWT_ERR_INVALID_COM;
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return HWT_ERR_INVALID_COM;
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}
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}
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HWT_SET_COM (timer, channel, com);
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if (com) {
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HWT_SET_COM (timer, channel, com);
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} else {
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HWT_CLR_COM (timer, channel);
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}
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return 0;
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return 0;
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}
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}
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