Change uart_set_baudrate() to a do-while statement.
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1 changed files with 5 additions and 4 deletions
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@ -77,10 +77,11 @@
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#define BAUD2BRD(baud) DIV_ROUND(UART_CLOCK_RATE << (UART_CTL_HSE_VALUE + 2), (baud))
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#define uart_set_baudrate(baud) ( \
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REG(UART_BASE | UART_IBRD) = BAUD2BRD(baud) >> 6, \
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REG(UART_BASE | UART_FBRD) = BAUD2BRD(baud) & 0x3f, \
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REG(UART_BASE | UART_LCRH) = REG(UART_BASE | UART_LCRH) )
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#define uart_set_baudrate(baud) do { \
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REG(UART_BASE | UART_IBRD) = BAUD2BRD(baud) >> 6; \
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REG(UART_BASE | UART_FBRD) = BAUD2BRD(baud) & 0x3f; \
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REG(UART_BASE | UART_LCRH) = REG(UART_BASE | UART_LCRH); \
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} while(0)
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/** @} */
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/*---------------------------------------------------------------------------*/
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