deac/osd-contiki
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

Merge pull request #1344 from tsparber/fix-doxygen

Browse source 
doxygen: Fixed all warnings
This commit is contained in:
Simon Duquennoy 2015-11-30 22:07:15 +01:00
commit ebc8d9fb1c
39 changed files with 278 additions and 222 deletions
Download patch file Download diff file Expand all files Collapse all files

2
cpu/arm/aducrf101/Common/ADuCRF101.h
View file

@ -33,7 +33,7 @@
*/
/****************************************************************************************************//**
* @file ADUCRF101.h
* @file ADuCRF101.h
*
* @brief CMSIS Cortex-M3 Core Peripheral Access Layer Header File for
* default ADUCRF101 Device Series

1
cpu/arm/aducrf101/Common/radioeng.c
View file

@ -1292,7 +1292,6 @@ static RIE_Responses RadioWaitOnState(RadioState FinalState)
/**
@fn RIE_Responses RadioWaitOnCmdLdr(void)
@brief Wait for Final State to be reached
@param FinalState State to wait on
@return RIE_Responses Error code
**/
static RIE_Responses RadioWaitOnCmdLdr(void)

3
cpu/arm/aducrf101/Common/system_ADuCRF101.c
View file

@ -32,7 +32,7 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@file system_ADUCRF101.c
@file system_ADuCRF101.c
@brief CMSIS Cortex-M3 Device Peripheral Access Layer Implementation File
for the ADuCRF101
@version v1.0
@ -106,7 +106,6 @@ void SystemCoreClockUpdate (void) /* Get Core Clock Frequency */
/**
* Initialize the system
*
* @param none
* @return none
*
* @brief Setup the microcontroller system.

4
cpu/arm/aducrf101/Common/system_ADuCRF101.h
View file

@ -32,7 +32,7 @@
* IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
/**
@file system_ADUCRF101.h
@file system_ADuCRF101.h
@brief: CMSIS Cortex-M3 Device Peripheral Access Layer Header File
for the ADuCRF101
@version v0.2
@ -51,7 +51,6 @@
/**
* @brief Initialize the system
*
* @param none
* @return none
*
* Setup the microcontroller system.
@ -62,7 +61,6 @@ extern void SystemInit (void);
/**
* @brief Update internal SystemCoreClock variable
*
* @param none
* @return none
*
* Updates the internal SystemCoreClock with current core

3
cpu/arm/at91sam7s/loader/elfloader-arch-otf.h
View file

@ -71,7 +71,8 @@
/**
* \brief Perform a relocation.
* \param output The output object for the segment.
* \param input_fd The file descriptor for the ELF file.
* \param output The output object for the segment.
* \param sectionoffset The file offset at which the relocation can be found.
* \param sectionaddr The section start address (absolute runtime).
* \param rela A pointer to an ELF32 rela structure (struct elf32_rela).

50
cpu/arm/at91sam7s/loader/elfloader-otf.h
View file

@ -169,11 +169,11 @@ struct elfloader_output {
};
/**
* \brief Allocate a new segment
* \param input The output object
* \param type Type of segment
* \param size Size of segment in bytes
* \return A pointer to the start of the segment.
* \brief Allocate a new segment
* \param output The output object
* \param type Type of segment
* \param size Size of segment in bytes
* \return A pointer to the start of the segment.
*
* The returned address doesn't need to correspond to any real memory,
* since it's only used for calculating the relocations.
@ -182,39 +182,39 @@ void *elfloader_allocate_segment(struct elfloader_output *output,
unsigned int type, int size);
/**
* \brief Start writing to a new segment
* \param input The output object
* \param type Type of segment
* \param addr Address of segment from elfloader_allocate_segment
* \param size Size of segment in bytes
* \return Returns ELFLOADER_OK if successful, otherwise an error code
* \brief Start writing to a new segment
* \param output The output object
* \param type Type of segment
* \param addr Address of segment from elfloader_allocate_segment
* \param size Size of segment in bytes
* \return Returns ELFLOADER_OK if successful, otherwise an error code
*
*/
int elfloader_start_segment(struct elfloader_output *output,
unsigned int type, void *addr, int size);
/**
* \brief Mark end of segment
* \param input The output object
* \return Zero if successful
* \brief Mark end of segment
* \param output The output object
* \return Zero if successful
*/
int elfloader_end_segment(struct elfloader_output *output);
/**
* \brief Write data to a segment
* \param input The output object
* \param buf Data to be written
* \param len Length of data
* \return The number of bytes actually written, or negative if failed.
* \brief Write data to a segment
* \param output The output object
* \param buf Data to be written
* \param len Length of data
* \return The number of bytes actually written, or negative if failed.
*/
int elfloader_write_segment(struct elfloader_output *output, const char *buf,
unsigned int len);
/**
* \brief Get the current offset in the file where the next data will
* be written.
* \param input The output object
* \return The current offset.
* \brief Get the current offset in the file where the next data will
* be written.
* \param output The output object
* \return The current offset.
*/
unsigned int elfloader_segment_offset(struct elfloader_output *output);
@ -255,8 +255,8 @@ void elfloader_init(void);
/**
* \brief Load and relocate an ELF file.
* \param input Input object defining how to read from the ELF file
* \param output Output object defining how to create and write to seegments.
* \param input_fd Input object defining how to read from the ELF file
* \param output Output object defining how to create and write to seegments.
* \return ELFLOADER_OK if loading and relocation worked.
* Otherwise an error value.
*

48
cpu/avr/dev/lanc111.c
View file

@ -271,6 +271,9 @@
*/
#define NIC_MMUCR (LANC111_BASE_ADDR + 0x00)
/*!
* \brief MMU command register busy flag.
*/
#define MMUCR_BUSY 0x0001
#define MMU_NOP 0
@ -292,7 +295,7 @@
/*!
* \brief Bank 2 - Allocation result register.
*
* This byte register is updated upon a \ref MMU_ALO command.
* This byte register is updated upon a MMU_ALO command.
*/
#define NIC_ARR (LANC111_BASE_ADDR + 0x03)
@ -334,14 +337,14 @@
*/
#define NIC_MSK (LANC111_BASE_ADDR + 0x0D)
#define INT_MD 0x80 /*!< \ref PHY state change interrupt bit mask. */
#define INT_ERCV 0x40 /*!< \ref Early receive interrupt bit mask. */
#define INT_EPH 0x20 /*!< \ref Ethernet protocol interrupt bit mask. */
#define INT_RX_OVRN 0x10 /*!< \ref Receive overrun interrupt bit mask. */
#define INT_ALLOC 0x08 /*!< \ref Transmit allocation interrupt bit mask. */
#define INT_TX_EMPTY 0x04 /*!< \ref Transmitter empty interrupt bit mask. */
#define INT_TX 0x02 /*!< \ref Transmit complete interrupt bit mask. */
#define INT_RCV 0x01 /*!< \ref Receive interrupt bit mask. */
#define INT_MD 0x80 /*!< PHY state change interrupt bit mask. */
#define INT_ERCV 0x40 /*!< Early receive interrupt bit mask. */
#define INT_EPH 0x20 /*!< Ethernet protocol interrupt bit mask. */
#define INT_RX_OVRN 0x10 /*!< Receive overrun interrupt bit mask. */
#define INT_ALLOC 0x08 /*!< Transmit allocation interrupt bit mask. */
#define INT_TX_EMPTY 0x04 /*!< Transmitter empty interrupt bit mask. */
#define INT_TX 0x02 /*!< Transmit complete interrupt bit mask. */
#define INT_RCV 0x01 /*!< Receive interrupt bit mask. */
/*!
* \brief Bank 3 - Multicast table register.
@ -493,12 +496,6 @@
#define nic_bs(bank) nic_outlb(NIC_BSR, bank)
/*!
* \struct _NICINFO lanc111.h dev/lanc111.h
* \brief Network interface controller information structure.
*/
/*@}*/
/*!
* \addtogroup xgNicLanc111
*/
@ -840,10 +837,10 @@ static int NicStart(CONST uint8_t * mac)
return 0;
}
#if 0
/*
* NIC interrupt entry.
*/
#if 0
static void NicInterrupt(void *arg)
{
uint8_t isr;
@ -955,7 +952,7 @@ static void NicRead(uint8_t * buf, uint16_t len)
*
* Nic interrupts must be disabled when calling this funtion.
*
* \return Pointer to an allocated ::NETBUF. If there is no
* \return Pointer to an allocated NETBUF. If there is no
* no data available, then the function returns a
* null pointer. If the NIC's buffer seems to be
* corrupted, a pointer to 0xFFFF is returned.
@ -1014,6 +1011,7 @@ static NETBUF *NicGetPacket(void)
return nb;
}
#if 0
/*!
* \brief Load a packet into the nic's transmit ring buffer.
*
@ -1028,7 +1026,6 @@ static NETBUF *NicGetPacket(void)
* will automatically release the network buffer
* structure.
*/
#if 0
static int NicPutPacket(NETBUF * nb)
{
uint16_t sz;
@ -1119,13 +1116,12 @@ static int NicPutPacket(NETBUF * nb)
return 0;
}
#endif
#endif /* 0 */
/*! \fn NicRxLanc(void *arg)
* \brief NIC receiver thread.
*
*/
#if 1
/*!
* \brief NIC receiver thread.
*/
PROCESS_THREAD(lanc111_process, ev, data)
/*THREAD(NicRxLanc, arg)*/
{
@ -1202,7 +1198,7 @@ PROCESS_THREAD(lanc111_process, ev, data)
PROCESS_END();
}
#endif /* 0 */
#endif /* 1 */
#if 0
/*!
* \brief Send Ethernet packet.
@ -1245,7 +1241,7 @@ int LancOutput(NUTDEVICE * dev, NETBUF * nb)
}
return rc;
}
#endif
#endif /* 0 */
#if 0
/*!
* \brief Initialize Ethernet hardware.
@ -1340,7 +1336,7 @@ NUTDEVICE devSmsc111 = {
};
/*@}*/
#endif
#endif /* 0 */
int

1
cpu/avr/minileds.c
View file

@ -26,6 +26,7 @@
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
*/
/**
* \file
* Dummy implementation of minileds module

2
cpu/mc1322x/lib/printf.c
View file

@ -34,7 +34,7 @@
*/
/**
* \file printf-stdarg.c
* \file lib/printf.c
*
* \brief sprintf functions to replace newlib for AVR32 UC3.
*

10
cpu/stm32w108/hal/error.h
View file

@ -10,12 +10,12 @@
#ifndef ERRORS_H_
#define ERRORS_H_
#ifndef __STSTATUS_TYPE__
#define __STSTATUS_TYPE__
/**
* @brief Return type for St functions.
*/
#ifndef __STSTATUS_TYPE__
#define __STSTATUS_TYPE__
typedef uint8_t StStatus;
typedef uint8_t StStatus;
#endif //__STSTATUS_TYPE__
/**
@ -27,7 +27,7 @@
* @brief Macro used by error-def.h to define all of the return codes.
*
* @param symbol The name of the constant being defined. All St returns
* begin with ST_. For example, ::ST_CONNECTION_OPEN.
* begin with ST_. For example, ::ST_ERR_FATAL.
*
* @param value The value of the return code. For example, 0x61.
*/
@ -36,9 +36,7 @@
enum {
#ifndef DOXYGEN_SHOULD_SKIP_THIS
#include "error-def.h"
#endif //DOXYGEN_SHOULD_SKIP_THIS
/** Gets defined as a count of all the possible return codes in the
* StZNet stack API.
*/

52
cpu/stm32w108/hal/micro/cortexm3/mfg-token.h
View file

@ -7,6 +7,7 @@
#ifndef MFG_TOKEN_H_
#define MFG_TOKEN_H_
#ifndef DOXYGEN_SHOULD_SKIP_THIS
// The manufacturing tokens live in the Info Blocks, while all other tokens
// live in the Simulated EEPROM. This requires the token names to be defined
@ -20,10 +21,13 @@
* that point to the correct location in the Info Blocks. (This is the
* extern, the actual definition is found in hal/micro/cortexm3/token.c)
*
* \param name: The name of the token.
*
* \param TOKEN_##name##_ADDRESS: The address in EEPROM at which the token
* will be stored. This parameter is generated with a macro above.
* \param name: The name of the token.
* \param creator: The manufacturing creators.
* \param iscnt:
* \param isidx:
* \param type: The token type. The types are found in token-stack.h.
* \param arraysize: The number of elements in an indexed token (arraysize=1
* for scalar tokens).
*/
#define TOKEN_MFG(name,creator,iscnt,isidx,type,arraysize,...) \
extern const uint16_t TOKEN_##name;
@ -34,9 +38,13 @@
* \brief Macro for translating token definitions into size variables.
* This provides a convenience for abstracting the 'sizeof(type)' anywhere.
*
* \param name: The name of the token.
*
* \param type: The token type. The types are found in token-stack.h.
* \param name: The name of the token.
* \param creator: The manufacturing creators.
* \param iscnt:
* \param isidx:
* \param type: The token type. The types are found in token-stack.h.
* \param arraysize: The number of elements in an indexed token (arraysize=1
* for scalar tokens).
*/
#define TOKEN_MFG(name,creator,iscnt,isidx,type,arraysize,...) \
TOKEN_##name##_SIZE = sizeof(type),
@ -49,12 +57,16 @@
/**
* \brief Macro for typedef'ing the CamelCase token type found in
* token-stack.h to a capitalized TOKEN style name that ends in _TYPE.
* This macro allows other macros below to use 'token##_TYPE' to declare
* This macro allows other macros below to use 'token\#\#_TYPE' to declare
* a local copy of that token.
*
* \param name: The name of the token.
*
* \param type: The token type. The types are found in token-stack.h.
* \param name: The name of the token.
* \param creator: The manufacturing creators.
* \param iscnt:
* \param isidx:
* \param type: The token type. The types are found in token-stack.h.
* \param arraysize: The number of elements in an indexed token (arraysize=1
* for scalar tokens).
*/
#define TOKEN_MFG(name,creator,iscnt,isidx,type,arraysize,...) \
typedef type TOKEN_##name##_TYPE;
@ -70,8 +82,7 @@
* subsequent tokens to align against. ( See hal/micro/cortexm3/token.c for
* the instances of TOKEN_NEXT_ADDRESS() );
*
* \param region: The name to give to the element in the address enum..
*
* \param region: The name to give to the element in the address enum.
* \param address: The address in EEPROM where the region begins.
*/
#define TOKEN_NEXT_ADDRESS(region, address) \
@ -80,14 +91,17 @@
/**
* \brief Macro for creating ADDRESS and END elements for each token in
* the enum below. The ADDRESS element is linked to from the the normal
* TOKEN_##name macro and provides the value passed into the internal token
* TOKEN_\#\#name macro and provides the value passed into the internal token
* system calls. The END element is a placeholder providing the starting
* point for the ADDRESS of the next dynamically positioned token.
*
* \param name: The name of the token.
*
* \param arraysize: The number of elements in an indexed token (arraysize=1
* for scalar tokens).
* \param name: The name of the token.
* \param creator: The manufacturing creators.
* \param iscnt:
* \param isidx:
* \param type: The token type. The types are found in token-stack.h.
* \param arraysize: The number of elements in an indexed token (arraysize=1
* for scalar tokens).
*/
#define TOKEN_MFG(name,creator,iscnt,isidx,type,arraysize,...) \
TOKEN_##name##_ADDRESS, \
@ -106,8 +120,6 @@ enum {
#undef DEFINETOKENS
#ifndef DOXYGEN_SHOULD_SKIP_THIS
/**
* \brief Copies the token value from non-volatile storage into a RAM
* location. This is the internal function that the exposed API

3
cpu/stm32w108/hal/micro/cortexm3/nvm.h
View file

@ -14,8 +14,7 @@
* @addtogroup stm32w-cpu
* @{ */
/** @defgroup nvm
* @brief Cortex-M3 Non-Volatile Memory data storage system.
/** @defgroup nvm Cortex-M3 Non-Volatile Memory data storage system.
*
* This header defines the API for NVM data storage. This header also
* describes the algorithm behind the NVM data storage system with notes

4
cpu/stm32w108/hal/micro/cortexm3/uart.h
View file

@ -32,8 +32,8 @@ typedef enum
*
* @param parity The type of parity used for communication.
* See the SerialParity enum for possible values
*
* @return stopbits The number of stop bits used for communication.
*
* @param stopbits The number of stop bits used for communication.
* Valid values are 1 or 2
*/
void uartInit(uint32_t baudrate, uint8_t databits, SerialParity parity, uint8_t stopbits);

2
cpu/stm32w108/hal/micro/generic/compiler/platform-common.h
View file

@ -15,7 +15,7 @@
* @{ */
/** \file hal/micro/generic/compiler/platform-common.h
* See \ref platform_common for detailed documentation.
* See platform_common.h for detailed documentation.
*
* <!--(C) COPYRIGHT 2010 STMicroelectronics. All rights reserved. -->
*/

57
cpu/stm32w108/hal/micro/micro-common.h
View file

@ -70,38 +70,43 @@ void halInternalDisableWatchDog(uint8_t magicKey);
*/
boolean halInternalWatchDogEnabled( void );
#ifdef DOXYGEN_SHOULD_SKIP_THIS
/** @brief Enumerations for the possible microcontroller sleep modes.
* - SLEEPMODE_RUNNING
* Everything is active and running. In practice this mode is not
* used, but it is defined for completeness of information.
* - SLEEPMODE_IDLE
* Only the CPU is idled. The rest of the chip continues runing
* normally. The chip will wake from any interrupt.
* - SLEEPMODE_WAKETIMER
* The sleep timer clock sources remain running. The RC is always
* running and the 32kHz XTAL depends on the board header. Wakeup
* is possible from both GPIO and the sleep timer. System time
* is maintained. The sleep timer is assumed to be configured
* properly for wake events.
* - SLEEPMODE_MAINTAINTIMER
* The sleep timer clock sources remain running. The RC is always
* running and the 32kHz XTAL depends on the board header. Wakeup
* is possible from only GPIO. System time is maintained.
* - SLEEPMODE_NOTIMER
* The sleep timer clock sources (both RC and XTAL) are turned off.
* Wakeup is possible from only GPIO. System time is lost.
*/
#ifdef DOXYGEN_SHOULD_SKIP_THIS
enum SleepModes
#else
typedef uint8_t SleepModes;
enum
#endif
{
/**
* Everything is active and running. In practice this mode is not
* used, but it is defined for completeness of information.
*/
SLEEPMODE_RUNNING = 0,
/**
* Oly the CPU is idled. The rest of the chip continues runing
* normally. The chip will wake from any interrupt.
*/
SLEEPMODE_IDLE = 1,
/**
* The sleep timer clock sources remain running. The RC is always
* running and the 32kHz XTAL depends on the board header. Wakeup
* is possible from both GPIO and the sleep timer. System time
* is maintained. The sleep timer is assumed to be configured
* properly for wake events.
*/
SLEEPMODE_WAKETIMER = 2,
/**
* The sleep timer clock sources remain running. The RC is always
* running and the 32kHz XTAL depends on the board header. Wakeup
* is possible from only GPIO. System time is maintained.
*/
SLEEPMODE_MAINTAINTIMER = 3,
/**
* The sleep timer clock sources (both RC and XTAL) are turned off.
* Wakeup is possible from only GPIO. System time is lost.
*/
SLEEPMODE_NOTIMER = 4,
};
@ -128,15 +133,15 @@ void halCommonDelayMicroseconds(uint16_t us);
* and if yes it will jump into it according to the user parameters.
*
*
* @param mode The bootloader mode, 0 UART mode, 1 RF mode. All other
* values are reserved
* @param mode The bootloader mode, 0 UART mode, 1 RF mode. All other
* values are reserved
* @param channel The channel where the booloader will operate. 0 means
* default channel (only vaild for RF mode).
* @param panID The panID where the booloader will operate. 0xFFFF means
* default panID (only vaild for RF mode).
* default channel (only vaild for RF mode).
* @param panID The panID where the booloader will operate. 0xFFFF means
* default panID (only vaild for RF mode).
* @return An error code or it will never return.
*/
StStatus halBootloaderStart(uint8_t mode, uint8_t channel, uint16_t panId);
StStatus halBootloaderStart(uint8_t mode, uint8_t channel, uint16_t panID);
#ifdef CORTEXM3_STM32F103
#include "micro/cortexm3/stm32f103ret/micro-specific.h"

2
cpu/stm32w108/hal/micro/system-timer.h
View file

@ -10,7 +10,7 @@
* @addtogroup stm32w-cpu
* @{ */
/** @defgroup system_timer
/** @defgroup system_timer System Timer
* @brief Functions that provide access to the system clock.
*
* A single system tick (as returned by ::halCommonGetInt16uMillisecondTick() and