more protection against interrupts that might spoil SPI sequences.
made coding style more like that of contiki.
This commit is contained in:
parent
f39d2bd4c6
commit
e9d279620f
6 changed files with 195 additions and 176 deletions
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@ -47,9 +47,9 @@ Berlin, 2007
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* @brief MMC-/SD-Card library
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* @brief MMC-/SD-Card library
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*
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*
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @version $Revision: 1.7 $
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* @version $Revision: 1.8 $
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*
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*
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* $Id: sd.c,v 1.7 2009/05/25 13:19:04 nvt-se Exp $
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* $Id: sd.c,v 1.8 2009/05/26 12:15:46 nvt-se Exp $
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*
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*
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* Initialisation and basic functions for read and write access
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* Initialisation and basic functions for read and write access
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*/
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*/
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@ -231,7 +231,7 @@ sd_set_blocklength(const uint8_t blocklength_bit)
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// Public functions, Reading
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// Public functions, Reading
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///////////////////////////////////////////////////////////////////////////////
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///////////////////////////////////////////////////////////////////////////////
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uint16_t
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uint16_t
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sd_AlignAddress(uint32_t * pAddress)
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sd_align_address(uint32_t * pAddress)
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{
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{
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uint16_t blMask = sd_state.BlockLen - 1;
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uint16_t blMask = sd_state.BlockLen - 1;
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uint16_t *lw = (uint16_t *)pAddress;
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uint16_t *lw = (uint16_t *)pAddress;
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@ -246,7 +246,12 @@ sd_AlignAddress(uint32_t * pAddress)
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uint16_t
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uint16_t
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sd_read_block(void (*const pBuffer), const uint32_t address)
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sd_read_block(void (*const pBuffer), const uint32_t address)
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{
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{
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int s;
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s = splhigh();
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if(!_sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address)) {
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if(!_sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address)) {
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splx(s);
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return FALSE;
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return FALSE;
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}
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}
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@ -255,6 +260,8 @@ sd_read_block(void (*const pBuffer), const uint32_t address)
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// receive CRC16 and finish
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// receive CRC16 and finish
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_sd_read_stop(2);
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_sd_read_stop(2);
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splx(s);
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return sd_state.BlockLen;
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return sd_state.BlockLen;
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}
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}
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@ -269,7 +276,7 @@ sd_read_byte(void *pBuffer, const uint32_t address)
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uint32_t blAdr = address;
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uint32_t blAdr = address;
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uint16_t offset; // bytes from aligned address to start of first byte to keep
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uint16_t offset; // bytes from aligned address to start of first byte to keep
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// align
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// align
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offset = sd_AlignAddress(&blAdr);
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offset = sd_align_address(&blAdr);
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// start
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// start
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if(!_sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address)) {
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if(!_sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address)) {
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@ -277,7 +284,7 @@ sd_read_byte(void *pBuffer, const uint32_t address)
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}
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}
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// read
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// read
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Spi_read(pBuffer, offset + 1, FALSE);
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sdspi_read(pBuffer, offset + 1, FALSE);
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// done
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// done
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_sd_read_stop(sd_state.BlockLen - offset - 1);
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_sd_read_stop(sd_state.BlockLen - offset - 1);
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@ -302,11 +309,11 @@ sd_read(void *pBuffer, unsigned long address, unsigned int size)
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// parameter processing
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// parameter processing
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//
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//
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if(size == 0) {
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if(size == 0) {
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return FALSE;
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return 0;
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}
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}
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// align to block
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// align to block
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offset = sd_AlignAddress(&address);
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offset = sd_align_address(&address);
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if((offset == 0) && (sd_state.BlockLen == size)) {
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if((offset == 0) && (sd_state.BlockLen == size)) {
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// best case: perfectly block aligned, no chunking
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// best case: perfectly block aligned, no chunking
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@ -323,10 +330,14 @@ sd_read(void *pBuffer, unsigned long address, unsigned int size)
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// Data transfer
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// Data transfer
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//
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//
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s = splhigh(s);
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// request data transfer
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// request data transfer
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ret = _sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address);
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ret = _sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address);
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if(!ret) {
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RETF(ret);
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splx(s);
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return 0;
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}
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// run to offset
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// run to offset
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if(offset) {
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if(offset) {
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@ -377,7 +388,10 @@ sd_read(void *pBuffer, unsigned long address, unsigned int size)
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sdspi_unselect();
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sdspi_unselect();
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ret = _sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address);
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ret = _sd_read_start(SD_CMD_READ_SINGLE_BLOCK, address);
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RETF(ret);
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if(!ret) {
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splx(s);
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return 0;
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}
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} else {
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} else {
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// finished
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// finished
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_sd_read_stop(0);
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_sd_read_stop(0);
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@ -386,6 +400,8 @@ sd_read(void *pBuffer, unsigned long address, unsigned int size)
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}
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}
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} while(1);
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} while(1);
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splx(s);
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return num_bytes_read;
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return num_bytes_read;
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}
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}
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@ -409,11 +425,11 @@ _sd_write_finish(void)
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sdspi_dma_lock = FALSE;
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sdspi_dma_lock = FALSE;
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#endif
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#endif
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s = splhigh();
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// dummy crc
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// dummy crc
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sdspi_idle(2);
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sdspi_idle(2);
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s = splhigh();
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// receive data response (ZZS___ 3 bits crc response)
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// receive data response (ZZS___ 3 bits crc response)
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for(i = 0; i < SD_TIMEOUT_NCR; i++) {
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for(i = 0; i < SD_TIMEOUT_NCR; i++) {
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ret = sdspi_rx();
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ret = sdspi_rx();
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@ -426,10 +442,9 @@ _sd_write_finish(void)
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}
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}
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}
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}
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splx(s);
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// wait for data to be written
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// wait for data to be written
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_sd_wait_standby(NULL);
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_sd_wait_standby(NULL);
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splx(s);
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sdspi_unselect();
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sdspi_unselect();
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if(ret) {
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if(ret) {
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@ -494,21 +509,23 @@ _sd_write_block(const uint32_t * pAddress, const void *pBuffer, int increment)
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return SD_WRITE_COMMAND_ERR;
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return SD_WRITE_COMMAND_ERR;
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}
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}
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// write data
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// write data
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sdspi_select();
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s = splhigh();
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s = splhigh();
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sdspi_select();
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sdspi_tx(0xFF);
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sdspi_tx(0xFF);
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sdspi_tx(SD_TOKEN_WRITE);
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sdspi_tx(SD_TOKEN_WRITE);
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sdspi_write(pBuffer, sd_state.BlockLen, increment);
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sdspi_write(pBuffer, sd_state.BlockLen, increment);
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splx(s);
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SD_LED_WRITE_OFF;
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SD_LED_WRITE_OFF;
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// finish write
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// finish write
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#if SPI_DMA_WRITE
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#if SPI_DMA_WRITE
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sdspi_dma_lock = TRUE;
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sdspi_dma_lock = TRUE;
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splx(s);
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return SD_WRITE_SUCCESS;
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return SD_WRITE_SUCCESS;
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#else
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#else
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return _sd_write_finish();
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ret = _sd_write_finish();
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splx(s);
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return ret;
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#endif
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#endif
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}
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}
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@ -46,9 +46,9 @@ Berlin, 2007
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* @brief MMC-/SD-Card library, Public interface
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* @brief MMC-/SD-Card library, Public interface
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*
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*
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @version $Revision: 1.5 $
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* @version $Revision: 1.6 $
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*
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*
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* $Id: sd.h,v 1.5 2008/11/10 14:32:49 nvt-se Exp $
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* $Id: sd.h,v 1.6 2009/05/26 12:15:46 nvt-se Exp $
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*/
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*/
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/**
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/**
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@ -224,7 +224,7 @@ void sd_close(void);
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* 2^n value, where n shall be between 0 and 11.
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* 2^n value, where n shall be between 0 and 11.
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* Be aware that a card may or may not support different blocksizes.
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* Be aware that a card may or may not support different blocksizes.
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*
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*
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* Since all read and write operations have to use blockaligned addresses
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* Since all read and write operations have to use block-aligned addresses
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* and need to process complete blocks always try to use the optimal blocksize
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* and need to process complete blocks always try to use the optimal blocksize
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* and let ::sd_read do the rest. If the blocklength is already set to the new
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* and let ::sd_read do the rest. If the blocklength is already set to the new
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* value nothing is done.
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* value nothing is done.
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* @param[in,out] pAddress address to align, will be modified to be block aligned
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* @param[in,out] pAddress address to align, will be modified to be block aligned
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* @return Offset from aligned address to original address
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* @return Offset from aligned address to original address
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*/
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*/
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uint16_t sd_AlignAddress(uint32_t * pAddress);
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uint16_t sd_align_address(uint32_t * pAddress);
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/**
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/**
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* @brief Read one complete block from a block aligned address into buffer
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* @brief Read one complete block from a block aligned address into buffer
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@ -47,9 +47,9 @@ Berlin, 2007
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* @brief MMC-/SD-Card library, cached read and write
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* @brief MMC-/SD-Card library, cached read and write
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*
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*
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @version $Revision: 1.4 $
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* @version $Revision: 1.5 $
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*
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*
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* $Id: sd_cache.c,v 1.4 2008/03/31 14:32:00 nvt-se Exp $
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* $Id: sd_cache.c,v 1.5 2009/05/26 12:15:46 nvt-se Exp $
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*/
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*/
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@ -69,7 +69,7 @@ _sd_cache_init(void)
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sd_state.Cache->address = 1;
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sd_state.Cache->address = 1;
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sd_state.Cache->state = 0;
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sd_state.Cache->state = 0;
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// pre-read first block
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/* pre-read first block */
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sd_cache_read_block(&addr);
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sd_cache_read_block(&addr);
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SD_FREE_LOCK(sd_state.Cache);
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SD_FREE_LOCK(sd_state.Cache);
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}
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}
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uint16_t
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uint16_t
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sd_read(void *pBuffer, uint32_t address, uint16_t size)
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sd_read(void *pBuffer, uint32_t address, uint16_t size)
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{
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{
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uint16_t offset; // bytes from aligned address to start of first byte to keep
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uint16_t offset; /* bytes from aligned address to start of first byte to keep */
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char *p; // pointer to current pos in receive buffer
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char *p; /* pointer to current pos in receive buffer */
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uint16_t bytes_left; // num bytes to read
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uint16_t bytes_left; /* num bytes to read */
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uint16_t read_count; // num bytes to read from current block
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uint16_t read_count; /* num bytes to read from current block */
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// parameter processing
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/* parameter processing */
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p = (char *)pBuffer;
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p = (char *)pBuffer;
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bytes_left = size;
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bytes_left = size;
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// align to block
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/* align to block */
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offset = sd_AlignAddress(&address);
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offset = sd_align_address(&address);
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// Data transfer
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/* Data transfer */
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do {
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do {
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// calculate block
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/* calculate block */
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if((offset == 0) && (bytes_left >= sd_state.BlockLen)) {
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if((offset == 0) && (bytes_left >= sd_state.BlockLen)) {
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read_count = sd_state.BlockLen;
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read_count = sd_state.BlockLen;
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sd_read_block(p, address);
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sd_read_block(p, address);
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address += sd_state.BlockLen;
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address += sd_state.BlockLen;
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} while(1);
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} while(1);
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}
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}
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#endif // SD_READ_ANY
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#endif /* SD_READ_ANY */
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#if SD_WRITE
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#if SD_WRITE
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uint16_t
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uint16_t
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sd_write(uint32_t address, void *pBuffer, uint16_t size)
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sd_write(uint32_t address, void *pBuffer, uint16_t size)
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{
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{
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uint16_t offset; // bytes from aligned address to start of first byte to keep
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uint16_t offset; /* bytes from aligned address to start of first byte to keep */
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char *p; // pointer to current pos in receive buffer
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char *p; /* pointer to current pos in receive buffer */
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uint16_t bytes_left; // num bytes to read
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uint16_t bytes_left; /* num bytes to read */
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uint16_t read_count; // num bytes to read from current block
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uint16_t read_count; /* num bytes to read from current block */
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// parameter processing
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/* parameter processing */
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p = (char *)pBuffer;
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p = (char *)pBuffer;
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bytes_left = size;
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bytes_left = size;
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// align to block
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/* align to block */
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offset = sd_AlignAddress(&address);
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offset = sd_align_address(&address);
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sd_set_blocklength(SD_WRITE_BLOCKLENGTH_BIT);
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sd_set_blocklength(SD_WRITE_BLOCKLENGTH_BIT);
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// Data transfer
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/* Data transfer */
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do {
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do {
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// calculate block
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/* calculate block */
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if((offset == 0) && (bytes_left >= sd_state.BlockLen)) {
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if((offset == 0) && (bytes_left >= sd_state.BlockLen)) {
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read_count = sd_state.BlockLen;
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read_count = sd_state.BlockLen;
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sd_write_block(address, p);
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sd_write_block(address, p);
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@ -198,7 +198,7 @@ sd_write(uint32_t address, void *pBuffer, uint16_t size)
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} while(1);
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} while(1);
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}
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}
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#endif // SD_WRITE
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#endif /* SD_WRITE */
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#endif // SD_CACHE
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#endif /* SD_CACHE */
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/** @} */
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/** @} */
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@ -47,9 +47,9 @@ Berlin, 2007
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* @brief MMC-/SD-Card library, Block erase
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* @brief MMC-/SD-Card library, Block erase
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*
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*
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* @author Michael Baar <baar@inf.fu-berlin.de>
|
* @author Michael Baar <baar@inf.fu-berlin.de>
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* @version $Revision: 1.4 $
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* @version $Revision: 1.5 $
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*
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*
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* $Id: sd_erase.c,v 1.4 2008/05/27 13:01:27 nvt-se Exp $
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* $Id: sd_erase.c,v 1.5 2009/05/26 12:15:46 nvt-se Exp $
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*/
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*/
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/**
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/**
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|
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@ -47,9 +47,9 @@ Berlin, 2007
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* @brief MMC-/SD-Card library, Additional Information
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* @brief MMC-/SD-Card library, Additional Information
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*
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*
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @version $Revision: 1.3 $
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* @version $Revision: 1.4 $
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*
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*
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* $Id: sd_info.c,v 1.3 2008/03/28 23:03:05 nvt-se Exp $
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* $Id: sd_info.c,v 1.4 2009/05/26 12:15:46 nvt-se Exp $
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*/
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*/
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/**
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/**
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|
|
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@ -47,9 +47,9 @@ Berlin, 2007
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* @brief Serial Peripheral Interface for SD library
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* @brief Serial Peripheral Interface for SD library
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*
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*
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @author Michael Baar <baar@inf.fu-berlin.de>
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* @version $Revision: 1.3 $
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* @version $Revision: 1.4 $
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*
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*
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* $Id: sdspi.c,v 1.3 2009/05/25 13:19:04 nvt-se Exp $
|
* $Id: sdspi.c,v 1.4 2009/05/26 12:15:46 nvt-se Exp $
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*/
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*/
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#include <msp430x16x.h>
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#include <msp430x16x.h>
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|
@ -72,7 +72,8 @@ sdspi_init(void)
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sdspi_dma_lock = FALSE;
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sdspi_dma_lock = FALSE;
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
/* The 16-bit value of UxBR0+UxBR1 is the division factor of the USART clock
|
/*
|
||||||
|
* The 16-bit value of UxBR0+UxBR1 is the division factor of the USART clock
|
||||||
* source, BRCLK. The maximum baud rate that can be generated in master
|
* source, BRCLK. The maximum baud rate that can be generated in master
|
||||||
* mode is BRCLK/2. The maximum baud rate that can be generated in slave
|
* mode is BRCLK/2. The maximum baud rate that can be generated in slave
|
||||||
* mode is BRCLK. The modulator in the USART baud rate generator is not used
|
* mode is BRCLK. The modulator in the USART baud rate generator is not used
|
||||||
|
@ -102,9 +103,10 @@ sdspi_tx(register const uint8_t c)
|
||||||
void
|
void
|
||||||
sdspi_dma_wait(void)
|
sdspi_dma_wait(void)
|
||||||
{
|
{
|
||||||
|
/* Wait until a previous transfer is complete */
|
||||||
while(DMA0CTL & DMAEN) {
|
while(DMA0CTL & DMAEN) {
|
||||||
_NOP();
|
_NOP();
|
||||||
} // Wait until a previous transfer is complete
|
}
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
@ -118,29 +120,29 @@ sdspi_read(void *pDestination, const uint16_t size, const bool incDest)
|
||||||
#if SPI_DMA_READ
|
#if SPI_DMA_READ
|
||||||
sdspi_dma_wait();
|
sdspi_dma_wait();
|
||||||
|
|
||||||
UART_RESET_RXTX(); // clear interrupts
|
UART_RESET_RXTX(); /* clear interrupts */
|
||||||
|
|
||||||
// Configure the DMA transfer
|
/* Configure the DMA transfer */
|
||||||
DMA0SA = (uint16_t) & UART_RX; // source DMA address
|
DMA0SA = (uint16_t) & UART_RX; /* source DMA address */
|
||||||
DMA0DA = (uint16_t) pDestination; // destination DMA address
|
DMA0DA = (uint16_t) pDestination; /* destination DMA address */
|
||||||
DMA0SZ = size; // number of bytes to be transferred
|
DMA0SZ = size; /* number of bytes to be transferred */
|
||||||
DMA1SA = (uint16_t) & UART_TX; // source DMA address (constant 0xff)
|
DMA1SA = (uint16_t) & UART_TX; /* source DMA address (constant 0xff) */
|
||||||
DMA1DA = DMA1SA; // destination DMA address
|
DMA1DA = DMA1SA; /* destination DMA address */
|
||||||
DMA1SZ = size - 1; // number of bytes to be transferred
|
DMA1SZ = size - 1; /* number of bytes to be transferred */
|
||||||
DMACTL0 = DMA0TSEL_9 | DMA1TSEL_9; // trigger is UART1 receive for both DMA0 and DMA1
|
DMACTL0 = DMA0TSEL_9 | DMA1TSEL_9; /* trigger is UART1 receive for both DMA0 and DMA1 */
|
||||||
DMA0CTL = DMADT_0 | // Single transfer mode
|
DMA0CTL = DMADT_0 | /* Single transfer mode */
|
||||||
DMASBDB | // Byte mode
|
DMASBDB | /* Byte mode */
|
||||||
DMADSTINCR0 | DMADSTINCR1 | // Increment destination
|
DMADSTINCR0 | DMADSTINCR1 | /* Increment destination */
|
||||||
DMAEN; // Enable DMA
|
DMAEN; /* Enable DMA */
|
||||||
if(!incDest) {
|
if(!incDest) {
|
||||||
DMA0CTL &= ~(DMADSTINCR0 | DMADSTINCR1);
|
DMA0CTL &= ~(DMADSTINCR0 | DMADSTINCR1);
|
||||||
}
|
}
|
||||||
|
|
||||||
DMA1CTL = DMADT_0 | // Single transfer mode
|
DMA1CTL = DMADT_0 | /* Single transfer mode */
|
||||||
DMASBDB | // Byte mode
|
DMASBDB | /* Byte mode */
|
||||||
DMAEN; // Enable DMA
|
DMAEN; /* Enable DMA */
|
||||||
|
|
||||||
UART_TX = SPI_IDLE_SYMBOL; // Initiate transfer by sending the first byte
|
UART_TX = SPI_IDLE_SYMBOL; /* Initiate transfer by sending the first byte */
|
||||||
sdspi_dma_wait();
|
sdspi_dma_wait();
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
@ -171,17 +173,17 @@ sdspi_write(const void *pSource, const uint16_t size, const int increment)
|
||||||
#if SPI_DMA_WRITE
|
#if SPI_DMA_WRITE
|
||||||
sdspi_dma_wait();
|
sdspi_dma_wait();
|
||||||
|
|
||||||
UART_RESET_RXTX(); // clear interrupts
|
UART_RESET_RXTX(); /* clear interrupts */
|
||||||
|
|
||||||
// Configure the DMA transfer
|
/* Configure the DMA transfer */
|
||||||
DMA0SA = ((uint16_t) pSource) + 1; // source DMA address
|
DMA0SA = ((uint16_t) pSource) + 1; /* source DMA address */
|
||||||
DMA0DA = (uint16_t) & UART_TX; // destination DMA address
|
DMA0DA = (uint16_t) & UART_TX; /* destination DMA address */
|
||||||
DMA0SZ = size - 1; // number of bytes to be transferred
|
DMA0SZ = size - 1; /* number of bytes to be transferred */
|
||||||
DMACTL0 = DMA0TSEL_9; // trigger is UART1 receive
|
DMACTL0 = DMA0TSEL_9; /* trigger is UART1 receive */
|
||||||
DMA0CTL = DMADT_0 | // Single transfer mode
|
DMA0CTL = DMADT_0 | /* Single transfer mode */
|
||||||
DMASBDB | // Byte mode
|
DMASBDB | /* Byte mode */
|
||||||
DMASRCINCR_3 | // Increment source
|
DMASRCINCR_3 | /* Increment source */
|
||||||
DMAEN; // Enable DMA
|
DMAEN; /* Enable DMA */
|
||||||
if(increment == 0) {
|
if(increment == 0) {
|
||||||
DMA0CTL &= ~DMASRCINCR_3;
|
DMA0CTL &= ~DMASRCINCR_3;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Add table
Add a link
Reference in a new issue