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mc1322x: build fixes for uart2

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This commit is contained in:
Mariano Alvira 2011-07-08 19:38:31 -04:00
parent e2d74fa0a5
commit e80f9eb4b5
8 changed files with 124 additions and 51 deletions
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11
cpu/mc1322x/lib/include/uart.h
View file

@ -177,9 +177,18 @@ extern volatile uint32_t u1_rx_head, u1_rx_tail;
#endif
uint8_t uart1_getc(void);
extern volatile uint32_t u2_head, u2_tail;
#define UART2_TX_BUFFERSIZE 1024
extern volatile uint32_t u2_tx_head, u2_tx_tail;
void uart2_putc(char c);
#define UART2_RX_BUFFERSIZE 128
#if UART2_RX_BUFFERSIZE > 32
extern volatile uint32_t u2_rx_head, u2_rx_tail;
#define uart2_can_get() ((u2_rx_head!=u2_rx_tail) || (*UART2_URXCON > 0))
#else
#define uart2_can_get() (*UART2_URXCON > 0)
#endif
uint8_t uart2_getc(void);
#endif

4
cpu/mc1322x/lib/uart1.c
View file

@ -48,7 +48,7 @@ void uart1_isr(void) {
#if UART1_RX_BUFFERSIZE > 32
if (*UART1_USTAT & ( 1 << 6)) { //receive interrupt
while( *UART1_URXCON != 0 ) { //flush the hardware fifo into the software buffer
while( *UART1_URXCON != 0 ) { //flush the hardware fifo into the software buffer
uint32_t u1_rx_tail_next;
u1_rx_tail_next = u1_rx_tail+1;
if (u1_rx_tail_next >= sizeof(u1_rx_buf))
@ -62,7 +62,7 @@ void uart1_isr(void) {
}
#endif
while( *UART1_UTXCON != 0 ) {
while( *UART1_UTXCON != 0 ) {
if (u1_tx_head == u1_tx_tail) {
#if UART1_RX_BUFFERSIZE > 32
*UART1_UCON |= (1 << 13); /*disable tx interrupt */

84
cpu/mc1322x/lib/uart2.c
View file

@ -36,43 +36,91 @@
#include <mc1322x.h>
#include <stdint.h>
volatile char u2_tx_buf[64];
volatile uint32_t u2_head, u2_tail;
volatile char u2_tx_buf[UART2_TX_BUFFERSIZE];
volatile uint32_t u2_tx_head, u2_tx_tail;
#if UART2_RX_BUFFERSIZE > 32
volatile char u2_rx_buf[UART2_RX_BUFFERSIZE-32];
volatile uint32_t u2_rx_head, u2_rx_tail;
#endif
void uart2_isr(void) {
while( *UART1_UTXCON != 0 ) {
if (u2_head == u2_tail) {
#if UART2_RX_BUFFERSIZE > 32
if (*UART2_USTAT & ( 1 << 6)) { //receive interrupt
while( *UART2_URXCON != 0 ) { //flush the hardware fifo into the software buffer
uint32_t u2_rx_tail_next;
u2_rx_tail_next = u2_rx_tail+1;
if (u2_rx_tail_next >= sizeof(u2_rx_buf))
u2_rx_tail_next = 0;
if (u2_rx_head != u2_rx_tail_next) {
u2_rx_buf[u2_rx_tail]= *UART2_UDATA;
u2_rx_tail = u2_rx_tail_next;
}
}
return;
}
#endif
while( *UART2_UTXCON != 0 ) {
if (u2_tx_head == u2_tx_tail) {
#if UART2_RX_BUFFERSIZE > 32
*UART2_UCON |= (1 << 13); /*disable tx interrupt */
#else
disable_irq(UART2);
#endif
return;
}
*UART2_UDATA = u2_tx_buf[u2_tail];
u2_tail++;
if (u2_tail >= sizeof(u2_tx_buf))
u2_tail = 0;
*UART2_UDATA = u2_tx_buf[u2_tx_tail];
u2_tx_tail++;
if (u2_tx_tail >= sizeof(u2_tx_buf))
u2_tx_tail = 0;
}
}
void uart2_putc(char c) {
/* disable UART2 since */
/* UART2 isr modifies u2_head and u2_tail */
disable_irq(UART2);
/* UART2 isr modifies u2_tx_head and u2_tx_tail */
#if UART2_RX_BUFFERSIZE > 32
*UART2_UCON |= (1 << 13); /*disable tx interrupt */
#else
disable_irq(UART2);
#endif
if( (u2_head == u2_tail) &&
if( (u2_tx_head == u2_tx_tail) &&
(*UART2_UTXCON != 0)) {
*UART2_UDATA = c;
} else {
u2_tx_buf[u2_head] = c;
u2_head += 1;
if (u2_head >= sizeof(u2_tx_buf))
u2_head = 0;
if (u2_head == u2_tail) { /* drop chars when no room */
if (u2_head) { u2_head -=1; } else { u2_head = sizeof(u2_tx_buf); }
u2_tx_buf[u2_tx_head] = c;
u2_tx_head += 1;
if (u2_tx_head >= sizeof(u2_tx_buf))
u2_tx_head = 0;
if (u2_tx_head == u2_tx_tail) { /* drop chars when no room */
if (u2_tx_head) { u2_tx_head -=1; } else { u2_tx_head = sizeof(u2_tx_buf); }
}
enable_irq(UART1);
#if UART2_RX_BUFFERSIZE > 32
*UART2_UCON &= ~(1 << 13); /*enable tx interrupt */
#else
enable_irq(UART2);
#endif
}
}
uint8_t uart2_getc(void) {
#if UART2_RX_BUFFERSIZE > 32
/* First pull from the ram buffer */
uint8_t c=0;
if (u2_rx_head != u2_rx_tail) {
c = u2_rx_buf[u2_rx_head++];
if (u2_rx_head >= sizeof(u2_rx_buf))
u2_rx_head=0;
return c;
}
#endif
/* Then pull from the hardware fifo */
while(uart2_can_get() == 0) { continue; }
return *UART2_UDATA;
}

42
cpu/mc1322x/src/default_lowlevel.c
View file

@ -94,31 +94,47 @@ void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t s
void uart2_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
/* UART must be disabled to set the baudrate */
/* UART must be disabled to set the baudrate */
UART2->CON = 0;
UART2->BR = ( inc << 16 ) | mod;
/* TX and CTS as outputs */
GPIO->PAD_DIR_SET.GPIO_14 = 1;
GPIO->PAD_DIR_SET.GPIO_16 = 1;
/* RX and RTS as inputs */
GPIO->PAD_DIR_RESET.GPIO_15 = 1;
GPIO->PAD_DIR_RESET.GPIO_17 = 1;
/* see Section 11.5.1.2 Alternate Modes */
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
/* From the datasheet: "The peripheral function will control operation of the pad IF */
/* THE PERIPHERAL IS ENABLED. Can override with U2_ENABLE_DEFAULT. */
UART2->CON = (1 << 0) | (1 << 1); /* enable receive, transmit */
/* THE PERIPHERAL IS ENABLED. */
#if UART2_RX_BUFFERSIZE > 32
*UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
*UART2_URXCON = 30; /* interrupt when fifo is nearly full */
u2_rx_head = 0; u2_rx_tail = 0;
#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
*UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
#else
*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
#endif
if(samp == UCON_SAMP_16X)
set_bit(*UART2_UCON, samp);
set_bit(*UART2_UCON,UCON_SAMP);
/* set GPIO18-19 to UART (UART2 TX and RX)*/
GPIO->FUNC_SEL.GPIO_18 = 1;
GPIO->FUNC_SEL.GPIO_19 = 1;
/* set GPIO15-14 to UART (UART2 TX and RX)*/
GPIO->FUNC_SEL.GPIO_14 = 1;
GPIO->FUNC_SEL.GPIO_15 = 1;
/* interrupt when there are this number or more bytes free in the TX buffer*/
UART2->TXCON = 16;
UART2->RXCON = 16;
*UART2_UTXCON = 16;
u2_tx_head = 0; u2_tx_tail = 0;
u2_head = 0; u2_tail = 0;
/* tx and rx interrupts are enabled in the UART by default */
/* see status register bits 13 and 14 */
/* enable UART2 interrupts in the interrupt controller */
enable_irq(UART2);
}

4
platform/redbee-dev/contiki-conf.h
View file

@ -67,10 +67,10 @@
#define CLIF
/* Baud rate */
#define MOD 9999
#define BRMOD 9999
/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
#define INC 767
#define BRINC 767
/* 921600 bps, MOD=9999, 24Mhz 16x samp */
//#define INC 3071
#define SAMP UCON_SAMP_8X

2
platform/redbee-dev/contiki-mc1322x-main.c
View file

@ -196,7 +196,7 @@ init_lowlevel(void)
trim_xtal();
/* uart init */
uart_init(INC, MOD, SAMP);
uart_init(BRINC, BRMOD, SAMP);
default_vreg_init();

6
platform/redbee-econotag/contiki-conf.h
View file

@ -67,12 +67,12 @@
#define CLIF
/* Baud rate */
#define MOD 9999
#define BRMOD 9999
/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
#define INC 767
#define BRINC 767
/* 921600 bps, MOD=9999, 24Mhz 16x samp */
//#define INC 3071
//#define BRINC 3071
#define SAMP UCON_SAMP_8X
//#define SAMP UCON_SAMP_16X

4
platform/redbee-econotag/contiki-mc1322x-main.c
View file

@ -48,7 +48,7 @@
#include "lib/random.h"
#include "net/netstack.h"
#include "net/mac/frame802154.h"
#include "lib/include/uart1.h"
#include "lib/include/mc1322x.h"
#if WITH_UIP6
#include "net/sicslowpan.h"
@ -181,7 +181,7 @@ init_lowlevel(void)
trim_xtal();
/* uart init */
uart_init(INC, MOD, SAMP);
uart_init(BRINC, BRMOD, SAMP);
default_vreg_init();