mc1322x: build fixes for uart2
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8 changed files with 124 additions and 51 deletions
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@ -93,32 +93,48 @@ void uart1_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t s
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}
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void uart2_init(volatile uint16_t inc, volatile uint16_t mod, volatile uint8_t samp) {
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/* UART must be disabled to set the baudrate */
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UART2->CON = 0;
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UART2->BR = ( inc << 16 ) | mod;
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/* TX and CTS as outputs */
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GPIO->PAD_DIR_SET.GPIO_14 = 1;
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GPIO->PAD_DIR_SET.GPIO_16 = 1;
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/* UART must be disabled to set the baudrate */
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UART2->CON = 0;
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UART2->BR = ( inc << 16 ) | mod;
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/* RX and RTS as inputs */
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GPIO->PAD_DIR_RESET.GPIO_15 = 1;
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GPIO->PAD_DIR_RESET.GPIO_17 = 1;
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/* see Section 11.5.1.2 Alternate Modes */
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/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
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/* From the datasheet: "The peripheral function will control operation of the pad IF */
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/* THE PERIPHERAL IS ENABLED. Can override with U2_ENABLE_DEFAULT. */
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UART2->CON = (1 << 0) | (1 << 1); /* enable receive, transmit */
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/* THE PERIPHERAL IS ENABLED. */
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#if UART2_RX_BUFFERSIZE > 32
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*UART2_UCON = (1 << 0) | (1 << 1) ; /* enable receive, transmit, and both interrupts */
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*UART2_URXCON = 30; /* interrupt when fifo is nearly full */
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u2_rx_head = 0; u2_rx_tail = 0;
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#elif UART2_RX_BUFFERSIZE < 32 /* enable receive, transmit, flow control, disable rx interrupt */
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*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 12) | (1 << 14);
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*UART2_UCTS = UART2_RX_BUFFERSIZE; /* drop cts when tx buffer at trigger level */
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*GPIO_FUNC_SEL1 = ( (0x01 << (0*2)) | (0x01 << (1*2)) ); /* set GPIO17-16 to UART2 CTS and RTS */
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#else
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*UART2_UCON = (1 << 0) | (1 << 1) | (1 << 14); /* enable receive, transmit, disable rx interrupt */
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#endif
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if(samp == UCON_SAMP_16X)
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set_bit(*UART2_UCON, samp);
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set_bit(*UART2_UCON,UCON_SAMP);
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/* set GPIO15-14 to UART (UART2 TX and RX)*/
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GPIO->FUNC_SEL.GPIO_14 = 1;
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GPIO->FUNC_SEL.GPIO_15 = 1;
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/* set GPIO18-19 to UART (UART2 TX and RX)*/
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GPIO->FUNC_SEL.GPIO_18 = 1;
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GPIO->FUNC_SEL.GPIO_19 = 1;
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/* interrupt when there are this number or more bytes free in the TX buffer*/
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UART2->TXCON = 16;
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UART2->RXCON = 16;
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*UART2_UTXCON = 16;
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u2_tx_head = 0; u2_tx_tail = 0;
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u2_head = 0; u2_tail = 0;
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/* tx and rx interrupts are enabled in the UART by default */
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/* see status register bits 13 and 14 */
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/* enable UART2 interrupts in the interrupt controller */
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enable_irq(UART2);
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}
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