new uart_init and uart_setbaud
This commit is contained in:
parent
4d4b09f7ff
commit
e7e149d354
21 changed files with 160 additions and 32 deletions
|
@ -152,6 +152,8 @@ static volatile struct UART_struct * const UART2 = (void *) (UART2_BASE);
|
||||||
|
|
||||||
#endif /* REG_NO_COMPAT */
|
#endif /* REG_NO_COMPAT */
|
||||||
|
|
||||||
|
void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud);
|
||||||
|
|
||||||
extern volatile uint32_t u1_head, u1_tail;
|
extern volatile uint32_t u1_head, u1_tail;
|
||||||
void uart1_putc(char c);
|
void uart1_putc(char c);
|
||||||
#define uart1_can_get() (*UART1_URXCON > 0)
|
#define uart1_can_get() (*UART1_URXCON > 0)
|
||||||
|
|
117
lib/uart.c
Normal file
117
lib/uart.c
Normal file
|
@ -0,0 +1,117 @@
|
||||||
|
/*
|
||||||
|
* Copyright (c) 2010, Mariano Alvira <mar@devl.org> and other contributors
|
||||||
|
* to the MC1322x project (http://mc1322x.devl.org)
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
* 1. Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* 2. Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in the
|
||||||
|
* documentation and/or other materials provided with the distribution.
|
||||||
|
* 3. Neither the name of the Institute nor the names of its contributors
|
||||||
|
* may be used to endorse or promote products derived from this software
|
||||||
|
* without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||||
|
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||||
|
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||||
|
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||||
|
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||||
|
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||||
|
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||||
|
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||||
|
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||||
|
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||||
|
* SUCH DAMAGE.
|
||||||
|
*
|
||||||
|
* This file is part of libmc1322x: see http://mc1322x.devl.org
|
||||||
|
* for details.
|
||||||
|
*
|
||||||
|
*
|
||||||
|
*/
|
||||||
|
|
||||||
|
#include <mc1322x.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
|
||||||
|
#define MOD 9999
|
||||||
|
#define CLK 24000000
|
||||||
|
#define DIV 16 /* uart->CON.XTIM = 0 is 16x oversample (datasheet is incorrect) */
|
||||||
|
|
||||||
|
#include <stdio.h>
|
||||||
|
void uart_setbaud(volatile struct UART_struct * uart, uint32_t baud) {
|
||||||
|
uint64_t inc;
|
||||||
|
|
||||||
|
/* baud rate eqn from reference manual */
|
||||||
|
/* multiply by an additional 10 to do a fixed point round later */
|
||||||
|
inc = ((uint64_t) baud * DIV * MOD * 10 / CLK ) - 10 ;
|
||||||
|
/* add 5 and divide by 10 to get a rounding */
|
||||||
|
inc = (inc + 5) / 10;
|
||||||
|
|
||||||
|
/* UART must be disabled to set the baudrate */
|
||||||
|
uart->CONbits = (struct UART_CON) {
|
||||||
|
.TXE = 0,
|
||||||
|
.RXE = 0,
|
||||||
|
};
|
||||||
|
|
||||||
|
uart->BR = ( (uint16_t)inc << 16 ) | MOD;
|
||||||
|
|
||||||
|
uart->CONbits = (struct UART_CON) {
|
||||||
|
.XTIM = 0,
|
||||||
|
.TXE = 1,
|
||||||
|
.RXE = 1,
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
void uart_init(volatile struct UART_struct * uart) {
|
||||||
|
/* enable the uart so we can set the gpio mode */
|
||||||
|
/* see Section 11.5.1.2 Alternate Modes */
|
||||||
|
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
|
||||||
|
/* From the datasheet: "The peripheral function will control operation of the pad IF */
|
||||||
|
/* THE PERIPHERAL IS ENABLED. */
|
||||||
|
uart->CONbits = (struct UART_CON) {
|
||||||
|
.TXE = 1,
|
||||||
|
.RXE = 1,
|
||||||
|
};
|
||||||
|
/* interrupt when there are this number or more bytes free in the TX buffer*/
|
||||||
|
uart->TXCON = 16;
|
||||||
|
|
||||||
|
if( uart == UART1 ) {
|
||||||
|
/* TX and CTS as outputs */
|
||||||
|
GPIO->PAD_DIR_SET.GPIO_14 = 1;
|
||||||
|
GPIO->PAD_DIR_SET.GPIO_16 = 1;
|
||||||
|
|
||||||
|
/* RX and RTS as inputs */
|
||||||
|
GPIO->PAD_DIR_RESET.GPIO_15 = 1;
|
||||||
|
GPIO->PAD_DIR_RESET.GPIO_17 = 1;
|
||||||
|
|
||||||
|
/* set GPIO15-14 to UART (UART1 TX and RX)*/
|
||||||
|
GPIO->FUNC_SEL.GPIO_14 = 1;
|
||||||
|
GPIO->FUNC_SEL.GPIO_15 = 1;
|
||||||
|
|
||||||
|
u1_head = 0; u1_tail = 0;
|
||||||
|
|
||||||
|
/* tx and rx interrupts are enabled in the UART by default */
|
||||||
|
/* see status register bits 13 and 14 */
|
||||||
|
/* enable UART1 interrupts in the interrupt controller */
|
||||||
|
enable_irq(UART1);
|
||||||
|
|
||||||
|
} else {
|
||||||
|
/* do the same as above but for UART2 */
|
||||||
|
GPIO->PAD_DIR_SET.GPIO_18 = 1;
|
||||||
|
GPIO->PAD_DIR_SET.GPIO_19 = 1;
|
||||||
|
|
||||||
|
GPIO->PAD_DIR_RESET.GPIO_20 = 1;
|
||||||
|
GPIO->PAD_DIR_RESET.GPIO_21 = 1;
|
||||||
|
|
||||||
|
GPIO->FUNC_SEL.GPIO_18 = 1;
|
||||||
|
GPIO->FUNC_SEL.GPIO_19 = 1;
|
||||||
|
|
||||||
|
u2_head = 0; u2_tail = 0;
|
||||||
|
|
||||||
|
enable_irq(UART2);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
|
@ -45,7 +45,8 @@ int main(void)
|
||||||
uint8_t c;
|
uint8_t c;
|
||||||
|
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
uart1_init(INC,MOD,SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
adc_init();
|
adc_init();
|
||||||
|
|
||||||
printf("adc test\r\n");
|
printf("adc test\r\n");
|
||||||
|
|
|
@ -52,7 +52,8 @@ void main(void) {
|
||||||
/* trim the reference osc. to 24MHz */
|
/* trim the reference osc. to 24MHz */
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_setbaud(UART1, 115200);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
||||||
|
|
|
@ -64,7 +64,8 @@ void main(void) {
|
||||||
/* trim the reference osc. to 24MHz */
|
/* trim the reference osc. to 24MHz */
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
||||||
|
|
|
@ -99,7 +99,8 @@ void main(void) {
|
||||||
/* trim the reference osc. to 24MHz */
|
/* trim the reference osc. to 24MHz */
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
||||||
|
|
|
@ -36,19 +36,6 @@
|
||||||
#ifndef CONFIG_H
|
#ifndef CONFIG_H
|
||||||
#define CONFIG_H
|
#define CONFIG_H
|
||||||
|
|
||||||
/* Baud rate */
|
|
||||||
#define MOD 9999
|
|
||||||
/* 230400 bps, INC=767, MOD=9999, 24Mhz 16x samp */
|
|
||||||
/* 115200 bps, INC=767, MOD=9999, 24Mhz 8x samp */
|
|
||||||
#define INC 767
|
|
||||||
/* 921600 bps, MOD=9999, 24Mhz 16x samp */
|
|
||||||
//#define INC 3071
|
|
||||||
#define SAMP UCON_SAMP_8X
|
|
||||||
//#define SAMP UCON_SAMP_16X
|
|
||||||
|
|
||||||
/* use uart1 for console */
|
|
||||||
#define uart_init uart1_init
|
|
||||||
|
|
||||||
/* nvm interface */
|
/* nvm interface */
|
||||||
#define NVM_INTERFACE gNvmInternalInterface_c
|
#define NVM_INTERFACE gNvmInternalInterface_c
|
||||||
/*#define NVM_INTERFACE gNvmExternalInterface_c */
|
/*#define NVM_INTERFACE gNvmExternalInterface_c */
|
||||||
|
|
|
@ -84,8 +84,9 @@ void main(void) {
|
||||||
volatile uint32_t state = SCAN_X;
|
volatile uint32_t state = SCAN_X;
|
||||||
volatile uint32_t addr,data;
|
volatile uint32_t addr,data;
|
||||||
|
|
||||||
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
|
||||||
disable_irq(UART1);
|
disable_irq(UART1);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
|
@ -46,7 +46,8 @@ void main(void) {
|
||||||
uint32_t buf[READ_NBYTES/4];
|
uint32_t buf[READ_NBYTES/4];
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
print_welcome("nvm-read");
|
print_welcome("nvm-read");
|
||||||
|
|
||||||
|
|
|
@ -46,7 +46,8 @@ void main(void) {
|
||||||
uint32_t buf[WRITE_NBYTES/4];
|
uint32_t buf[WRITE_NBYTES/4];
|
||||||
uint32_t i;
|
uint32_t i;
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
print_welcome("nvm-write");
|
print_welcome("nvm-write");
|
||||||
|
|
||||||
|
|
|
@ -117,7 +117,8 @@ void main(void) {
|
||||||
/* trim the reference osc. to 24MHz */
|
/* trim the reference osc. to 24MHz */
|
||||||
pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS);
|
pack_XTAL_CNTL(CTUNE_4PF, CTUNE, FTUNE, IBIAS);
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
||||||
|
|
|
@ -65,6 +65,8 @@ size_t fwrite(const void *ptr, size_t size, size_t nmemb,
|
||||||
}
|
}
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
int main(void)
|
int main(void)
|
||||||
{
|
{
|
||||||
char *ptr = "Hello world!";
|
char *ptr = "Hello world!";
|
||||||
|
@ -74,7 +76,8 @@ int main(void)
|
||||||
int mi;
|
int mi;
|
||||||
// char buf[80];
|
// char buf[80];
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_setbaud(UART1, 115200);
|
||||||
|
|
||||||
print_size(int8_t);
|
print_size(int8_t);
|
||||||
print_size(uint8_t);
|
print_size(uint8_t);
|
||||||
|
|
|
@ -46,7 +46,8 @@ int main(void)
|
||||||
int x = 32768;
|
int x = 32768;
|
||||||
|
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
uart1_init(INC,MOD,SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
rtc_init();
|
rtc_init();
|
||||||
|
|
||||||
printf("pwm test\r\n");
|
printf("pwm test\r\n");
|
||||||
|
|
|
@ -62,7 +62,8 @@ void main(void) {
|
||||||
/* trim the reference osc. to 24MHz */
|
/* trim the reference osc. to 24MHz */
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
||||||
|
|
|
@ -70,7 +70,8 @@ void main(void) {
|
||||||
/* trim the reference osc. to 24MHz */
|
/* trim the reference osc. to 24MHz */
|
||||||
trim_xtal();
|
trim_xtal();
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
vreg_init();
|
vreg_init();
|
||||||
|
|
||||||
|
|
|
@ -42,7 +42,8 @@
|
||||||
void main(void) {
|
void main(void) {
|
||||||
volatile uint8_t *data;
|
volatile uint8_t *data;
|
||||||
|
|
||||||
uart_init(INC, MOD, SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
for(data = DUMP_BASE; data < ((uint8_t *)(DUMP_BASE+DUMP_LEN)); data++) {
|
for(data = DUMP_BASE; data < ((uint8_t *)(DUMP_BASE+DUMP_LEN)); data++) {
|
||||||
uart1_putc(*data);
|
uart1_putc(*data);
|
||||||
|
|
|
@ -41,7 +41,8 @@
|
||||||
|
|
||||||
void main(void) {
|
void main(void) {
|
||||||
|
|
||||||
uart_init(INC,MOD,SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
*mem32(0x00401ffc) = 0x01234567;
|
*mem32(0x00401ffc) = 0x01234567;
|
||||||
*mem32(0x00407ffc) = 0xdeadbeef;
|
*mem32(0x00407ffc) = 0xdeadbeef;
|
||||||
|
|
|
@ -41,8 +41,10 @@
|
||||||
|
|
||||||
void main(void) {
|
void main(void) {
|
||||||
|
|
||||||
uart1_init(INC,MOD,SAMP);
|
uart_init(UART1);
|
||||||
uart2_init(INC,MOD,SAMP);
|
uart_init(UART2);
|
||||||
|
uart_setbaud(UART1, 115200);
|
||||||
|
uart_setbaud(UART2, 115200);
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
if(uart1_can_get()) {
|
if(uart1_can_get()) {
|
||||||
|
|
|
@ -41,7 +41,9 @@
|
||||||
|
|
||||||
void main(void) {
|
void main(void) {
|
||||||
|
|
||||||
uart1_init(INC,MOD,SAMP);
|
// uart1_init(INC,MOD,SAMP);
|
||||||
|
uart_init(UART1);
|
||||||
|
uart_setbaud(UART1, 1200);
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
if(uart1_can_get()) {
|
if(uart1_can_get()) {
|
||||||
|
|
|
@ -46,7 +46,8 @@
|
||||||
void main(void) {
|
void main(void) {
|
||||||
volatile uint32_t i;
|
volatile uint32_t i;
|
||||||
|
|
||||||
uart1_init(INC,MOD,SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
printf("reset\n\r");
|
printf("reset\n\r");
|
||||||
|
|
||||||
|
|
|
@ -48,7 +48,8 @@ int main(void)
|
||||||
ctune = 0;
|
ctune = 0;
|
||||||
ftune = 0;
|
ftune = 0;
|
||||||
|
|
||||||
uart1_init(INC,MOD,SAMP);
|
uart_init(UART1);
|
||||||
|
uart_init(UART1, 115200);
|
||||||
|
|
||||||
print_welcome("pwm test\r\n");
|
print_welcome("pwm test\r\n");
|
||||||
pack_XTAL_CNTL(ctune_4pf, ctune, ftune, IBIAS);
|
pack_XTAL_CNTL(ctune_4pf, ctune, ftune, IBIAS);
|
||||||
|
|
Loading…
Add table
Reference in a new issue