Generic Cirrus Logic CS8900A driver for cc65 targets. The driver is intended to be loaded dynamically as relocatable module. It modifies itself to accomodate different Ethernet IO address locations:
- C64 TFE ($DE00) - C64 RRNet ($DE08) - Apple2 Uther ($C0x0)
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oliverschmidt
parent
9a96dbca03
commit
e6e6ea415c
364
cpu/6502/net/cs8900a.S
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364
cpu/6502/net/cs8900a.S
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;
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; Copyright (c) 2007, Adam Dunkels and Oliver Schmidt
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; All rights reserved.
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;
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; Redistribution and use in source and binary forms, with or without
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; modification, are permitted provided that the following conditions
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; are met:
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; 1. Redistributions of source code must retain the above copyright
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; notice, this list of conditions and the following disclaimer.
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; 2. Redistributions in binary form must reproduce the above copyright
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; notice, this list of conditions and the following disclaimer in the
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; documentation and/or other materials provided with the distribution.
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; 3. Neither the name of the Institute nor the names of its contributors
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; may be used to endorse or promote products derived from this software
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; without specific prior written permission.
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;
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; THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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; ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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; IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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; ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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; FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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; DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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; OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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; HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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; LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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; OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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; SUCH DAMAGE.
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;
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; This file is part of the Contiki operating system.
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;
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; Author: Adam Dunkels <adam@sics.se>, Oliver Schmidt <ol.sc@web.de>
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;
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; $Id: cs8900a.S,v 1.1 2007/11/19 23:14:14 oliverschmidt Exp $
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;
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;---------------------------------------------------------------------
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.segment "JUMPTABLE"
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; Driver signature
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.byte $65, $74, $68 ; "eth"
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.byte $01 ; Ethernet driver API version number
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; Ethernet address
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mac: .byte $00, $0E, $3A ; OUI of Cirrus Logic
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.byte $11, $11, $11
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; Buffer attributes
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bufaddr:.res 2 ; Address
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bufsize:.res 2 ; Size
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; Jump table.
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.addr init
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.addr poll
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.addr send
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.addr exit
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;---------------------------------------------------------------------
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.zeropage
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sp: .res 2 ; Stack pointer (Do not trash !)
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reg: .res 2 ; Address of rxtxreg
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ptr: .res 2 ; Indirect addressing pointer
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len: .res 2 ; Frame length
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cnt: .res 2 ; Frame length counter
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;---------------------------------------------------------------------
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.segment "EXTZP": zeropage
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; Empty segment to avoid linker warnings
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;---------------------------------------------------------------------
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.rodata
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fixup: .byte fixup02-fixup01, fixup03-fixup02, fixup04-fixup03
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.byte fixup05-fixup04, fixup06-fixup05, fixup07-fixup06
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.byte fixup08-fixup07, fixup09-fixup08, fixup10-fixup09
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.byte fixup11-fixup10, fixup12-fixup11, fixup13-fixup12
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.byte fixup14-fixup13, fixup15-fixup14, fixup16-fixup15
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.byte fixup17-fixup16, fixup18-fixup17, fixup19-fixup18
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.byte fixup20-fixup19, fixup21-fixup20, fixup22-fixup21
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.byte fixup23-fixup22, fixup24-fixup23, fixup25-fixup24
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.byte fixup26-fixup25, fixup27-fixup26, fixup28-fixup27
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.byte fixup29-fixup28, fixup30-fixup29, fixup31-fixup30
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.byte fixup32-fixup31, fixup33-fixup32, fixup34-fixup33
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.byte fixup35-fixup34, fixup36-fixup35, fixup37-fixup36
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.byte fixup38-fixup37, fixup39-fixup38, fixup40-fixup39
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.byte fixup41-fixup40, fixup42-fixup41, fixup43-fixup42
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.byte fixup44-fixup43, fixup45-fixup44, fixup46-fixup45
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fixups = * - fixup
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;---------------------------------------------------------------------
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rxtxreg := $FF00 ; High byte patched at runtime
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txcmd := $FF04 ; High byte patched at runtime
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txlen := $FF06 ; High byte patched at runtime
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packetpp := $FF0A ; High byte patched at runtime
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ppdata := $FF0C ; High byte patched at runtime
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.data
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;---------------------------------------------------------------------
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init:
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; Save address of rxtxreg
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sta reg
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stx reg+1
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; Start with first fixup location
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lda #<(fixup01+1)
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ldx #>(fixup01+1)
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sta ptr
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stx ptr+1
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ldx #$FF
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ldy #$00
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; Fixup address at location
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: lda reg
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eor (ptr),y ; Use XOR to support C64 RRNet
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sta (ptr),y
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iny
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lda reg+1
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sta (ptr),y
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dey
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; Advance to next fixup location
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inx
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cpx #fixups
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bcs :+
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lda ptr
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clc
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adc fixup,x
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sta ptr
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bcc :-
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inc ptr+1
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bcs :- ; Always
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; Turn on transmission and reception of frames
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; PACKETPP = $0112, PPDATA = $00C0
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: lda #$12
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ldx #$01
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fixup01:sta packetpp
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fixup02:stx packetpp+1
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lda #$C0
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ldx #$00
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fixup03:sta ppdata
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fixup04:stx ppdata+1
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; Accept valid unicast + broadcast frames
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; PACKETPP = $0104, PPDATA = $0D05
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lda #$04
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ldx #$01
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fixup05:sta packetpp
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fixup06:stx packetpp+1
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lda #$05
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ldx #$0D
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fixup07:sta ppdata
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fixup08:stx ppdata+1
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; Set MAC address
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; PACKETPP = $0158, PPDATA = MAC[0], MAC[1]
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lda #$58
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ldx #$01
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fixup09:sta packetpp
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fixup10:stx packetpp+1
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lda mac
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ldx mac+1
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fixup11:sta ppdata
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fixup12:stx ppdata+1
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; PACKETPP = $015A, PPDATA = MAC[2], MAC[3]
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lda #$5A
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ldx #$01
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fixup13:sta packetpp
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fixup14:stx packetpp+1
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lda mac+2
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ldx mac+3
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fixup15:sta ppdata
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fixup16:stx ppdata+1
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; PACKETPP = 0x015C, PPDATA = MAC[4], MAC[5]
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lda #$5C
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ldx #$01
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fixup17:sta packetpp
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fixup18:stx packetpp+1
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lda mac+4
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ldx mac+5
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fixup19:sta ppdata
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fixup20:stx ppdata+1
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rts
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;---------------------------------------------------------------------
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poll:
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; Check receiver event register to see if there
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; are any valid unicast frames avaliable
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; PACKETPP = $0124, PPDATA & $0D00 ?
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lda #$24
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ldx #$01
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fixup21:sta packetpp
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fixup22:stx packetpp+1
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fixup23:lda ppdata+1
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and #$0D
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bne :+
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; No frame ready
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tax
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rts
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; Process the incoming frame
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; --------------------------
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; Read receiver event and discard it
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; RXTXREG
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:
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fixup24:ldx rxtxreg+1
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fixup25:lda rxtxreg
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; Read frame length
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; cnt = len = RXTXREG
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fixup26:ldx rxtxreg+1
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fixup27:lda rxtxreg
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sta len
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stx len+1
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sta cnt
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stx cnt+1
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; Adjust odd frame length
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lsr
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bcc :+
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inc cnt
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bne :+
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inc cnt+1
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; Is cnt > bufsize ?
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: sec
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lda cnt
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sbc bufsize
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lda cnt+1
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sbc bufsize+1
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bcc :+
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; Yes, skip frame
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; PACKETPP = $0102, PPDATA = PPDATA | $0040
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lda #$02
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ldx #$01
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fixup28:sta packetpp
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fixup29:stx packetpp+1
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fixup30:lda ppdata
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ora #$40
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fixup31:sta ppdata
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; No frame ready
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lda #$00
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tax
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rts
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; Read bytes into buffer
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: lda bufaddr
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ldx bufaddr+1
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sta ptr
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stx ptr+1
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ldy #$00
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read:
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fixup32:lda rxtxreg
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sta (ptr),y
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iny
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fixup33:lda rxtxreg+1
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sta (ptr),y
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iny
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bne :+
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inc ptr+1
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: cpy cnt
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bne read
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dec cnt+1
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bpl read
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; Return frame length
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lda len
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ldx len+1
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rts
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;---------------------------------------------------------------------
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send:
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; Save frame length
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sta cnt
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stx cnt+1
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; Transmit command
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lda #$C0
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ldx #$00
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fixup34:sta txcmd
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fixup35:stx txcmd+1
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lda cnt
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ldx cnt+1
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fixup36:sta txlen
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fixup37:stx txlen+1
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; Adjust odd frame length
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lsr
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bcc :+
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inc cnt
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bne :+
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inc cnt+1
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; 8 retries
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: ldy #$08
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; Check for avaliable buffer space
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; PACKETPP = $0138, PPDATA & $0100 ?
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: lda #$38
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ldx #$01
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fixup38:sta packetpp
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fixup39:stx packetpp+1
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fixup40:lda ppdata+1
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and #$01
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bne :+
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; No space avaliable, skip a received frame
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; PACKETPP = $0102, PPDATA = PPDATA | $0040
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lda #$02
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ldx #$01
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fixup41:sta packetpp
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fixup42:stx packetpp+1
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fixup43:lda ppdata
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ora #$40
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fixup44:sta ppdata
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; And try again
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dey
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bne :-
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rts
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; Send the frame
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; --------------
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; Write bytes from buffer
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: lda bufaddr
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ldx bufaddr+1
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sta ptr
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stx ptr+1
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ldy #$00
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write: lda (ptr),y
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fixup45:sta rxtxreg
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iny
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lda (ptr),y
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fixup46:sta rxtxreg+1
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iny
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bne :+
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inc ptr+1
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: cpy cnt
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bne write
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dec cnt+1
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bpl write
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rts
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;---------------------------------------------------------------------
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exit:
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rts
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;---------------------------------------------------------------------
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