Add stk500 platform and changes suggested by Daniel Willmann
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16 changed files with 945 additions and 45 deletions
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@ -148,6 +148,102 @@
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TIMSK0 = _BV (OCIE0A);
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#endif /* AVR_CONF_USE32KCRYSTAL */
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#elif defined (__AVR_ATmega644__) || defined (__AVR_ATmega328P__)
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#define OCRSetup() \
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/* Set counter to zero */ \
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TCNT0 = 0; \
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\
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/* \
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* Set comparison register: \
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* Crystal freq. is 8000000,\
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* pre-scale factor is 256, i.e. we have 125 "ticks" / sec: \
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* 8000000 = 256 * 250 * 125 \
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*/ \
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OCR0A = 250; \
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\
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/* \
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* Set timer control register: \
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* - prescale: 256 (CS02) \
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* - counter reset via comparison register (WGM01) \
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*/ \
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TCCR0A = _BV(WGM01); \
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TCCR0B = _BV(CS02); \
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\
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/* Clear interrupt flag register */ \
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TIFR0 = 0x00; \
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\
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/* \
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* Raise interrupt when value in OCR0 is reached. Note that the \
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* counter value in TCNT0 is cleared automatically. \
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*/ \
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TIMSK0 = _BV (OCIE0A);
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#define AVR_OUTPUT_COMPARE_INT TIMER0_COMPA_vect
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#elif defined (__AVR_ATmega8515__) || defined (__AVR_ATmega16__) || defined (__AVR_ATmega32__)
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#define AVR_OUTPUT_COMPARE_INT TIMER0_COMP_vect
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#define OCRSetup() \
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/* Set counter to zero */ \
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TCNT0 = 0; \
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\
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/* \
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* Set comparison register: \
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* Crystal freq. is 8000000,\
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* pre-scale factor is 256, i.e. we have 125 "ticks" / sec: \
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* 8000000 = 256 * 250 * 125 \
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*/ \
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OCR0 = 250; \
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\
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/* \
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* Set timer control register: \
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* - prescale: 256 (CS02) \
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* - counter reset via comparison register (WGM01) \
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*/ \
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TCCR0 = _BV(CS02) | _BV(WGM01); \
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\
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/* Clear interrupt flag register */ \
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TIFR = 0x00; \
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\
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/* \
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* Raise interrupt when value in OCR0 is reached. Note that the \
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* counter value in TCNT0 is cleared automatically. \
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*/ \
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TIMSK = _BV (OCIE0);
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#elif defined (__AVR_ATmega8__)
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#define AVR_OUTPUT_COMPARE_INT TIMER2_COMP_vect
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#define OCRSetup() \
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/* Set counter to zero */ \
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TCNT2 = 0; \
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\
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/* \
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* Set comparison register: \
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* Crystal freq. is 8000000,\
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* pre-scale factor is 256, i.e. we have 125 "ticks" / sec: \
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* 8000000 = 256 * 250 * 125 \
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*/ \
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OCR2 = 250; \
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\
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/* \
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* Set timer control register: \
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* - prescale: 256 (CS21 CS22) \
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* - counter reset via comparison register (WGM21) \
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*/ \
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TCCR2 = _BV(CS22) | _BV(CS21) | _BV(WGM21); \
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\
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/* Clear interrupt flag register */ \
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TIFR = 0x00; \
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\
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/* \
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* Raise interrupt when value in OCR2 is reached. Note that the \
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* counter value in TCNT2 is cleared automatically. \
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*/ \
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TIMSK = _BV (OCIE2);
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#else
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#error "Setup CPU in clock-avr.h"
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#endif
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