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* Added f2xxx for two series (for example z1)

Browse source 
* f1xxx is baseline and always included
* Cleaned up the names of uart and spi (no x in names)
* Updated SPI configuration for WiSMote
This commit is contained in:
Niclas Finne 2011-10-06 14:05:57 +02:00
parent 1a761ec3eb
commit cdfa8708e3
15 changed files with 289 additions and 204 deletions
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192
cpu/msp430/dev/uart0x.c
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@ -1,192 +0,0 @@
/*
* Copyright (c) 2010, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)$Id: uart0x.c,v 1.1 2010/08/24 16:23:20 joxe Exp $
*/
/*
* Machine dependent MSP430X UART0 code.
*/
#include <stdlib.h>
#include "contiki.h"
#include "sys/energest.h"
#include "dev/uart0.h"
#include "dev/watchdog.h"
#include "lib/ringbuf.h"
#include "dev/leds.h"
static int (*uart0_input_handler)(unsigned char c);
static volatile uint8_t transmitting;
#ifdef UART0_CONF_TX_WITH_INTERRUPT
#define TX_WITH_INTERRUPT UART0_CONF_TX_WITH_INTERRUPT
#else /* UART0_CONF_TX_WITH_INTERRUPT */
#define TX_WITH_INTERRUPT 1
#endif /* UART0_CONF_TX_WITH_INTERRUPT */
#if TX_WITH_INTERRUPT
#define TXBUFSIZE 64
static struct ringbuf txbuf;
static uint8_t txbuf_data[TXBUFSIZE];
#endif /* TX_WITH_INTERRUPT */
/*---------------------------------------------------------------------------*/
uint8_t
uart0_active(void)
{
return (UCA0STAT & UCBUSY) | transmitting;
}
/*---------------------------------------------------------------------------*/
void
uart0_set_input(int (*input)(unsigned char c))
{
uart0_input_handler = input;
}
/*---------------------------------------------------------------------------*/
void
uart0_writeb(unsigned char c)
{
watchdog_periodic();
#if TX_WITH_INTERRUPT
/* Put the outgoing byte on the transmission buffer. If the buffer
is full, we just keep on trying to put the byte into the buffer
until it is possible to put it there. */
while(ringbuf_put(&txbuf, c) == 0);
/* If there is no transmission going, we need to start it by putting
the first byte into the UART. */
if(transmitting == 0) {
transmitting = 1;
UCA0TXBUF = ringbuf_get(&txbuf);
}
#else /* TX_WITH_INTERRUPT */
/* Loop until the transmission buffer is available. */
/*Enric while((IFG2 & UCA0TXIFG) == 0); */
while((UCA0STAT & UCBUSY));
/* Transmit the data. */
UCA0TXBUF = c;
#endif /* TX_WITH_INTERRUPT */
}
/*---------------------------------------------------------------------------*/
#if ! WITH_UIP /* If WITH_UIP is defined, putchar() is defined by the SLIP driver */
#endif /* ! WITH_UIP */
/*---------------------------------------------------------------------------*/
/**
* Initalize the RS232 port.
*
*/
void
uart0_init(unsigned long ubr)
{
/* RS232 */
UCA0CTL1 |= UCSWRST; /* Hold peripheral in reset state */
UCA0CTL1 |= UCSSEL_2; /* CLK = SMCLK */
UCA0BR0 = 0x45; /* 8MHz/115200 = 69 = 0x45 */
UCA0BR1 = 0x00;
UCA0MCTL = UCBRS_3; /* Modulation UCBRSx = 3 */
P3DIR &= ~0x20; /* P3.5 = USCI_A0 RXD as input */
P3DIR |= 0x10; /* P3.4 = USCI_A0 TXD as output */
P3SEL |= 0x30; /* P3.4,5 = USCI_A0 TXD/RXD */
/*UCA0CTL1 &= ~UCSWRST;*/ /* Initialize USCI state machine */
transmitting = 0;
/* XXX Clear pending interrupts before enable */
IFG2 &= ~UCA0RXIFG;
IFG2 &= ~UCA0TXIFG;
UCA0CTL1 &= ~UCSWRST; /* Initialize USCI state machine **before** enabling interrupts */
IE2 |= UCA0RXIE; /* Enable UCA0 RX interrupt */
/* Enable USCI_A0 TX interrupts (if TX_WITH_INTERRUPT enabled) */
#if TX_WITH_INTERRUPT
ringbuf_init(&txbuf, txbuf_data, sizeof(txbuf_data));
IE2 |= UCA0TXIE; /* Enable UCA0 TX interrupt */
#endif /* TX_WITH_INTERRUPT */
}
/*---------------------------------------------------------------------------*/
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=USCIAB0RX_VECTOR
__interrupt void
#else
interrupt(USCIAB0RX_VECTOR)
#endif
uart0_rx_interrupt(void)
{
uint8_t c;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
leds_toggle(LEDS_RED);
if(UCA0STAT & UCRXERR) {
c = UCA0RXBUF; /* Clear error flags by forcing a dummy read. */
} else {
c = UCA0RXBUF;
if(uart0_input_handler != NULL) {
if(uart0_input_handler(c)) {
LPM4_EXIT;
}
}
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
/*---------------------------------------------------------------------------*/
#if TX_WITH_INTERRUPT
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=USCIAB0TX_VECTOR
__interrupt void
#else
interrupt(USCIAB0TX_VECTOR)
#endif
uart0_tx_interrupt(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if((IFG2 & UCA0TXIFG)){
if(ringbuf_elements(&txbuf) == 0) {
transmitting = 0;
} else {
UCA0TXBUF = ringbuf_get(&txbuf);
}
}
/* In a stand-alone app won't work without this. Is the UG misleading? */
IFG2 &= ~UCA0TXIFG;
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif /* TX_WITH_INTERRUPT */
/*---------------------------------------------------------------------------*/

379
cpu/msp430/dev/uart1.c
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@ -1,379 +0,0 @@
/*
* Copyright (c) 2006, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)$Id: uart1.c,v 1.24 2011/01/19 20:44:20 joxe Exp $
*/
/*
* Machine dependent MSP430 UART1 code.
*/
#include "contiki.h"
#include "sys/energest.h"
#include "dev/uart1.h"
#include "dev/watchdog.h"
#include "sys/ctimer.h"
#include "lib/ringbuf.h"
static int (*uart1_input_handler)(unsigned char c);
static volatile uint8_t rx_in_progress;
static volatile uint8_t transmitting;
#ifdef UART1_CONF_TX_WITH_INTERRUPT
#define TX_WITH_INTERRUPT UART1_CONF_TX_WITH_INTERRUPT
#else /* UART1_CONF_TX_WITH_INTERRUPT */
#define TX_WITH_INTERRUPT 0
#endif /* UART1_CONF_TX_WITH_INTERRUPT */
#ifdef UART1_CONF_RX_WITH_DMA
#define RX_WITH_DMA UART1_CONF_RX_WITH_DMA
#else /* UART1_CONF_RX_WITH_DMA */
#define RX_WITH_DMA 1
#endif /* UART1_CONF_RX_WITH_DMA */
#if TX_WITH_INTERRUPT
#define TXBUFSIZE 128
static struct ringbuf txbuf;
static uint8_t txbuf_data[TXBUFSIZE];
#endif /* TX_WITH_INTERRUPT */
#if RX_WITH_DMA
#define RXBUFSIZE 128
static uint8_t rxbuf[RXBUFSIZE];
static uint16_t last_size;
static struct ctimer rxdma_timer;
static void
handle_rxdma_timer(void *ptr)
{
uint16_t size;
size = DMA0SZ; /* Note: loop requires that size is less or eq to RXBUFSIZE */
while(last_size != size) {
/* printf("read: %c [%d,%d]\n", (unsigned char)rxbuf[RXBUFSIZE - last_size], */
/* last_size, size); */
uart1_input_handler((unsigned char)rxbuf[RXBUFSIZE - last_size]);
last_size--;
if(last_size == 0) last_size = RXBUFSIZE;
}
ctimer_reset(&rxdma_timer);
}
#endif /* RX_WITH_DMA */
/*---------------------------------------------------------------------------*/
uint8_t
uart1_active(void)
{
#if CONTIKI_TARGET_WISMOTE
return rx_in_progress | transmitting;
#else
return ((~ UTCTL1) & TXEPT) | rx_in_progress | transmitting;
#endif
}
/*---------------------------------------------------------------------------*/
void
uart1_set_input(int (*input)(unsigned char c))
{
#if RX_WITH_DMA /* This needs to be called after ctimer process is started */
ctimer_set(&rxdma_timer, CLOCK_SECOND/64, handle_rxdma_timer, NULL);
#endif
uart1_input_handler = input;
}
/*---------------------------------------------------------------------------*/
void
uart1_writeb(unsigned char c)
{
watchdog_periodic();
#if TX_WITH_INTERRUPT
/* Put the outgoing byte on the transmission buffer. If the buffer
is full, we just keep on trying to put the byte into the buffer
until it is possible to put it there. */
while(ringbuf_put(&txbuf, c) == 0);
/* If there is no transmission going, we need to start it by putting
the first byte into the UART. */
if(transmitting == 0) {
transmitting = 1;
/* Loop until the transmission buffer is available. */
/*while((IFG2 & UTXIFG1) == 0);*/
UCA1TXBUF = ringbuf_get(&txbuf);
}
#else /* TX_WITH_INTERRUPT */
#if CONTIKI_TARGET_WISMOTE
while(!(UCA1IFG & UCTXIFG)); // USCI_A1 TX buffer ready?
UCA1TXBUF = c;
#else
/* Loop until the transmission buffer is available. */
while((IFG2 & UTXIFG1) == 0);
/* Transmit the data. */
TXBUF1 = c;
#endif
#endif /* TX_WITH_INTERRUPT */
}
/*---------------------------------------------------------------------------*/
/**
* Initalize the RS232 port.
*
*/
void
uart1_init(unsigned long ubr)
{
#if CONTIKI_TARGET_WISMOTE
P4DIR |= BIT5;
P4OUT |= BIT5 ;
P5SEL |= BIT6|BIT7; // P5.6,7 = USCI_A1 TXD/RXD
P4SEL |= BIT7;
P4DIR |= BIT7;
UCA1CTL1 |= UCSWRST; // **Put state machine in reset**
UCA1CTL1 |= UCSSEL_2; // SMCLK
UCA1BR0 = 139;//69; // Baudrate 57600 (see User's Guide)
UCA1BR1 = 0; //
UCA1MCTL |= UCBRS_2 + UCBRF_0; // Modulation UCBRFx=0
UCA1CTL1 &= ~UCSWRST; // **Initialize USCI state machine**
UCA1IE |= UCRXIE;
UCA1IFG &= ~UCRXIFG;
//UCA1IFG &= ~UCTXIFG;
// UCA1TCTL1 |= URXSE;
rx_in_progress = 0;
transmitting = 0;
#if TX_WITH_INTERRUPT
ringbuf_init(&txbuf, txbuf_data, sizeof(txbuf_data));
UCA1IE |= UCTXIE;
//UCA1IFG &= ~UCTXIFG;
#endif /* TX_WITH_INTERRUPT */
#else
/* RS232 */
P3DIR &= ~0x80; /* Select P37 for input (UART1RX) */
P3DIR |= 0x40; /* Select P36 for output (UART1TX) */
P3SEL |= 0xC0; /* Select P36,P37 for UART1{TX,RX} */
UCTL1 = SWRST | CHAR; /* 8-bit character, UART mode */
#if 0
U1RCTL &= ~URXEIE; /* even erroneous characters trigger interrupts */
#endif
UTCTL1 = SSEL1; /* UCLK = MCLK */
UBR01 = ubr;
UBR11 = ubr >> 8;
/*
* UMCTL1 values calculated using
* http://mspgcc.sourceforge.net/baudrate.html
*/
switch(ubr) {
#if F_CPU == 3900000ul
case UART1_BAUD2UBR(115200ul):
UMCTL1 = 0xF7;
break;
case UART1_BAUD2UBR(57600ul):
UMCTL1 = 0xED;
break;
case UART1_BAUD2UBR(38400ul):
UMCTL1 = 0xD6;
break;
case UART1_BAUD2UBR(19200ul):
UMCTL1 = 0x08;
break;
case UART1_BAUD2UBR(9600ul):
UMCTL1 = 0x22;
break;
#elif F_CPU == 2457600ul
case UART1_BAUD2UBR(115200ul):
UMCTL1 = 0x4A;
break;
case UART1_BAUD2UBR(57600ul):
UMCTL1 = 0x5B;
break;
default:
/* 9600, 19200, 38400 don't require any correction */
UMCTL1 = 0x00;
#else
#error Unsupported CPU speed in uart1.c
#endif
}
ME2 &= ~USPIE1; /* USART1 SPI module disable */
ME2 |= (UTXE1 | URXE1); /* Enable USART1 TXD/RXD */
UCTL1 &= ~SWRST;
/* XXX Clear pending interrupts before enable!!! */
IFG2 &= ~URXIFG1;
U1TCTL |= URXSE;
rx_in_progress = 0;
transmitting = 0;
IE2 |= URXIE1; /* Enable USART1 RX interrupt */
#if TX_WITH_INTERRUPT
ringbuf_init(&txbuf, txbuf_data, sizeof(txbuf_data));
IE2 |= UTXIE1; /* Enable USART1 TX interrupt */
#endif /* TX_WITH_INTERRUPT */
#if RX_WITH_DMA
IE2 &= ~URXIE1; /* disable USART1 RX interrupt */
/* UART1_RX trigger */
DMACTL0 = DMA0TSEL_9;
/* source address = RXBUF1 */
DMA0SA = (unsigned int) &RXBUF1;
DMA0DA = (unsigned int) &rxbuf;
DMA0SZ = RXBUFSIZE;
last_size = RXBUFSIZE;
DMA0CTL = DMADT_4 + DMASBDB + DMADSTINCR_3 + DMAEN + DMAREQ;// DMAIE;
msp430_add_lpm_req(MSP430_REQUIRE_LPM1);
#endif /* RX_WITH_DMA */
#endif
}
/*---------------------------------------------------------------------------*/
#if CONTIKI_TARGET_WISMOTE
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=USCI_A1_VECTOR
__interrupt void
#else
interrupt(USCI_A1_VECTOR)
#endif
uart1_rx_interrupt(void)
{
uint8_t c;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(UCRXIFG & UCA1IFG) {
rx_in_progress = 0;
// Check status register for receive errors.
if(UCA1STAT & UCRXERR) {
c = UCA1RXBUF; // Clear error flags by forcing a dummy read.
} else {
c = UCA1RXBUF;
if(uart1_input_handler != NULL) {
if(uart1_input_handler(c)) {
LPM4_EXIT;
}
}
}
UCA1IFG &= ~UCRXIFG;
}
#if TX_WITH_INTERRUPT
if(UCTXIFG & UCA1IFG) {
if(ringbuf_elements(&txbuf) == 0) {
transmitting = 0;
} else {
UCA1TXBUF = ringbuf_get(&txbuf);
}
UCA1IFG &= ~UCTXIFG;
}
#endif
//UCA1IFG &= 0x00;
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#else
#if !RX_WITH_DMA
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=UART1RX_VECTOR
__interrupt void
#else
interrupt(UART1RX_VECTOR)
#endif
uart1_rx_interrupt(void)
{
uint8_t c;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(!(URXIFG1 & IFG2)) {
/* Edge detect if IFG not set? */
U1TCTL &= ~URXSE; /* Clear the URXS signal */
U1TCTL |= URXSE; /* Re-enable URXS - needed here?*/
rx_in_progress = 1;
LPM4_EXIT;
} else {
rx_in_progress = 0;
/* Check status register for receive errors. */
if(URCTL1 & RXERR) {
c = RXBUF1; /* Clear error flags by forcing a dummy read. */
} else {
c = RXBUF1;
if(uart1_input_handler != NULL) {
if(uart1_input_handler(c)) {
LPM4_EXIT;
}
}
}
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif /* !RX_WITH_DMA */
/*---------------------------------------------------------------------------*/
#if TX_WITH_INTERRUPT
#ifdef __IAR_SYSTEMS_ICC__
#pragma vector=UART1TX_VECTOR
__interrupt void
#else
interrupt(UART1TX_VECTOR)
#endif
uart1_tx_interrupt(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(ringbuf_elements(&txbuf) == 0) {
transmitting = 0;
} else {
TXBUF1 = ringbuf_get(&txbuf);
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif /* TX_WITH_INTERRUPT */
#endif
/*---------------------------------------------------------------------------*/

159
cpu/msp430/dev/uart1x.c
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@ -1,159 +0,0 @@
/*
* Copyright (c) 2010, Swedish Institute of Computer Science
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the Institute nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* @(#)$Id: uart1x.c,v 1.1 2010/08/24 16:23:20 joxe Exp $
*/
/*
* Machine dependent MSP430X UART1 code.
*/
#include "contiki.h"
#include <stdlib.h>
#include "sys/energest.h"
#include "dev/uart1.h"
#include "dev/watchdog.h"
#include "lib/ringbuf.h"
static int (*uart1_input_handler)(unsigned char c);
static volatile uint8_t transmitting;
#ifdef UART1_CONF_TX_WITH_INTERRUPT
#define TX_WITH_INTERRUPT UART1_CONF_TX_WITH_INTERRUPT
#else /* UART1_CONF_TX_WITH_INTERRUPT */
#define TX_WITH_INTERRUPT 1
#endif /* UART1_CONF_TX_WITH_INTERRUPT */
#if TX_WITH_INTERRUPT
#define TXBUFSIZE 64
static struct ringbuf txbuf;
static uint8_t txbuf_data[TXBUFSIZE];
#endif /* TX_WITH_INTERRUPT */
/*---------------------------------------------------------------------------*/
uint8_t
uart1_active(void)
{
return (UCA0STAT & UCBUSY) | transmitting;
}
/*---------------------------------------------------------------------------*/
void
uart1_set_input(int (*input)(unsigned char c))
{
uart1_input_handler = input;
}
/*---------------------------------------------------------------------------*/
void
uart1_writeb(unsigned char c)
{
/* watchdog_periodic(); */
#if TX_WITH_INTERRUPT
/* Put the outgoing byte on the transmission buffer. If the buffer
is full, we just keep on trying to put the byte into the buffer
until it is possible to put it there. */
while(ringbuf_put(&txbuf, c) == 0);
/* If there is no transmission going, we need to start it by putting
the first byte into the UART. */
if(transmitting == 0) {
transmitting = 1;
UCA0TXBUF = ringbuf_get(&txbuf);
}
#else /* TX_WITH_INTERRUPT */
/* Loop until the transmission buffer is available. */
while(!(IFG2 & UCA0TXIFG));
/* Transmit the data. */
UCA0TXBUF = c;
#endif /* TX_WITH_INTERRUPT */
}
/*---------------------------------------------------------------------------*/
#if ! WITH_UIP /* If WITH_UIP is defined, putchar() is defined by the SLIP driver */
#endif /* ! WITH_UIP */
/*---------------------------------------------------------------------------*/
/**
* Initalize the RS232 port.
*
*/
void
uart1_init(unsigned long ubr)
{
/* RS232 */
P3SEL |= 0x30; /* P3.4,5 = USCI_A0 TXD/RXD */
UCA0CTL1 |= UCSSEL_2; /* CLK = SMCLK */
UCA0BR0 = 0x45; /* 8MHz/115200 = 69 = 0x45 */
UCA0BR1 = 0x00;
UCA0MCTL = UCBRS2; /* Modulation UCBRSx = 4 */
UCA0CTL1 &= ~UCSWRST; /* Initialize USCI state machine */
transmitting = 0;
}
/*---------------------------------------------------------------------------*/
interrupt(USCIAB1RX_VECTOR)
uart1_rx_interrupt(void)
{
uint8_t c;
ENERGEST_ON(ENERGEST_TYPE_IRQ);
/* Check status register for receive errors. */
if(UCA0STAT & UCRXERR) {
c = UCA0RXBUF; /* Clear error flags by forcing a dummy read. */
} else {
c = UCA0RXBUF;
if(uart1_input_handler != NULL) {
if(uart1_input_handler(c)) {
LPM4_EXIT;
}
}
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
/*---------------------------------------------------------------------------*/
#if TX_WITH_INTERRUPT
interrupt(USCIAB1TX_VECTOR)
uart1_tx_interrupt(void)
{
ENERGEST_ON(ENERGEST_TYPE_IRQ);
if(IFG2 & UCA0TXIFG) {
if(ringbuf_elements(&txbuf) == 0) {
transmitting = 0;
} else {
UCA0TXBUF = ringbuf_get(&txbuf);
}
}
ENERGEST_OFF(ENERGEST_TYPE_IRQ);
}
#endif /* TX_WITH_INTERRUPT */
/*---------------------------------------------------------------------------*/