Add clock_delay_us and clock_set_seconds to clock.h. Modify clock_wait to use clock_time_t.
Remove the troublesome avr/dev/delay.* files. Add PLATFORM_NAME and combine the confusing *_REVISION defines into a single PLATFORM_TYPE
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39 changed files with 810 additions and 481 deletions
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@ -1,5 +1,4 @@
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#include "rtl8019.h"
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#include "delay.h"
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#include "debug.h"
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#include "avr/pgmspace.h"
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#include "rtlregs.h"
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@ -36,6 +35,8 @@
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* Corrected the overrun function - overrun flag was not reset after overrun
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* Added support for the Imagecraft Compiler
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* Added support to communicate with the NIC using general I/O ports
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* March 10, 2012 - David Kopf
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* Use contiki clock_delay_usec call.
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*
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*****************************************************************************/
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@ -85,7 +86,25 @@ void writeRTL(unsigned char address, unsigned char data)
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#endif
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void
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delay_msec(uint16_t howlong)
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{
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#if F_CPU>=16000000
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while(howlong--) clock_delay_usec(1000);
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#elif F_CPU>=8000000
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uint16_t i=996;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#elif F_CPU>=4000000
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uint16_t i=992;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#elif F_CPU>=2000000
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uint16_t i=989;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#else
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uint16_t i=983;
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while(howlong--) {clock_delay_usec(i);i=999;}
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#endif
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}
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/*****************************************************************************
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* readRTL(RTL_ADDRESS)
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* Args: unsigned char RTL_ADDRESS - register offset of RTL register
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@ -191,7 +210,7 @@ volatile unsigned char *base = (unsigned char *)0x8300;
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* Description: Simply toggles the pin that resets the NIC
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*****************************************************************************/
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/*#define HARD_RESET_RTL8019() do{ sbi(RTL8019_RESET_PORT, RTL8019_RESET_PIN); \
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Delay_10ms(1); \
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delay_msec(10); \
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cbi(RTL8019_RESET_PORT, RTL8019_RESET_PIN);} \
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while(0)*/
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@ -503,7 +522,7 @@ void overrun(void)
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data_L = readRTL(CR);
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writeRTL(CR, 0x21);
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Delay_1ms(2);
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delay_msec(2);
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writeRTL(RBCR0, 0x00);
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writeRTL(RBCR1, 0x00);
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if(!(data_L & 0x04))
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@ -686,7 +705,11 @@ void initRTL8019(void)
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*/
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nic_write(NIC_PG3_EECR, 0);
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/* NutSleep(WAIT500);*/
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Delay_10ms(50);
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delay_msec(500);
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/*
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* Switch to register page 0 and set data configuration register
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@ -772,7 +795,10 @@ void initRTL8019(void)
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nic_write(NIC_PG0_TCR, 0);
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/* NutSleep(WAIT500);*/
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Delay_10ms(50);
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delay_msec(500);
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#endif /* 0 */
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@ -788,7 +814,8 @@ void initRTL8019(void)
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nic_write(NIC_PG3_CONFIG2, NIC_CONFIG2_BSELB);
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nic_write(NIC_PG3_EECR, 0);
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/* Delay(50000);*/
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Delay_10ms(200);
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delay_msec(2000);
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nic_write(NIC_CR, NIC_CR_STP | NIC_CR_RD2);
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nic_write(NIC_PG0_DCR, NIC_DCR_LS | NIC_DCR_FT1);
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nic_write(NIC_PG0_RBCR0, 0);
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@ -813,7 +840,7 @@ void initRTL8019(void)
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nic_write(NIC_CR, NIC_CR_STA | NIC_CR_RD2);
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nic_write(NIC_PG0_TCR, 0);
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/* Delay(1000000)*/
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Delay_10ms(200);
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delay_msec(2000);
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nic_write(NIC_CR, NIC_CR_STA | NIC_CR_RD2 | NIC_CR_PS0 | NIC_CR_PS1);
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@ -874,10 +901,10 @@ void initRTL8019(void)
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// do soft reset
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writeRTL( ISR, readRTL(ISR) ) ;
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Delay_10ms(5);
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delay_msec(50);
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writeRTL(CR,0x21); // stop the NIC, abort DMA, page 0
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Delay_1ms(2); // make sure nothing is coming in or going out
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delay_msec(2); // make sure nothing is coming in or going out
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writeRTL(DCR, DCR_INIT); // 0x58
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writeRTL(RBCR0,0x00);
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writeRTL(RBCR1,0x00);
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@ -888,7 +915,7 @@ void initRTL8019(void)
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writeRTL(BNRY, RXSTART_INIT);
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writeRTL(PSTOP, RXSTOP_INIT);
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writeRTL(CR, 0x61);
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Delay_1ms(2);
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delay_msec(2);
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writeRTL(CURR, RXSTART_INIT);
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writeRTL(PAR0+0, MYMAC_0);
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