Change timer setups for arbitrary CLOCK_CONF_SECOND

Change raven to 128 ticks and enable 32KHz crystal as default.
This commit is contained in:
David Kopf 2011-08-05 15:14:35 -04:00
parent bfbc3234ea
commit c9b19ce655
6 changed files with 74 additions and 50 deletions

View file

@ -14,11 +14,11 @@
\
/* \
* Set comparison register: \
* Crystal freq. is 16000000,\
* pre-scale factor is 1024, i.e. we have 125 "ticks" / sec: \
* 16000000 = 1024 * 125 * 125 \
* Crystal freq. is F_CPU,\
* pre-scale factor is 1024, we want CLOCK_CONF_SECOND ticks / sec: \
* F_CPU = 1024 * CLOCK_CONF_SECOND * OCR0 \
*/ \
OCR0 = 125; \
OCR0 = F_CPU/1024UL/CLOCK_CONF_SECOND; \
\
/* \
* Set timer control register: \
@ -48,11 +48,11 @@
\
/* \
* Set comparison register: \
* Crystal freq. is 8000000,\
* pre-scale factor is 1024, we want 125 ticks / sec: \
* 8000000 = 1024 * 126.01 * 62, less 1 for CTC mode \
* Crystal freq. is F_CPU,\
* pre-scale factor is 1024, we want CLOCK_CONF_SECOND ticks / sec: \
* F_CPU = 1024 * CLOCK_CONF_SECOND * OCR0A, less 1 for CTC mode \
*/ \
OCR0A = 61; \
OCR0A = F_CPU/1024/CLOCK_CONF_SECOND - 1; \
\
/* \
* Set timer control register: \
@ -92,10 +92,10 @@
/* \
* Set comparison register: \
* Crystal freq. is 32768,\
* pre-scale factor is 8, we want 125 ticks / sec: \
* 32768 = 8 * 124.1 * 33, less 1 for CTC mode\
* pre-scale factor is 8, we want CLOCK_CONF_SECOND ticks / sec: \
* 32768 = 8 * CLOCK_CONF_SECOND * OCR2A, less 1 for CTC mode\
*/ \
OCR2A = 32; \
OCR2A = 32768/8/CLOCK_CONF_SECOND - 1; \
\
/* \
* Set timer control register: \
@ -124,11 +124,11 @@
\
/* \
* Set comparison register: \
* Crystal freq. is 8000000,\
* pre-scale factor is 1024, we want 125 ticks / sec: \
* 8000000 = 1024 * 126.01 * 62, less 1 for CTC mode \
* Crystal freq. is F_CPU,\
* pre-scale factor is 1024, we want CLOCK_CONF_SECOND ticks / sec: \
* F_CPU = 1024 * CLOCK_CONF_SECOND * OCR2A, less 1 for CTC mode \
*/ \
OCR0A = 61; \
OCR0A = F_CPU/1024UL/CLOCK_CONF_SECOND - 1; \
\
/* \
* Set timer control register: \
@ -156,11 +156,10 @@
\
/* \
* Set comparison register: \
* Crystal freq. is 8000000,\
* pre-scale factor is 256, i.e. we have 125 "ticks" / sec: \
* 8000000 = 256 * 250 * 125 \
* Crystal freq. is F_CPU,\
* pre-scale factor is 256, want CLOCK_CONF_SECOND ticks / sec: \
*/ \
OCR0A = 250; \
OCR0A = F_CPU/256UL/CLOCK_CONF_SECOND - 1; \
\
/* \
* Set timer control register: \
@ -191,11 +190,11 @@
\
/* \
* Set comparison register: \
* Crystal freq. is 8000000,\
* pre-scale factor is 256, i.e. we have 125 "ticks" / sec: \
* 8000000 = 256 * 250 * 125 \
* Crystal freq. is F_CPU,\
* pre-scale factor is 256, we want CLOCK_CONF_SECOND ticks / sec: \
* F_CPU = 256 * CLOCK_CONF_SECOND * OCR0 \
*/ \
OCR0 = 250; \
OCR0 = F_CPU/256UL/CLOCK_CONF_SECOND; \
\
/* \
* Set timer control register: \
@ -223,11 +222,11 @@
\
/* \
* Set comparison register: \
* Crystal freq. is 8000000,\
* pre-scale factor is 256, i.e. we have 125 "ticks" / sec: \
* 8000000 = 256 * 250 * 125 \
* Crystal freq. is F_CPU,\
* pre-scale factor is 256, we want CLOCK_CONF_SECOND ticks / sec: \
* F_CPU = 256 * CLOCK_CONF_SECOND * OCR2 \
*/ \
OCR2 = 250; \
OCR2 = F_CPU/256UL/CLOCK_CONF_SECOND; \
\
/* \
* Set timer control register: \

View file

@ -34,7 +34,8 @@
/**
* \file
* AVR-specific rtimer code
* Currently only works on ATMEGAs that have Timer 3.
* Defaults to Timer3 for those ATMEGAs that have it.
* If Timer3 not present Timer1 will be used.
* \author
* Fredrik Osterlind <fros@sics.se>
* Joakim Eriksson <joakime@sics.se>
@ -51,7 +52,6 @@
#include "rtimer-arch.h"
#if defined(__AVR_ATmega1281__) || defined(__AVR_ATmega1284P__)
//#error FTH081029 test timer 3
#define ETIMSK TIMSK3
#define ETIFR TIFR3
#define TICIE3 ICIE3
@ -78,7 +78,7 @@
#endif
/*---------------------------------------------------------------------------*/
#ifdef TCNT3
#if defined(TCNT3) && RTIMER_ARCH_PRESCALER
ISR (TIMER3_COMPA_vect) {
ENERGEST_ON(ENERGEST_TYPE_IRQ);
@ -104,6 +104,7 @@ ISR (TIMER1_COMPA_vect) {
void
rtimer_arch_init(void)
{
#if RTIMER_ARCH_PRESCALER
/* Disable interrupts (store old state) */
uint8_t sreg;
sreg = SREG;
@ -125,8 +126,19 @@ rtimer_arch_init(void)
/* Reset counter */
TCNT3 = 0;
/* Start clock, maximum prescaler (1024)*/
#if RTIMER_ARCH_PRESCALER==1024
TCCR3B |= 5;
#elif RTIMER_ARCH_PRESCALER==256
TCCR3B |= 4;
#elif RTIMER_ARCH_PRESCALER==64
TCCR3B |= 3;
#elif RTIMER_ARCH_PRESCALER==8
TCCR3B |= 2;
#elif RTIMER_ARCH_PRESCALER==1
TCCR3B |= 1;
#else
#error Timer3 PRESCALER factor not supported.
#endif
#elif RTIMER_ARCH_PRESCALER
/* Leave timer1 alone if PRESCALER set to zero */
@ -154,18 +166,20 @@ rtimer_arch_init(void)
#elif RTIMER_ARCH_PRESCALER==1
TCCR1B |= 1;
#else
#error PRESCALER factor not supported.
#error Timer1 PRESCALER factor not supported.
#endif
#endif /* TCNT3 */
/* Restore interrupt state */
SREG = sreg;
#endif /* RTIMER_ARCH_PRESCALER */
}
/*---------------------------------------------------------------------------*/
void
rtimer_arch_schedule(rtimer_clock_t t)
{
#if RTIMER_ARCH_PRESCALER
/* Disable interrupts (store old state) */
uint8_t sreg;
sreg = SREG;
@ -190,4 +204,5 @@ rtimer_arch_schedule(rtimer_clock_t t)
/* Restore interrupt state */
SREG = sreg;
#endif /* RTIMER_ARCH_PRESCALER */
}

View file

@ -36,16 +36,22 @@
#include <avr/interrupt.h>
/* Nominal ARCH_SECOND is F_CPU/prescaler, e.g. 8000000/1024 = 7812 */
/* Nominal ARCH_SECOND is F_CPU/prescaler, e.g. 8000000/1024 = 7812
* Other prescaler values (1, 8, 64, 256) will give greater precision
* with shorter maximum intervals.
* Setting RTIMER_ARCH_PRESCALER to 0 will leave Timers alone.
* rtimer_arch_now() will then return 0, likely hanging the cpu if used.
* Timer1 is used if Timer3 is not available.
*/
#ifndef RTIMER_ARCH_PRESCALER
#define RTIMER_ARCH_PRESCALER 1024UL
#endif
#if RTIMER_ARCH_PRESCALER
#define RTIMER_ARCH_SECOND (F_CPU/RTIMER_ARCH_PRESCALER)
#else
#define RTIMER_ARCH_SECOND 0
#endif
/* Use TCNT1 if TCNT3 not available.
* Setting RTIMER_ARCH_PRESCALER to 0 will leave timer1 alone.
* Obviously this will disable rtimers.
*/
#ifdef TCNT3
#define rtimer_arch_now() (TCNT3)