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x86: Add Intel Quark X1000 PCI Interrupt Routing support

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PCI Interrupt Routing is mapped using Interrupt Queue Agents
IRQAGENT[0:3] and aggregating the INT[A:D] interrupts for each
PCI-mapped device in the SoC.

PCI based interrupts PIRQ[A:H] are then available for consumption
by either the 8259 PICs or the IO-APIC, depending on the configuration
of the 8 PIRQx Routing Control Registers PIRQ[A:H].

More information about can be find in Intel Quark X1000 datasheet[1]
section 21.11.

[1] - http://www.intel.com/content/www/us/en/embedded/products/quark/quark-x1000-datasheet.html
This commit is contained in:
Ricardo de Almeida Gonzaga 2015-10-05 15:38:50 -03:00 • committed by Jesus Sanchez-Palencia
parent 8ae392e66f
commit c796e270bf
2 changed files with 166 additions and 0 deletions
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33
cpu/x86/drivers/legacy_pc/pci.h
View file

@ -36,6 +36,37 @@
/** PCI configuration register identifier for Base Address Register 0 (BAR0) */
#define PCI_CONFIG_REG_BAR0 0x10
/** PCI Interrupt Routing is mapped using Interrupt Queue Agents */
typedef enum {
IRQAGENT0,
IRQAGENT1,
IRQAGENT2,
IRQAGENT3
} IRQAGENT;
/** PCI Interupt Pins */
typedef enum {
INTA,
INTB,
INTC,
INTD
} INTR_PIN;
/**
* PCI based interrupts PIRQ[A:H] are then available for consumption by either
* the 8259 PICs or the IO-APIC.
*/
typedef enum {
PIRQA,
PIRQB,
PIRQC,
PIRQD,
PIRQE,
PIRQF,
PIRQG,
PIRQH,
} PIRQ;
/**
* PCI configuration address
*
@ -66,5 +97,7 @@ typedef struct pci_driver {
} pci_driver_t;
void pci_init_bar0(pci_driver_t *c_this, pci_config_addr_t pci_addr);
int pci_irq_agent_set_pirq(IRQAGENT agent, INTR_PIN pin, PIRQ pirq);
void pci_pirq_set_irq(PIRQ pirq, uint8_t irq, uint8_t route_to_legacy);
#endif /* CPU_X86_DRIVERS_LEGACY_PC_PCI_H_ */