diff --git a/cpu/x86/drivers/legacy_pc/pci.c b/cpu/x86/drivers/legacy_pc/pci.c
index 6ce60f102..fe18e79d6 100644
--- a/cpu/x86/drivers/legacy_pc/pci.c
+++ b/cpu/x86/drivers/legacy_pc/pci.c
@@ -61,3 +61,19 @@ pci_config_read(pci_config_addr_t addr)
   return inl(PCI_CONFIG_DATA_PORT);
 }
 /*---------------------------------------------------------------------------*/
+/**
+ * \brief          Initialize a structure for a PCI device driver that performs
+ *                 MMIO to address range 0.  Assumes that device has already
+ *                 been configured with an MMIO address range 0, e.g. by
+ *                 firmware.
+ * \param c_this   Structure that will be initialized to represent the driver.
+ * \param pci_addr PCI base address of device.
+ */
+void
+pci_init_bar0(pci_driver_t *c_this, pci_config_addr_t pci_addr)
+{
+  pci_addr.reg_off = PCI_CONFIG_REG_BAR0;
+  /* The BAR0 value is masked to clear non-address bits. */
+  c_this->mmio = pci_config_read(pci_addr) & ~0xFFF;
+}
+/*---------------------------------------------------------------------------*/
diff --git a/cpu/x86/drivers/legacy_pc/pci.h b/cpu/x86/drivers/legacy_pc/pci.h
index 439cd3fc3..fca51ab69 100644
--- a/cpu/x86/drivers/legacy_pc/pci.h
+++ b/cpu/x86/drivers/legacy_pc/pci.h
@@ -58,4 +58,13 @@ typedef union pci_config_addr {
 
 uint32_t pci_config_read(pci_config_addr_t addr);
 
+/**
+ * PCI device driver instance with a single MMIO range.
+ */
+typedef struct pci_driver {
+  uintptr_t mmio; /**< MMIO range base address */
+} pci_driver_t;
+
+void pci_init_bar0(pci_driver_t *c_this, pci_config_addr_t pci_addr);
+
 #endif /* CPU_X86_DRIVERS_LEGACY_PC_PCI_H_ */