Merge pull request #1810 from mdlemay/conf-serial-baud
x86: Support configurable UART baud rate and fix initialization
This commit is contained in:
commit
c535c5b82f
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@ -140,6 +140,18 @@ SYSCALLS_DEFINE(uart_16x50_tx, uart_16x50_driver_t c_this, uint8_t c)
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prot_domains_disable_mmio();
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prot_domains_disable_mmio();
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Perform common initialization that must precede per-port
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* initialization.
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*/
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/*---------------------------------------------------------------------------*/
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void
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uart_16x50_init(void)
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{
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SYSCALLS_INIT(uart_16x50_setup);
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SYSCALLS_INIT(uart_16x50_tx);
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}
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/*---------------------------------------------------------------------------*/
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/**
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/**
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* \brief Initialize an MMIO-programmable 16X50 UART.
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* \brief Initialize an MMIO-programmable 16X50 UART.
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* \param c_this Structure that will be initialized to represent the device.
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* \param c_this Structure that will be initialized to represent the device.
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@ -147,9 +159,9 @@ SYSCALLS_DEFINE(uart_16x50_tx, uart_16x50_driver_t c_this, uint8_t c)
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* \param dl Divisor setting to configure the baud rate.
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* \param dl Divisor setting to configure the baud rate.
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*/
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*/
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void
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void
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uart_16x50_init(uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *c_this,
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uart_16x50_init_port(uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *c_this,
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pci_config_addr_t pci_addr,
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pci_config_addr_t pci_addr,
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uint16_t dl)
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uint16_t dl)
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{
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{
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uart_16x50_driver_t loc_c_this;
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uart_16x50_driver_t loc_c_this;
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@ -157,9 +169,7 @@ uart_16x50_init(uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *c_this,
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* firmware during boot.
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* firmware during boot.
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*/
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*/
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pci_init(c_this, pci_addr, UART_MMIO_SZ, 0, 0);
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pci_init(c_this, pci_addr, UART_MMIO_SZ, 0, 0);
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SYSCALLS_INIT(uart_16x50_setup);
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SYSCALLS_AUTHZ(uart_16x50_setup, *c_this);
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SYSCALLS_AUTHZ(uart_16x50_setup, *c_this);
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SYSCALLS_INIT(uart_16x50_tx);
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SYSCALLS_AUTHZ(uart_16x50_tx, *c_this);
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SYSCALLS_AUTHZ(uart_16x50_tx, *c_this);
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prot_domains_copy_dcd(&loc_c_this, c_this);
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prot_domains_copy_dcd(&loc_c_this, c_this);
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@ -35,9 +35,11 @@
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typedef pci_driver_t uart_16x50_driver_t;
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typedef pci_driver_t uart_16x50_driver_t;
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void uart_16x50_init(uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *c_this,
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void uart_16x50_init(void);
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pci_config_addr_t pci_addr,
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uint16_t dl);
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void uart_16x50_init_port(uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *c_this,
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pci_config_addr_t pci_addr,
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uint16_t dl);
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void uart_16x50_tx(uart_16x50_driver_t c_this, uint8_t c);
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void uart_16x50_tx(uart_16x50_driver_t c_this, uint8_t c);
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@ -35,19 +35,30 @@
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PROT_DOMAINS_ALLOC(uart_16x50_driver_t, quarkX1000_uart0);
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PROT_DOMAINS_ALLOC(uart_16x50_driver_t, quarkX1000_uart0);
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PROT_DOMAINS_ALLOC(uart_16x50_driver_t, quarkX1000_uart1);
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PROT_DOMAINS_ALLOC(uart_16x50_driver_t, quarkX1000_uart1);
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/* Divisor setting for 115200 baud from section 18.2.2 of Intel Quark SoC
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/* UART base frequency from section 18.2.2 of Intel Quark SoC X1000
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* X1000 Datasheet.
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* Datasheet.
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*/
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*/
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#define QUARK_X1000_UART_DL_115200 24
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#define QUARK_X1000_UART_FBASE 44236800
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/*---------------------------------------------------------------------------*/
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/**
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* \brief Perform common initialization that must precede per-port
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* initialization.
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*/
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void
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quarkX1000_uart_init(void)
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{
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uart_16x50_init();
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/**
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/**
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* \brief Initialize a UART.
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* \brief Initialize a UART.
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* \param dev Device to initialize.
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* \param dev Device to initialize.
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*/
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*/
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void
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void
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quarkX1000_uart_init(quarkX1000_uart_dev_t dev)
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quarkX1000_uart_init_port(quarkX1000_uart_dev_t dev, unsigned baud)
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{
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{
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uint16_t dl;
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pci_config_addr_t pci_addr;
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pci_config_addr_t pci_addr;
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uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *drv;
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uart_16x50_driver_t ATTR_KERN_ADDR_SPACE *drv;
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@ -67,7 +78,9 @@ quarkX1000_uart_init(quarkX1000_uart_dev_t dev)
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drv = &quarkX1000_uart1;
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drv = &quarkX1000_uart1;
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PROT_DOMAINS_INIT_ID(quarkX1000_uart1);
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PROT_DOMAINS_INIT_ID(quarkX1000_uart1);
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}
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}
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uart_16x50_init(drv, pci_addr, QUARK_X1000_UART_DL_115200);
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/* Divisor setting from section 18.2.2 of Intel Quark SoC X1000 Datasheet. */
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dl = QUARK_X1000_UART_FBASE / (16 * baud);
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uart_16x50_init_port(drv, pci_addr, dl);
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/**
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/**
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@ -38,7 +38,8 @@ typedef enum {
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QUARK_X1000_UART_1
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QUARK_X1000_UART_1
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} quarkX1000_uart_dev_t;
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} quarkX1000_uart_dev_t;
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void quarkX1000_uart_init(quarkX1000_uart_dev_t dev);
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void quarkX1000_uart_init(void);
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void quarkX1000_uart_init_port(quarkX1000_uart_dev_t dev, unsigned baud);
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void quarkX1000_uart_tx(quarkX1000_uart_dev_t dev, uint8_t c);
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void quarkX1000_uart_tx(quarkX1000_uart_dev_t dev, uint8_t c);
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#endif /* CPU_X86_DRIVERS_QUARKX1000_UART_H_ */
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#endif /* CPU_X86_DRIVERS_QUARKX1000_UART_H_ */
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@ -86,8 +86,11 @@ main(void)
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quarkX1000_imr_conf();
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quarkX1000_imr_conf();
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#endif
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#endif
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irq_init();
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irq_init();
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/* Initialize UART connected to Galileo Gen2 FTDI header */
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quarkX1000_uart_init();
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quarkX1000_uart_init(QUARK_X1000_UART_1);
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/* Initialize UART connected to Galileo Gen1 3.5mm audio-style jack or
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* Galileo Gen2 FTDI header
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*/
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quarkX1000_uart_init_port(QUARK_X1000_UART_1, 115200);
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clock_init();
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clock_init();
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rtimer_init();
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rtimer_init();
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