added some files for MSP430X I/O
This commit is contained in:
parent
ef880ddf1f
commit
c0549cad3d
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@ -1,4 +1,4 @@
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# $Id: Makefile.msp430,v 1.32 2010/04/20 15:38:09 nifi Exp $
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# $Id: Makefile.msp430,v 1.33 2010/08/24 16:23:20 joxe Exp $
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ifdef nodeid
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CFLAGS += -DNODEID=$(nodeid)
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@ -14,7 +14,7 @@ CONTIKI_CPU=$(CONTIKI)/cpu/msp430
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CONTIKI_CPU_DIRS = . dev
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MSP430 = msp430.c flash.c clock.c leds.c leds-arch.c \
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watchdog.c lpm.c mtarch.c uart1.c slip_uart1.c uart1-putchar.c rtimer-arch.c
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watchdog.c lpm.c mtarch.c rtimer-arch.c
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UIPDRIVERS = me.c me_tabs.c slip.c crc16.c
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ELFLOADER = elfloader.c elfloader-msp430.c symtab.c
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9
cpu/msp430/dev/uart0-putchar.c
Normal file
9
cpu/msp430/dev/uart0-putchar.c
Normal file
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@ -0,0 +1,9 @@
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#include "dev/uart0.h"
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#include <stdio.h>
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int
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putchar(int c)
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{
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uart0_writeb((char)c);
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return c;
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}
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53
cpu/msp430/dev/uart0.h
Normal file
53
cpu/msp430/dev/uart0.h
Normal file
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@ -0,0 +1,53 @@
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/*
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* Copyright (c) 2010, Swedish Institute of Computer Science.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
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||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
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||||
* 3. Neither the name of the Institute nor the names of its contributors
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||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
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||||
*
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||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* This file is part of the Contiki operating system.
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*
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* $Id: uart0.h,v 1.1 2010/08/24 16:23:20 joxe Exp $
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*/
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/**
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* \file
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* UART0 header file
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* \author
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* Enric M. Calvo <ecalvo@zolertia.com>
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*/
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#ifndef __UART0_H__
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#define __UART0_H__
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#include "msp430.h"
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#define UART0_BAUD2UBR(baud) ((MSP430_CPU_SPEED)/(baud))
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void uart0_set_input(int (*input)(unsigned char c));
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void uart0_writeb(unsigned char c);
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void uart0_init(unsigned long ubr);
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uint8_t uart0_active(void);
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#endif /* __UART0_H__ */
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181
cpu/msp430/dev/uart0x.c
Normal file
181
cpu/msp430/dev/uart0x.c
Normal file
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@ -0,0 +1,181 @@
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/*
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* Copyright (c) 2010, Swedish Institute of Computer Science
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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||||
* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the Institute nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)$Id: uart0x.c,v 1.1 2010/08/24 16:23:20 joxe Exp $
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*/
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/*
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* Machine dependent MSP430X UART0 code.
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*/
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#include <stdlib.h>
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#include <signal.h>
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#include "sys/energest.h"
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#include "dev/uart0.h"
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#include "dev/watchdog.h"
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#include "lib/ringbuf.h"
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#include "dev/leds.h"
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static int (*uart0_input_handler)(unsigned char c);
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static volatile uint8_t transmitting;
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#ifdef UART0_CONF_TX_WITH_INTERRUPT
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#define TX_WITH_INTERRUPT UART0_CONF_TX_WITH_INTERRUPT
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#else /* UART0_CONF_TX_WITH_INTERRUPT */
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#define TX_WITH_INTERRUPT 1
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#endif /* UART0_CONF_TX_WITH_INTERRUPT */
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#if TX_WITH_INTERRUPT
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#define TXBUFSIZE 64
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static struct ringbuf txbuf;
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static uint8_t txbuf_data[TXBUFSIZE];
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#endif /* TX_WITH_INTERRUPT */
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/*---------------------------------------------------------------------------*/
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uint8_t
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uart0_active(void)
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{
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return (UCA0STAT & UCBUSY) | transmitting;
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}
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/*---------------------------------------------------------------------------*/
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void
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uart0_set_input(int (*input)(unsigned char c))
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{
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uart0_input_handler = input;
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}
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/*---------------------------------------------------------------------------*/
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void
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uart0_writeb(unsigned char c)
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{
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watchdog_periodic();
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#if TX_WITH_INTERRUPT
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/* Put the outgoing byte on the transmission buffer. If the buffer
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is full, we just keep on trying to put the byte into the buffer
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until it is possible to put it there. */
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while(ringbuf_put(&txbuf, c) == 0);
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/* If there is no transmission going, we need to start it by putting
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the first byte into the UART. */
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if(transmitting == 0) {
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transmitting = 1;
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UCA0TXBUF = ringbuf_get(&txbuf);
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}
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#else /* TX_WITH_INTERRUPT */
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/* Loop until the transmission buffer is available. */
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/*Enric while((IFG2 & UCA0TXIFG) == 0); */
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while((UCA0STAT & UCBUSY));
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/* Transmit the data. */
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UCA0TXBUF = c;
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#endif /* TX_WITH_INTERRUPT */
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}
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/*---------------------------------------------------------------------------*/
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#if ! WITH_UIP /* If WITH_UIP is defined, putchar() is defined by the SLIP driver */
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#endif /* ! WITH_UIP */
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/*---------------------------------------------------------------------------*/
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/**
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* Initalize the RS232 port.
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*
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*/
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void
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uart0_init(unsigned long ubr)
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{
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/* RS232 */
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UCA0CTL1 |= UCSWRST; /* Hold peripheral in reset state */
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UCA0CTL1 |= UCSSEL_2; /* CLK = SMCLK */
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UCA0BR0 = 0x45; /* 8MHz/115200 = 69 = 0x45 */
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UCA0BR1 = 0x00;
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UCA0MCTL = UCBRS_3; /* Modulation UCBRSx = 3 */
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P3DIR &= ~0x20; /* P3.5 = USCI_A0 RXD as input */
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P3DIR |= 0x10; /* P3.4 = USCI_A0 TXD as output */
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P3SEL |= 0x30; /* P3.4,5 = USCI_A0 TXD/RXD */
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/*UCA0CTL1 &= ~UCSWRST;*/ /* Initialize USCI state machine */
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transmitting = 0;
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/* XXX Clear pending interrupts before enable */
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IFG2 &= ~UCA0RXIFG;
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IFG2 &= ~UCA0TXIFG;
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UCA0CTL1 &= ~UCSWRST; /* Initialize USCI state machine **before** enabling interrupts */
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IE2 |= UCA0RXIE; /* Enable UCA0 RX interrupt */
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/* Enable USCI_A0 TX interrupts (if TX_WITH_INTERRUPT enabled) */
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#if TX_WITH_INTERRUPT
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ringbuf_init(&txbuf, txbuf_data, sizeof(txbuf_data));
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IE2 |= UCA0TXIE; /* Enable UCA0 TX interrupt */
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#endif /* TX_WITH_INTERRUPT */
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}
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/*---------------------------------------------------------------------------*/
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interrupt(USCIAB0RX_VECTOR)
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uart0_rx_interrupt(void)
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{
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uint8_t c;
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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leds_toggle(LEDS_RED);
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if(UCA0STAT & UCRXERR) {
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c = UCA0RXBUF; /* Clear error flags by forcing a dummy read. */
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} else {
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c = UCA0RXBUF;
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if(uart0_input_handler != NULL) {
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if(uart0_input_handler(c)) {
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LPM4_EXIT;
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}
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}
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}
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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#if TX_WITH_INTERRUPT
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interrupt(USCIAB0TX_VECTOR)
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uart0_tx_interrupt(void)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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if((IFG2 & UCA0TXIFG)){
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if(ringbuf_elements(&txbuf) == 0) {
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transmitting = 0;
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} else {
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UCA0TXBUF = ringbuf_get(&txbuf);
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}
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}
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/* In a stand-alone app won't work without this. Is the UG misleading? */
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IFG2 &= ~UCA0TXIFG;
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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#endif /* TX_WITH_INTERRUPT */
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/*---------------------------------------------------------------------------*/
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162
cpu/msp430/dev/uart1x.c
Normal file
162
cpu/msp430/dev/uart1x.c
Normal file
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@ -0,0 +1,162 @@
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/*
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* Copyright (c) 2010, Swedish Institute of Computer Science
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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||||
* are met:
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||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
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||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
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||||
*
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* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
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||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)$Id: uart1x.c,v 1.1 2010/08/24 16:23:20 joxe Exp $
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*/
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/*
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* Machine dependent MSP430X UART1 code.
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*/
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#include <stdlib.h>
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#include <io.h>
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#include <signal.h>
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#include "sys/energest.h"
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#include "dev/uart1.h"
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#include "dev/watchdog.h"
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#include "lib/ringbuf.h"
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static int (*uart1_input_handler)(unsigned char c);
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static volatile uint8_t transmitting;
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#ifdef UART1_CONF_TX_WITH_INTERRUPT
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#define TX_WITH_INTERRUPT UART1_CONF_TX_WITH_INTERRUPT
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#else /* UART1_CONF_TX_WITH_INTERRUPT */
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#define TX_WITH_INTERRUPT 1
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#endif /* UART1_CONF_TX_WITH_INTERRUPT */
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#if TX_WITH_INTERRUPT
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#define TXBUFSIZE 64
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static struct ringbuf txbuf;
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static uint8_t txbuf_data[TXBUFSIZE];
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#endif /* TX_WITH_INTERRUPT */
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/*---------------------------------------------------------------------------*/
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uint8_t
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uart1_active(void)
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{
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return (UCA0STAT & UCBUSY) | transmitting;
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}
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/*---------------------------------------------------------------------------*/
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void
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uart1_set_input(int (*input)(unsigned char c))
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{
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uart1_input_handler = input;
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}
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/*---------------------------------------------------------------------------*/
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void
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uart1_writeb(unsigned char c)
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{
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/* watchdog_periodic(); */
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#if TX_WITH_INTERRUPT
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/* Put the outgoing byte on the transmission buffer. If the buffer
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is full, we just keep on trying to put the byte into the buffer
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until it is possible to put it there. */
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while(ringbuf_put(&txbuf, c) == 0);
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/* If there is no transmission going, we need to start it by putting
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the first byte into the UART. */
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if(transmitting == 0) {
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transmitting = 1;
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UCA0TXBUF = ringbuf_get(&txbuf);
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}
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#else /* TX_WITH_INTERRUPT */
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/* Loop until the transmission buffer is available. */
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while(!(IFG2 & UCA0TXIFG));
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/* Transmit the data. */
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UCA0TXBUF = c;
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#endif /* TX_WITH_INTERRUPT */
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}
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/*---------------------------------------------------------------------------*/
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#if ! WITH_UIP /* If WITH_UIP is defined, putchar() is defined by the SLIP driver */
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#endif /* ! WITH_UIP */
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/*---------------------------------------------------------------------------*/
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/**
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* Initalize the RS232 port.
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*
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*/
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void
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uart1_init(unsigned long ubr)
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{
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/* RS232 */
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P3SEL |= 0x30; /* P3.4,5 = USCI_A0 TXD/RXD */
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UCA0CTL1 |= UCSSEL_2; /* CLK = SMCLK */
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UCA0BR0 = 0x45; /* 8MHz/115200 = 69 = 0x45 */
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UCA0BR1 = 0x00;
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UCA0MCTL = UCBRS2; /* Modulation UCBRSx = 4 */
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UCA0CTL1 &= ~UCSWRST; /* Initialize USCI state machine */
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transmitting = 0;
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}
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/*---------------------------------------------------------------------------*/
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interrupt(USCIAB1RX_VECTOR)
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uart1_rx_interrupt(void)
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{
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uint8_t c;
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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/* Check status register for receive errors. */
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if(UCA0STAT & UCRXERR) {
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c = UCA0RXBUF; /* Clear error flags by forcing a dummy read. */
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} else {
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c = UCA0RXBUF;
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if(uart1_input_handler != NULL) {
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if(uart1_input_handler(c)) {
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LPM4_EXIT;
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}
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}
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}
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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/*---------------------------------------------------------------------------*/
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#if TX_WITH_INTERRUPT
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interrupt(USCIAB1TX_VECTOR)
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uart1_tx_interrupt(void)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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if(IFG2 & UCA0TXIFG) {
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if(ringbuf_elements(&txbuf) == 0) {
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transmitting = 0;
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} else {
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UCA0TXBUF = ringbuf_get(&txbuf);
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}
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}
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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}
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#endif /* TX_WITH_INTERRUPT */
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/*---------------------------------------------------------------------------*/
|
94
cpu/msp430/slip_uart0.c
Normal file
94
cpu/msp430/slip_uart0.c
Normal file
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/*
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||||
* Copyright (c) 2006, Swedish Institute of Computer Science
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* @(#)$Id: slip_uart0.c,v 1.1 2010/08/24 16:23:20 joxe Exp $
|
||||
*/
|
||||
|
||||
/*
|
||||
* Machine dependent MSP430 SLIP routines for UART0.
|
||||
*/
|
||||
|
||||
#include <io.h>
|
||||
#include <signal.h>
|
||||
|
||||
#include "contiki.h"
|
||||
|
||||
#include "dev/slip.h"
|
||||
#include "dev/uart0.h"
|
||||
/*---------------------------------------------------------------------------*/
|
||||
void
|
||||
slip_arch_writeb(unsigned char c)
|
||||
{
|
||||
uart0_writeb(c);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/*
|
||||
* The serial line is used to transfer IP packets using slip. To make
|
||||
* it possible to send debug output over the same line we send debug
|
||||
* output as slip frames (i.e delimeted by SLIP_END).
|
||||
*
|
||||
*/
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#if WITH_UIP
|
||||
int
|
||||
putchar(int c)
|
||||
{
|
||||
#define SLIP_END 0300
|
||||
static char debug_frame = 0;
|
||||
|
||||
if (!debug_frame) { /* Start of debug output */
|
||||
slip_arch_writeb(SLIP_END);
|
||||
slip_arch_writeb('\r'); /* Type debug line == '\r' */
|
||||
debug_frame = 1;
|
||||
}
|
||||
|
||||
slip_arch_writeb((char)c);
|
||||
|
||||
/*
|
||||
* Line buffered output, a newline marks the end of debug output and
|
||||
* implicitly flushes debug output.
|
||||
*/
|
||||
if (c == '\n') {
|
||||
slip_arch_writeb(SLIP_END);
|
||||
debug_frame = 0;
|
||||
}
|
||||
|
||||
return c;
|
||||
}
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
/**
|
||||
* Initalize the RS232 port and the SLIP driver.
|
||||
*
|
||||
*/
|
||||
void
|
||||
slip_arch_init(unsigned long ubr)
|
||||
{
|
||||
uart0_set_input(slip_input_byte);
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
78
cpu/msp430/spix.c
Normal file
78
cpu/msp430/spix.c
Normal file
|
@ -0,0 +1,78 @@
|
|||
/*
|
||||
* Copyright (c) 2006, Swedish Institute of Computer Science
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 3. Neither the name of the Institute nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* @(#)$Id: spix.c,v 1.1 2010/08/24 16:23:20 joxe Exp $
|
||||
*/
|
||||
|
||||
#include <io.h>
|
||||
|
||||
#include "contiki-conf.h"
|
||||
|
||||
/*
|
||||
* This is SPI initialization code for the MSP430X architecture.
|
||||
*
|
||||
*/
|
||||
unsigned char spi_busy = 0;
|
||||
|
||||
/*
|
||||
* Initialize SPI bus.
|
||||
*/
|
||||
void
|
||||
spi_init(void)
|
||||
{
|
||||
//static unsigned char spi_inited = 0;
|
||||
|
||||
//if (spi_inited)
|
||||
//return;
|
||||
|
||||
// Initalize ports for communication with SPI units.
|
||||
|
||||
UCB0CTL1 |= UCSWRST; //reset usci
|
||||
UCB0CTL1 |= UCSSEL_2; //smclk while usci is reset
|
||||
UCB0CTL0 = ( UCMSB | UCMST | UCSYNC | UCCKPL); // MSB-first 8-bit, Master, Synchronous, 3 pin SPI master, no ste, watch-out for clock-phase UCCKPH
|
||||
|
||||
UCB0BR1 = 0x00;
|
||||
UCB0BR0 = 0x02;
|
||||
|
||||
// UCB0MCTL = 0; // Dont need modulation control.
|
||||
|
||||
P3SEL |= BV(SCK) | BV(MOSI) | BV(MISO); // Select Peripheral functionality
|
||||
P3DIR |= BV(SCK) | BV(MISO); // Configure as outputs(SIMO,CLK).
|
||||
|
||||
//ME1 |= USPIE0; // Module enable ME1 --> U0ME? xxx/bg
|
||||
|
||||
// Clear pending interrupts before enable!!!
|
||||
IFG2 &= ~UCB0RXIFG;
|
||||
IFG2 &= ~UCB0TXIFG;
|
||||
UCB0CTL1 &= ~UCSWRST; // Remove RESET before enabling interrupts
|
||||
//Enable UCB0 Interrupts
|
||||
//IE2 |= UCB0TXIE; // Enable USCI_B0 TX Interrupts
|
||||
//IE2 |= UCB0RXIE; // Enable USCI_B0 RX Interrupts
|
||||
}
|
||||
|
||||
|
|
@ -28,7 +28,7 @@
|
|||
*
|
||||
* This file is part of the Contiki operating system.
|
||||
*
|
||||
* @(#)$Id: watchdog.c,v 1.8 2010/04/04 12:30:10 adamdunkels Exp $
|
||||
* @(#)$Id: watchdog.c,v 1.9 2010/08/24 16:23:20 joxe Exp $
|
||||
*/
|
||||
#include <io.h>
|
||||
#include <signal.h>
|
||||
|
@ -36,6 +36,7 @@
|
|||
|
||||
static int stopped = 0;
|
||||
/*---------------------------------------------------------------------------*/
|
||||
#ifdef CONTIKI_TARGET_SKY
|
||||
static void
|
||||
printchar(char c)
|
||||
{
|
||||
|
@ -62,16 +63,17 @@ printstring(char *s)
|
|||
printchar(*s++);
|
||||
}
|
||||
}
|
||||
#endif
|
||||
/*---------------------------------------------------------------------------*/
|
||||
interrupt(WDT_VECTOR)
|
||||
watchdog_interrupt(void)
|
||||
{
|
||||
#ifdef CONTIKI_TARGET_SKY
|
||||
uint8_t dummy;
|
||||
static uint8_t *ptr;
|
||||
static int i;
|
||||
|
||||
ptr = &dummy;
|
||||
|
||||
printstring("Watchdog reset");
|
||||
/* printstring("Watchdog reset at PC $");
|
||||
hexprint(ptr[3]);
|
||||
|
@ -89,6 +91,8 @@ watchdog_interrupt(void)
|
|||
}
|
||||
}
|
||||
printchar('\n');
|
||||
#endif
|
||||
|
||||
watchdog_reboot();
|
||||
}
|
||||
/*---------------------------------------------------------------------------*/
|
||||
|
|
Loading…
Reference in a new issue