Add structure-based ITC access
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@ -37,6 +37,59 @@
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#define ISR_H
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#define ISR_H
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#define INTBASE (0x80020000)
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#define INTBASE (0x80020000)
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/* Structure-based ITC access */
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#define __INTERRUPT_union(x) \
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union { \
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uint32_t x; \
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struct ITC_##x { \
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uint32_t ASM:1; \
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uint32_t UART1:1; \
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uint32_t UART2:1; \
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uint32_t CRM:1; \
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uint32_t I2C:1; \
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uint32_t TMR:1; \
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uint32_t SPIF:1; \
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uint32_t MACA:1; \
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uint32_t SSI:1; \
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uint32_t ADC:1; \
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uint32_t SPI:1; \
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uint32_t :21; \
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} x##bits; \
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};
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struct ITC_struct {
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union {
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uint32_t INTCNTL;
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struct ITC_INTCNTL {
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uint32_t :19;
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uint32_t FIAD:1;
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uint32_t NIAD:1;
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uint32_t :11;
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} INTCNTLbits;
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};
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uint32_t NIMASK;
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uint32_t INTENNUM;
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uint32_t INTDISNUM;
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__INTERRUPT_union(INTENABLE);
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__INTERRUPT_union(INTTYPE);
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uint32_t reserved[4];
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uint32_t NIVECTOR;
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uint32_t FIVECTOR;
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__INTERRUPT_union(INTSRC);
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__INTERRUPT_union(INTFRC);
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__INTERRUPT_union(NIPEND);
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__INTERRUPT_union(FIPEND);
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};
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#undef __INTERRUPT_union
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static volatile struct ITC_struct * const _ITC = (void *) (INTBASE);
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#define ITC (*_ITC)
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/* Old register definitions, for compatibility */
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#ifndef REG_NO_COMPAT
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#define INTCNTL_OFF (0x0)
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#define INTCNTL_OFF (0x0)
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#define INTENNUM_OFF (0x8)
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#define INTENNUM_OFF (0x8)
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#define INTDISNUM_OFF (0xC)
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#define INTDISNUM_OFF (0xC)
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@ -45,13 +98,13 @@
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#define INTFRC_OFF (0x34)
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#define INTFRC_OFF (0x34)
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#define NIPEND_OFF (0x38)
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#define NIPEND_OFF (0x38)
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#define INTCNTL ((volatile uint32_t *) (INTBASE + INTCNTL_OFF))
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static volatile uint32_t * const INTCNTL = ((volatile uint32_t *) (INTBASE + INTCNTL_OFF));
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#define INTENNUM ((volatile uint32_t *) (INTBASE + INTENNUM_OFF))
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static volatile uint32_t * const INTENNUM = ((volatile uint32_t *) (INTBASE + INTENNUM_OFF));
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#define INTDISNUM ((volatile uint32_t *) (INTBASE + INTDISNUM_OFF))
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static volatile uint32_t * const INTDISNUM = ((volatile uint32_t *) (INTBASE + INTDISNUM_OFF));
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#define INTENABLE ((volatile uint32_t *) (INTBASE + INTENABLE_OFF))
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static volatile uint32_t * const INTENABLE = ((volatile uint32_t *) (INTBASE + INTENABLE_OFF));
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#define INTSRC ((volatile uint32_t *) (INTBASE + INTSRC_OFF))
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static volatile uint32_t * const INTSRC = ((volatile uint32_t *) (INTBASE + INTSRC_OFF));
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#define INTFRC ((volatile uint32_t *) (INTBASE + INTFRC_OFF))
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static volatile uint32_t * const INTFRC = ((volatile uint32_t *) (INTBASE + INTFRC_OFF));
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#define NIPEND ((volatile uint32_t *) (INTBASE + NIPEND_OFF))
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static volatile uint32_t * const NIPEND = ((volatile uint32_t *) (INTBASE + NIPEND_OFF));
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enum interrupt_nums {
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enum interrupt_nums {
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INT_NUM_ASM = 0,
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INT_NUM_ASM = 0,
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@ -76,6 +129,8 @@ enum interrupt_nums {
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#define safe_irq_disable(x) volatile uint32_t saved_irq; saved_irq = *INTENABLE; disable_irq(x)
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#define safe_irq_disable(x) volatile uint32_t saved_irq; saved_irq = *INTENABLE; disable_irq(x)
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#define irq_restore() *INTENABLE = saved_irq
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#define irq_restore() *INTENABLE = saved_irq
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#endif /* REG_NO_COMPAT */
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extern void tmr0_isr(void) __attribute__((weak));
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extern void tmr0_isr(void) __attribute__((weak));
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extern void tmr1_isr(void) __attribute__((weak));
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extern void tmr1_isr(void) __attribute__((weak));
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extern void tmr2_isr(void) __attribute__((weak));
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extern void tmr2_isr(void) __attribute__((weak));
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@ -95,4 +150,3 @@ extern void maca_isr(void) __attribute__((weak));
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#endif
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#endif
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