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Reincarnate the sensinode/cc2430 port

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This commit is contained in:
George Oikonomou 2012-03-05 16:28:06 +00:00
parent c78b5bad5c
commit b7674c3636
114 changed files with 10044 additions and 3068 deletions
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47
cpu/cc2430/segment.rules
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@ -1,25 +1,26 @@
# segment.rules file assigns source code modules to specific banks
# segment.rules is constructed from any segment.rules found in the search path
# the search path is defined in Makefile.cc2430
# segment.rules get processed by a perl snippet listed in the Makefile.cc2430
# the processed output is put into the obj_* directory
# segment.rules files assign source code modules to specific banks
# These files are only used when we build code with banking (HAVE_BANKING=1)
# The final segment.rules file is constructed from any segment.rules found in
# the search path, defined in Makefile.cc2430
# When building bankable code, the bank-alloc.py script automatically allocates
# modules to banks. segment.rules files provide hints, instructing the script
# as to which files are safe to move around and which files to leave alone
# In other words, only specify a rule for a file if you need to
# comments starting with "#" are supported
# perl regular expression matching can be used on the file name specification
#
# general rules --
# some code must be placed in all banks (or SDCC/aslink will complain at link time)
# code called from function pointers must be in HOME/CSEG/BANK0
# interrupt code must also be in HOME/CSEG/BANK0
# code not marked with __banked can only be called from code in the same bank
# The file spec in rules is actually interpreted as a python regex so you can
# write a rule that will match multiple files
#
HOME intr.c # All interrupt code must live in HOME/BANK0
HOME bus.c # flash_read cannot be banked.
HOME clock.c # cannot bank clock.c code because header file is part of core.
HOME uart.c
BANK3 uart_init.c
BANK2 dma.c
CSEG cc2430/dev/bus.c
CSEG autostart.c
BANK2 cc2430/dev/cc2430_rf.c
BANK1 cc2430/
BANK1 .
# general rules --
# This file is only used when the Makefile defines HAVE_BANKING=1
# SDCC's standard libraries will always go in CSEG - We don't touch them
# Interrupt code must be in HOME. Specify all files with an ISR here
# All files without an associated rule get allocated to a bank automatically
# Files with ISRs must be in HOME
HOME intr.c # Match all files ending in intr.c (e.g. uart_intr.c)
HOME rtimer-arch.c
HOME watchdog-cc2430.c
HOME clock.c
# Some cc2430 files which need special treatment
HOME bus.c # bus.c::flash_read() must be run from HOME (if compiled in)