Changes to enable TSCH
poll mode for TSCH including SFD timestamps and send_on_cca
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b4c2cd9619
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b0a673ca5c
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@ -120,6 +120,17 @@ static const uint8_t magic[] = { 0x53, 0x6E, 0x69, 0x66 }; /** Snif */
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#define CC2538_RF_AUTOACK 1
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#endif
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/*---------------------------------------------------------------------------*/
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#if CC2538_RF_CONF_SFD_TIMESTAMPS
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static rtimer_clock_t cc2538_sfd_rtime;
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#endif
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/* Are we currently in poll mode? Disabled by default */
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static uint8_t volatile poll_mode = 0;
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/* Do we perform a CCA before sending? Enabled by default. */
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static uint8_t send_on_cca = 1;
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static int8_t cc2538_last_rssi;
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static uint8_t cc2538_last_crc_corr_lqi;
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/*---------------------------------------------------------------------------*/
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static uint8_t rf_flags;
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static uint8_t rf_channel = CC2538_RF_CHANNEL;
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@ -329,6 +340,29 @@ set_frame_filtering(uint8_t enable)
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_poll_mode(uint8_t enable)
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{
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poll_mode = enable;
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if(enable) {
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_FIFOP; // mask out FIFOP interrupt source
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_FIFOP; // clear pending FIFOP interrupt
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_SFD; // enable SFD interrupt source
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} else {
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP; // enable FIFOP interrupt source
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REG(RFCORE_XREG_RFIRQM0) &= ~RFCORE_XREG_RFIRQM0_SFD; // mask out SFD interrupt source
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REG(RFCORE_SFR_RFIRQF0) &= ~RFCORE_SFR_RFIRQF0_SFD; // clear pending SFD interrupt
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}
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nvic_interrupt_enable(NVIC_INT_RF_RXTX); // enable RF interrupts
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_send_on_cca(uint8_t enable)
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{
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send_on_cca = enable;
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}
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/*---------------------------------------------------------------------------*/
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static void
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set_auto_ack(uint8_t enable)
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{
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if(enable) {
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@ -395,7 +429,9 @@ off(void)
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/* Wait for ongoing TX to complete (e.g. this could be an outgoing ACK) */
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while(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_TX_ACTIVE);
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CC2538_RF_CSP_ISFLUSHRX();
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if (!(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP)) {
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CC2538_RF_CSP_ISFLUSHRX();
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}
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/* Don't turn off if we are off as this will trigger a Strobe Error */
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if(REG(RFCORE_XREG_RXENABLE) != 0) {
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@ -459,10 +495,6 @@ init(void)
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set_channel(rf_channel);
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/* Acknowledge RF interrupts, FIFOP only */
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REG(RFCORE_XREG_RFIRQM0) |= RFCORE_XREG_RFIRQM0_FIFOP;
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nvic_interrupt_enable(NVIC_INT_RF_RXTX);
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/* Acknowledge all RF Error interrupts */
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REG(RFCORE_XREG_RFERRM) = RFCORE_XREG_RFERRM_RFERRM;
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nvic_interrupt_enable(NVIC_INT_RF_ERR);
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@ -488,6 +520,8 @@ init(void)
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*/
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udma_set_channel_src(CC2538_RF_CONF_RX_DMA_CHAN, RFCORE_SFR_RFDATA);
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}
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set_poll_mode(poll_mode);
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process_start(&cc2538_rf_process, NULL);
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@ -700,15 +734,15 @@ read(void *buf, unsigned short bufsize)
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}
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/* Read the RSSI and CRC/Corr bytes */
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rssi = ((int8_t)REG(RFCORE_SFR_RFDATA)) - RSSI_OFFSET;
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crc_corr = REG(RFCORE_SFR_RFDATA);
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cc2538_last_rssi = ((int8_t)REG(RFCORE_SFR_RFDATA)) - RSSI_OFFSET;
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cc2538_last_crc_corr_lqi = REG(RFCORE_SFR_RFDATA);
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PRINTF("%02x%02x\n", (uint8_t)rssi, crc_corr);
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PRINTF("%02x%02x\n", (uint8_t)cc2538_last_rssi, cc2538_last_crc_corr_lqi);
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/* MS bit CRC OK/Not OK, 7 LS Bits, Correlation value */
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if(crc_corr & CRC_BIT_MASK) {
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packetbuf_set_attr(PACKETBUF_ATTR_RSSI, rssi);
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packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, crc_corr & LQI_BIT_MASK);
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if(cc2538_last_crc_corr_lqi & CRC_BIT_MASK) {
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packetbuf_set_attr(PACKETBUF_ATTR_RSSI, cc2538_last_rssi);
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packetbuf_set_attr(PACKETBUF_ATTR_LINK_QUALITY, cc2538_last_crc_corr_lqi & LQI_BIT_MASK);
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RIMESTATS_ADD(llrx);
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} else {
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RIMESTATS_ADD(badcrc);
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@ -731,14 +765,18 @@ read(void *buf, unsigned short bufsize)
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flush();
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#endif
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/* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFO) {
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process_poll(&cc2538_rf_process);
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} else {
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CC2538_RF_CSP_ISFLUSHRX();
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if(!poll_mode) {
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/* If FIFOP==1 and FIFO==0 then we had a FIFO overflow at some point. */
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFOP) {
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if(REG(RFCORE_XREG_FSMSTAT1) & RFCORE_XREG_FSMSTAT1_FIFO) {
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process_poll(&cc2538_rf_process);
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} else {
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CC2538_RF_CSP_ISFLUSHRX();
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}
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}
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}
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CC2538_RF_CSP_ISFLUSHRX();
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return (len);
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}
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@ -796,6 +834,15 @@ get_value(radio_param_t param, radio_value_t *value)
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if(REG(RFCORE_XREG_FRMCTRL0) & RFCORE_XREG_FRMCTRL0_AUTOACK) {
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*value |= RADIO_RX_MODE_AUTOACK;
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}
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if(poll_mode) {
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*value |= RADIO_RX_MODE_POLL_MODE;
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}
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TX_MODE:
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*value = 0;
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if(send_on_cca) {
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*value |= RADIO_TX_MODE_SEND_ON_CCA;
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}
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TXPOWER:
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*value = get_tx_power();
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@ -806,6 +853,12 @@ get_value(radio_param_t param, radio_value_t *value)
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case RADIO_PARAM_RSSI:
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*value = get_rssi();
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return RADIO_RESULT_OK;
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case RADIO_PARAM_LAST_RSSI:
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*value = cc2538_last_rssi;
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return RADIO_RESULT_OK;
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case RADIO_PARAM_LAST_LINK_QUALITY:
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*value = cc2538_last_crc_corr_lqi & LQI_BIT_MASK;
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return RADIO_RESULT_OK;
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case RADIO_CONST_CHANNEL_MIN:
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*value = CC2538_RF_CHANNEL_MIN;
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return RADIO_RESULT_OK;
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@ -854,13 +907,21 @@ set_value(radio_param_t param, radio_value_t value)
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return RADIO_RESULT_OK;
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case RADIO_PARAM_RX_MODE:
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if(value & ~(RADIO_RX_MODE_ADDRESS_FILTER |
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RADIO_RX_MODE_AUTOACK)) {
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RADIO_RX_MODE_AUTOACK |
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RADIO_RX_MODE_POLL_MODE)) {
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return RADIO_RESULT_INVALID_VALUE;
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}
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set_frame_filtering((value & RADIO_RX_MODE_ADDRESS_FILTER) != 0);
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set_auto_ack((value & RADIO_RX_MODE_AUTOACK) != 0);
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set_poll_mode((value & RADIO_RX_MODE_POLL_MODE) != 0);
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TX_MODE:
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if(value & ~(RADIO_TX_MODE_SEND_ON_CCA)) {
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return RADIO_RESULT_INVALID_VALUE;
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}
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set_send_on_cca((value & RADIO_TX_MODE_SEND_ON_CCA) != 0);
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return RADIO_RESULT_OK;
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case RADIO_PARAM_TXPOWER:
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if(value < OUTPUT_POWER_MIN || value > OUTPUT_POWER_MAX) {
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@ -895,6 +956,19 @@ get_object(radio_param_t param, void *dest, size_t size)
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return RADIO_RESULT_OK;
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}
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if(param == RADIO_PARAM_LAST_PACKET_TIMESTAMP) {
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#if CC2538_RF_CONF_SFD_TIMESTAMPS
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if(size != sizeof(rtimer_clock_t) || !dest) {
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return RADIO_RESULT_INVALID_VALUE;
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}
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*(rtimer_clock_t*)dest = cc2538_sfd_rtime;
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return RADIO_RESULT_OK;
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#else
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return RADIO_RESULT_NOT_SUPPORTED;
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#endif
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}
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return RADIO_RESULT_NOT_SUPPORTED;
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}
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/*---------------------------------------------------------------------------*/
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@ -950,15 +1024,18 @@ PROCESS_THREAD(cc2538_rf_process, ev, data)
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PROCESS_BEGIN();
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while(1) {
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PROCESS_YIELD_UNTIL(ev == PROCESS_EVENT_POLL);
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/* Only if we are not in poll mode oder we are in poll mode and transceiver has to be reset */
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PROCESS_YIELD_UNTIL((!poll_mode || (poll_mode && (rf_flags & RF_MUST_RESET))) && (ev == PROCESS_EVENT_POLL));
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packetbuf_clear();
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len = read(packetbuf_dataptr(), PACKETBUF_SIZE);
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if(!poll_mode) {
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packetbuf_clear();
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len = read(packetbuf_dataptr(), PACKETBUF_SIZE);
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if(len > 0) {
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packetbuf_set_datalen(len);
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if(len > 0) {
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packetbuf_set_datalen(len);
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NETSTACK_RDC.input();
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NETSTACK_RDC.input();
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}
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}
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/* If we were polled due to an RF error, reset the transceiver */
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@ -995,10 +1072,18 @@ void
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cc2538_rf_rx_tx_isr(void)
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{
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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#if CC2538_RF_CONF_SFD_TIMESTAMPS
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if(poll_mode) {
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cc2538_sfd_rtime = RTIMER_NOW();
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}
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#endif
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process_poll(&cc2538_rf_process);
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if(!poll_mode) {
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process_poll(&cc2538_rf_process);
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}
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/* We only acknowledge FIFOP so we can safely wipe out the entire SFR */
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/* We only acknowledge FIFOP or SFD so we can safely wipe out the entire SFR */
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REG(RFCORE_SFR_RFIRQF0) = 0;
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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