bugfix blockmode, 8 Hz dutycyle as standard

This commit is contained in:
harald42 2013-11-15 13:47:15 +01:00 committed by harald
parent 0ef2ce8e5c
commit aea396e542
2 changed files with 3 additions and 1 deletions

View file

@ -700,10 +700,12 @@ ISR(TRX24_TX_END_vect)
rf230_txendwait=0;
}
extern volatile uint8_t rf230_pending;
/* Frame address has matched ours */
ISR(TRX24_XAH_AMI_vect)
{
// DEBUGFLOW('8');
rf230_pending=1;
}
/* CCAED measurement has completed */

View file

@ -238,7 +238,7 @@ typedef unsigned short uip_stats_t;
#define NETSTACK_CONF_MAC csma_driver
#define NETSTACK_CONF_RDC contikimac_driver
/* Default is two CCA separated by 500 usec */
#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 16
#define NETSTACK_CONF_RDC_CHANNEL_CHECK_RATE 8
/* Wireshark won't decode with the header, but padded packets will fail ipv6 checksum */
#define CONTIKIMAC_CONF_WITH_CONTIKIMAC_HEADER 0
/* So without the header this needed for RPL mesh to form */