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bugfix blockmode, 8 Hz dutycyle as standard

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harald42 2013-11-15 13:47:15 +01:00 • committed by harald
parent 0ef2ce8e5c
commit aea396e542
2 changed files with 3 additions and 1 deletions
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2
cpu/avr/radio/rf230bb/halbb.c
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@ -700,10 +700,12 @@ ISR(TRX24_TX_END_vect)
rf230_txendwait=0;
}
extern volatile uint8_t rf230_pending;
/* Frame address has matched ours */
ISR(TRX24_XAH_AMI_vect)
{
// DEBUGFLOW('8');
rf230_pending=1;
}
/* CCAED measurement has completed */