Fixed wrong first cycle_start
The first time that powercycle() runs, cycle_start is incremented by CHECK_TIME twice which causes the second cycle to be late. This commit fixes this.
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0313a429e2
commit
ac6a1c5255
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@ -289,9 +289,15 @@ off(void)
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}
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}
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/*---------------------------------------------------------------------------*/
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static volatile rtimer_clock_t cycle_start;
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static void powercycle_wrapper(struct rtimer *t, void *ptr);
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static char powercycle(struct rtimer *t, void *ptr);
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/*---------------------------------------------------------------------------*/
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static volatile rtimer_clock_t cycle_start;
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#if SYNC_CYCLE_STARTS
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static volatile rtimer_clock_t sync_cycle_start;
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static volatile uint8_t sync_cycle_phase;
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#endif
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/*---------------------------------------------------------------------------*/
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static void
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schedule_powercycle(struct rtimer *t, rtimer_clock_t time)
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{
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@ -365,13 +371,34 @@ powercycle_wrapper(struct rtimer *t, void *ptr)
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powercycle(t, ptr);
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}
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/*---------------------------------------------------------------------------*/
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static void
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advance_cycle_start(void)
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{
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#if SYNC_CYCLE_STARTS
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/* Compute cycle start when RTIMER_ARCH_SECOND is not a multiple
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of CHANNEL_CHECK_RATE */
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if(sync_cycle_phase++ == NETSTACK_RDC_CHANNEL_CHECK_RATE) {
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sync_cycle_phase = 0;
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sync_cycle_start += RTIMER_ARCH_SECOND;
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cycle_start = sync_cycle_start;
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} else if( (RTIMER_ARCH_SECOND * NETSTACK_RDC_CHANNEL_CHECK_RATE) > 65535) {
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uint32_t phase_time = sync_cycle_phase*RTIMER_ARCH_SECOND;
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cycle_start = sync_cycle_start + phase_time/NETSTACK_RDC_CHANNEL_CHECK_RATE;
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} else {
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unsigned phase_time = sync_cycle_phase*RTIMER_ARCH_SECOND;
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cycle_start = sync_cycle_start + phase_time/NETSTACK_RDC_CHANNEL_CHECK_RATE;
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}
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#endif
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cycle_start += CYCLE_TIME;
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}
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/*---------------------------------------------------------------------------*/
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static char
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powercycle(struct rtimer *t, void *ptr)
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{
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#if SYNC_CYCLE_STARTS
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static volatile rtimer_clock_t sync_cycle_start;
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static volatile uint8_t sync_cycle_phase;
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#endif
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PT_BEGIN(&pt);
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@ -385,24 +412,6 @@ powercycle(struct rtimer *t, void *ptr)
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static uint8_t packet_seen;
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static uint8_t count;
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#if SYNC_CYCLE_STARTS
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/* Compute cycle start when RTIMER_ARCH_SECOND is not a multiple
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of CHANNEL_CHECK_RATE */
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if(sync_cycle_phase++ == NETSTACK_RDC_CHANNEL_CHECK_RATE) {
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sync_cycle_phase = 0;
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sync_cycle_start += RTIMER_ARCH_SECOND;
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cycle_start = sync_cycle_start;
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} else {
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#if (RTIMER_ARCH_SECOND * NETSTACK_RDC_CHANNEL_CHECK_RATE) > 65535
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cycle_start = sync_cycle_start + ((unsigned long)(sync_cycle_phase*RTIMER_ARCH_SECOND))/NETSTACK_RDC_CHANNEL_CHECK_RATE;
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#else
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cycle_start = sync_cycle_start + (sync_cycle_phase*RTIMER_ARCH_SECOND)/NETSTACK_RDC_CHANNEL_CHECK_RATE;
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#endif
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}
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#else
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cycle_start += CYCLE_TIME;
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#endif
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packet_seen = 0;
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for(count = 0; count < CCA_COUNT_MAX; ++count) {
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@ -483,22 +492,25 @@ powercycle(struct rtimer *t, void *ptr)
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}
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}
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if(RTIMER_CLOCK_LT(RTIMER_NOW() - cycle_start, CYCLE_TIME - CHECK_TIME * 4)) {
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advance_cycle_start();
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if(RTIMER_CLOCK_LT(RTIMER_NOW() , cycle_start - CHECK_TIME * 4)) {
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/* Schedule the next powercycle interrupt, or sleep the mcu
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until then. Sleeping will not exit from this interrupt, so
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ensure an occasional wake cycle or foreground processing will
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be blocked until a packet is detected */
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until then. Sleeping will not exit from this interrupt, so
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ensure an occasional wake cycle or foreground processing will
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be blocked until a packet is detected */
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#if RDC_CONF_MCU_SLEEP
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static uint8_t sleepcycle;
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if((sleepcycle++ < 16) && !we_are_sending && !radio_is_on) {
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rtimer_arch_sleep(CYCLE_TIME - (RTIMER_NOW() - cycle_start));
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rtimer_arch_sleep(RTIMER_NOW() - cycle_start);
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} else {
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sleepcycle = 0;
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schedule_powercycle_fixed(t, CYCLE_TIME + cycle_start);
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schedule_powercycle_fixed(t, cycle_start);
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PT_YIELD(&pt);
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}
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#else
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schedule_powercycle_fixed(t, CYCLE_TIME + cycle_start);
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schedule_powercycle_fixed(t, cycle_start);
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PT_YIELD(&pt);
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#endif
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}
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