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update nvm-write

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This commit is contained in:
Mariano Alvira 2010-02-26 13:03:37 -05:00
parent 8f6e672cc0
commit a791be393b
3 changed files with 22 additions and 52 deletions
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2
tests/Makefile
View file

@ -1,6 +1,6 @@
MC1322X := ..
TARGETS := blink-red blink-green blink-blue blink-white blink-allio uart1-loopback nvm-read
TARGETS := blink-red blink-green blink-blue blink-white blink-allio uart1-loopback nvm-read nvm-write
include $(MC1322X)/Makefile.include

4
tests/nvm-read.c
View file

@ -46,10 +46,6 @@ void main(void) {
vreg_init();
// puts("CRM status: 0x");
// put_hex32(reg(0x80003018));
// puts("\n\r");
puts("Detecting internal nvm\n\r");
err = nvm_detect(gNvmInternalInterface_c, &type);

68
tests/nvm-write.c
View file

@ -1,27 +1,19 @@
#define GPIO_FUNC_SEL0 0x80000018 /* GPIO 15 - 0; 2 bit blocks */
#include <mc1322x.h>
#include <board.h>
#include <uart1.h>
#include <nvm.h>
#define BASE_UART1 0x80005000
#define UART1_CON 0x80005000
#define UART1_STAT 0x80005004
#define UART1_DATA 0x80005008
#define UR1CON 0x8000500c
#define UT1CON 0x80005010
#define UART1_CTS 0x80005014
#define UART1_BR 0x80005018
/* INC = 767; MOD = 9999 works: 115200 @ 24 MHz 16 bit sample */
#define INC 767
#define MOD 9999
#define GPIO_PAD_DIR0 0x80000000
#define GPIO_DATA0 0x80000008
#define NBYTES 8
#define WRITE_ADDR 0x1e000
#define WRITEVAL0 0xdeadbeef
#define WRITEVAL1 0xdeadbeef
#include "embedded_types.h"
#include "nvm.h"
#include "maca.h"
#define reg(x) (*(volatile uint32_t *)(x))
#define DELAY 400000
void putc(uint8_t c);
void puts(uint8_t *s);
void putc(char c);
void puts(char *s);
void put_hex(uint8_t x);
void put_hex16(uint16_t x);
void put_hex32(uint32_t x);
@ -29,46 +21,28 @@ void put_hex32(uint32_t x);
const uint8_t hex[16]={'0','1','2','3','4','5','6','7',
'8','9','a','b','c','d','e','f'};
#include "isr.h"
#define NBYTES 8
#define WRITE_ADDR 0x1e000
//#define WRITE_ADDR 0x0
#define WRITEVAL0 0x00000001
#define WRITEVAL1 0x00000000
__attribute__ ((section ("startup")))
void main(void) {
nvmType_t type=0;
nvmErr_t err;
uint32_t buf[NBYTES/4];
uint32_t i;
*(volatile uint32_t *)GPIO_PAD_DIR0 = 0x00000100;
/* Restore UART regs. to default */
/* in case there is still bootloader state leftover */
reg(UART1_CON) = 0x0000c800; /* mask interrupts, 16 bit sample --- helps explain the baud rate */
*UART1_CON = 0x0000c800; /* mask interrupts, 16 bit sample --- helps explain the baud rate */
/* INC = 767; MOD = 9999 works: 115200 @ 24 MHz 16 bit sample */
#define INC 767
#define MOD 9999
reg(UART1_BR) = INC<<16 | MOD;
*UART1_BR = INC<<16 | MOD;
/* see Section 11.5.1.2 Alternate Modes */
/* you must enable the peripheral first BEFORE setting the function in GPIO_FUNC_SEL */
/* From the datasheet: "The peripheral function will control operation of the pad IF */
/* THE PERIPHERAL IS ENABLED. */
reg(UART1_CON) = 0x00000003; /* enable receive and transmit */
reg(GPIO_FUNC_SEL0) = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
*UART1_CON = 0x00000003; /* enable receive and transmit */
*GPIO_FUNC_SEL0 = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/
vreg_init();
// puts("CRM status: 0x");
// put_hex32(reg(0x80003018));
// puts("\n\r");
puts("Detecting internal nvm\n\r");
err = nvm_detect(gNvmInternalInterface_c, &type);
@ -115,12 +89,12 @@ void main(void) {
while(1) {continue;};
}
void putc(uint8_t c) {
while(reg(UT1CON)==31); /* wait for there to be room in the buffer */
reg(UART1_DATA) = c;
void putc(char c) {
while(*UT1CON == 31); /* wait for there to be room in the buffer */
*UART1_DATA = c;
}
void puts(uint8_t *s) {
void puts(char *s) {
while(s && *s!=0) {
putc(*s++);
}