Make sure correct clocks is running in the RF Core (RFE).
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parent
43b9679bcc
commit
a56b520215
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@ -106,7 +106,12 @@ static bool rat_offset_known = false;
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PROCESS(rf_core_process, "CC13xx / CC26xx RF driver");
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PROCESS(rf_core_process, "CC13xx / CC26xx RF driver");
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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#define RF_CORE_CLOCKS_MASK (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M \
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#define RF_CORE_CLOCKS_MASK (RFC_PWR_PWMCLKEN_RFC_M | RFC_PWR_PWMCLKEN_CPE_M \
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| RFC_PWR_PWMCLKEN_CPERAM_M)
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| RFC_PWR_PWMCLKEN_CPERAM_M | RFC_PWR_PWMCLKEN_FSCA_M \
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| RFC_PWR_PWMCLKEN_PHA_M | RFC_PWR_PWMCLKEN_RAT_M \
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| RFC_PWR_PWMCLKEN_RFERAM_M | RFC_PWR_PWMCLKEN_RFE_M \
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| RFC_PWR_PWMCLKEN_MDMRAM_M | RFC_PWR_PWMCLKEN_MDM_M)
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/*---------------------------------------------------------------------------*/
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#define RF_CMD0 0x0607
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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uint8_t
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uint8_t
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rf_core_is_accessible()
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rf_core_is_accessible()
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@ -258,6 +263,12 @@ rf_core_power_up()
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/* Let CPE boot */
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/* Let CPE boot */
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HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RF_CORE_CLOCKS_MASK;
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HWREG(RFC_PWR_NONBUF_BASE + RFC_PWR_O_PWMCLKEN) = RF_CORE_CLOCKS_MASK;
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/* Turn on additional clocks on boot */
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HWREG(RFC_DBELL_BASE + RFC_DBELL_O_RFACKIFG) = 0;
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HWREG(RFC_DBELL_BASE+RFC_DBELL_O_CMDR) =
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CMDR_DIR_CMD_2BYTE(RF_CMD0,
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RFC_PWR_PWMCLKEN_MDMRAM | RFC_PWR_PWMCLKEN_RFERAM);
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/* Send ping (to verify RFCore is ready and alive) */
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/* Send ping (to verify RFCore is ready and alive) */
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if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_PING), &cmd_status) != RF_CORE_CMD_OK) {
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if(rf_core_send_cmd(CMDR_DIR_CMD(CMD_PING), &cmd_status) != RF_CORE_CMD_OK) {
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PRINTF("rf_core_power_up: CMD_PING fail, CMDSTA=0x%08lx\n", cmd_status);
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PRINTF("rf_core_power_up: CMD_PING fail, CMDSTA=0x%08lx\n", cmd_status);
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