Cleanup and refactoring of the STM32w port
This is a general cleanup of things like code style issues and code structure of the STM32w port to make it more like the rest of Contiki is structured.
This commit is contained in:
Adam Dunkels
parent
12b3d02ba1
commit
a5046e83c7
118 changed files with 4470 additions and 4281 deletions
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/**
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* \addtogroup mb851-platform
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*
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* @{
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*/
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/*
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* Copyright (c) 2010, STMicroelectronics.
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* All rights reserved.
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@ -27,23 +33,18 @@
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* This file is part of the Contiki OS
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*
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*/
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/*---------------------------------------------------------------------------*/
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/**
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* \file
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* Real-timer specific implementation for STM32W.
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* \author
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* Salvatore Pitrulli <salvopitru@users.sourceforge.net>
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*/
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/*---------------------------------------------------------------------------*/
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#include "sys/energest.h"
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#include "sys/rtimer.h"
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#define DEBUG 0
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#if DEBUG
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#include <stdio.h>
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@ -52,123 +53,116 @@
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#define PRINTF(...)
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#endif
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static uint16_t saved_TIM1CFG;
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static uint32_t time_msb = 0; /* Most significant bits of the current time. */
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static uint32_t time_msb = 0; // Most significant bits of the current time.
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// time of the next rtimer event. Initially is set to the max value.
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/* time of the next rtimer event. Initially is set to the max
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value. */
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static rtimer_clock_t next_rtimer_time = 0;
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static uint16_t saved_TIM1CFG;
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/*---------------------------------------------------------------------------*/
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void halTimer1Isr(void){
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if(INT_TIM1FLAG & INT_TIMUIF){ // Overflow event.
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//PRINTF("O %4x.\r\n", TIM1_CNT);
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//printf("OV ");
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void
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halTimer1Isr(void)
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{
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if(INT_TIM1FLAG & INT_TIMUIF) {
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rtimer_clock_t now, clock_to_wait;
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/* Overflow event. */
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/* PRINTF("O %4x.\r\n", TIM1_CNT); */
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/* printf("OV "); */
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time_msb++;
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rtimer_clock_t now = ((rtimer_clock_t)time_msb << 16)|TIM1_CNT;
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rtimer_clock_t clock_to_wait = next_rtimer_time - now;
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if(clock_to_wait <= 0x10000 && clock_to_wait > 0){ // We must set now the Timer Compare Register.
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TIM1_CCR1 = (int16u)clock_to_wait;
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now = ((rtimer_clock_t) time_msb << 16) | TIM1_CNT;
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clock_to_wait = next_rtimer_time - now;
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if(clock_to_wait <= 0x10000 && clock_to_wait > 0) {
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/* We must now set the Timer Compare Register. */
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TIM1_CCR1 = (uint16_t) clock_to_wait;
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INT_TIM1FLAG = INT_TIMCC1IF;
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INT_TIM1CFG |= INT_TIMCC1IF; // Compare 1 interrupt enable.
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}
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INT_TIM1CFG |= INT_TIMCC1IF; /* Compare 1 interrupt enable. */
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}
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INT_TIM1FLAG = INT_TIMUIF;
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} else {
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if(INT_TIM1FLAG & INT_TIMCC1IF) {
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/* Compare event. */
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INT_TIM1CFG &= ~INT_TIMCC1IF; /* Disable the next compare interrupt */
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PRINTF("\nCompare event %4x\r\n", TIM1_CNT);
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PRINTF("INT_TIM1FLAG %2x\r\n", INT_TIM1FLAG);
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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rtimer_run_next();
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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INT_TIM1FLAG = INT_TIMCC1IF;
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}
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}
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else if(INT_TIM1FLAG & INT_TIMCC1IF){ // Compare event.
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INT_TIM1CFG &= ~INT_TIMCC1IF; // Disable the next compare interrupt
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PRINTF("\nCompare event %4x\r\n", TIM1_CNT);
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PRINTF("INT_TIM1FLAG %2x\r\n", INT_TIM1FLAG);
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ENERGEST_ON(ENERGEST_TYPE_IRQ);
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rtimer_run_next();
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ENERGEST_OFF(ENERGEST_TYPE_IRQ);
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INT_TIM1FLAG = INT_TIMCC1IF;
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}
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}
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_init(void)
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{
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TIM1_CR1 = 0;
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TIM1_PSC = RT_PRESCALER;
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TIM1_ARR = 0xffff; // Counting from 0 to the maximum value.
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// Bits of TIMx_CCMR1 as default.
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TIM1_EGR = TIM_UG; // Update Generation.
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TIM1_PSC = RTIMER_ARCH_PRESCALER;
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/* Counting from 0 to the maximum value. */
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TIM1_ARR = 0xffff;
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/* Bits of TIMx_CCMR1 as default. */
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/* Update Generation. */
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TIM1_EGR = TIM_UG;
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INT_TIM1FLAG = 0xffff;
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INT_TIM1CFG = INT_TIMUIF; // Update interrupt enable (interrupt on overflow).
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TIM1_CR1 = TIM_CEN; // Counter enable.
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INT_CFGSET = INT_TIM1; // Enable top level interrupt.
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/* Update interrupt enable (interrupt on overflow).*/
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INT_TIM1CFG = INT_TIMUIF;
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/* Counter enable. */
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TIM1_CR1 = TIM_CEN;
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/* Enable top level interrupt. */
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INT_CFGSET = INT_TIM1;
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}
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/*---------------------------------------------------------------------------*/
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void rtimer_arch_disable_irq(void)
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void
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rtimer_arch_disable_irq(void)
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{
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ATOMIC(
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saved_TIM1CFG = INT_TIM1CFG;
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INT_TIM1CFG = 0;
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)
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ATOMIC(saved_TIM1CFG = INT_TIM1CFG; INT_TIM1CFG = 0;)
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}
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/*---------------------------------------------------------------------------*/
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void rtimer_arch_enable_irq(void)
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void
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rtimer_arch_enable_irq(void)
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{
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INT_TIM1CFG = saved_TIM1CFG;
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}
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/*---------------------------------------------------------------------------*/
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rtimer_clock_t rtimer_arch_now(void)
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rtimer_clock_t
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rtimer_arch_now(void)
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{
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return ((rtimer_clock_t)time_msb << 16)|TIM1_CNT;
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rtimer_clock_t t;
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ATOMIC(t = ((rtimer_clock_t) time_msb << 16) | TIM1_CNT;)
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return t;
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}
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/*---------------------------------------------------------------------------*/
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void
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rtimer_arch_schedule(rtimer_clock_t t)
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{
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PRINTF("rtimer_arch_schedule time %4x\r\n", /*((uint32_t*)&t)+1,*/(uint32_t)t);
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rtimer_clock_t now, clock_to_wait;
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PRINTF("rtimer_arch_schedule time %4x\r\n", /*((uint32_t*)&t)+1, */
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(uint32_t)t);
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next_rtimer_time = t;
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rtimer_clock_t now = rtimer_arch_now();
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rtimer_clock_t clock_to_wait = t - now;
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now = rtimer_arch_now();
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clock_to_wait = t - now;
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PRINTF("now %2x\r\n", TIM1_CNT);
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PRINTF("clock_to_wait %4x\r\n", clock_to_wait);
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if(clock_to_wait <= 0x10000){ // We must set now the Timer Compare Register.
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TIM1_CCR1 = (int16u)now + (int16u)clock_to_wait;
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if(clock_to_wait <= 0x10000) {
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/* We must now set the Timer Compare Register. */
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TIM1_CCR1 = (uint16_t)now + (uint16_t)clock_to_wait;
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INT_TIM1FLAG = INT_TIMCC1IF;
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INT_TIM1CFG |= INT_TIMCC1IF; // Compare 1 interrupt enable.
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INT_TIM1CFG |= INT_TIMCC1IF; /* Compare 1 interrupt enable. */
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PRINTF("2-INT_TIM1FLAG %2x\r\n", INT_TIM1FLAG);
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}
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// else compare register will be set at overflow interrupt closer to the rtimer event.
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/* else compare register will be set at overflow interrupt closer to
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the rtimer event. */
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}
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/*---------------------------------------------------------------------------*/
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/** @} */
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