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Cleanup and refactoring of the STM32w port

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This is a general cleanup of things like code style issues and code structure of the STM32w port to make it more like the rest of Contiki is structured.
This commit is contained in:
Adam Dunkels 2013-03-15 16:14:09 +01:00
parent 12b3d02ba1
commit a5046e83c7
118 changed files with 4470 additions and 4281 deletions
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60
cpu/stm32w108/hal/micro/cortexm3/adc.c
View file

@ -10,18 +10,18 @@
#if (NUM_ADC_USERS > 8)
#error NUM_ADC_USERS must not be greater than 8, or int8u variables in adc.c must be changed
#error NUM_ADC_USERS must not be greater than 8, or uint8_t variables in adc.c must be changed
#endif
static int16u adcData; // conversion result written by DMA
static int8u adcPendingRequests; // bitmap of pending requests
volatile static int8u adcPendingConversion; // id of pending conversion
static int8u adcReadingValid; // bitmap of valid adcReadings
static int16u adcReadings[NUM_ADC_USERS];
static int16u adcConfig[NUM_ADC_USERS];
static uint16_t adcData; // conversion result written by DMA
static uint8_t adcPendingRequests; // bitmap of pending requests
volatile static uint8_t adcPendingConversion; // id of pending conversion
static uint8_t adcReadingValid; // bitmap of valid adcReadings
static uint16_t adcReadings[NUM_ADC_USERS];
static uint16_t adcConfig[NUM_ADC_USERS];
static boolean adcCalibrated;
static int16s Nvss;
static int16s Nvdd;
static int16_t Nvss;
static int16_t Nvdd;
/* Modified the original ADC driver for enabling the ADC extended range mode required for
supporting the STLM20 temperature sensor.
NOTE:
@ -30,10 +30,10 @@ static int16s Nvdd;
the temperature values
*/
#ifdef ENABLE_ADC_EXTENDED_RANGE_BROKEN
static int16s Nvref;
static int16s Nvref2;
static int16_t Nvref;
static int16_t Nvref2;
#endif /* ENABLE_ADC_EXTENDED_RANGE_BROKEN */
static int16u adcStaticConfig;
static uint16_t adcStaticConfig;
void halAdcSetClock(boolean slow)
{
@ -73,8 +73,8 @@ boolean halAdcGetRange(void)
void halAdcIsr(void)
{
int8u i;
int8u conversion = adcPendingConversion; //fix 'volatile' warning; costs no flash
uint8_t i;
uint8_t conversion = adcPendingConversion; //fix 'volatile' warning; costs no flash
// make sure data is ready and the desired conversion is valid
if ( (INT_ADCFLAG & INT_ADCULDFULL)
@ -105,7 +105,7 @@ void halAdcIsr(void)
// otherwise.
ADCUser startNextConversion()
{
int8u i;
uint8_t i;
ATOMIC (
// start the next requested conversion if any
@ -143,7 +143,7 @@ void halInternalInitAdc(void)
ADC_OFFSET = ADC_OFFSET_RESET;
ADC_GAIN = ADC_GAIN_RESET;
ADC_DMACFG = ADC_DMARST;
ADC_DMABEG = (int32u)&adcData;
ADC_DMABEG = (uint32_t)&adcData;
ADC_DMASIZE = 1;
ADC_DMACFG = (ADC_DMAAUTOWRAP | ADC_DMALOAD);
@ -186,7 +186,7 @@ StStatus halStartAdcConversion(ADCUser id,
return ST_ADC_CONVERSION_DEFERRED;
}
StStatus halRequestAdcData(ADCUser id, int16u *value)
StStatus halRequestAdcData(ADCUser id, uint16_t *value)
{
//Both the ADC interrupt and the global interrupt need to be enabled,
//otherwise the ADC ISR cannot be serviced.
@ -220,7 +220,7 @@ StStatus halRequestAdcData(ADCUser id, int16u *value)
return stat;
}
StStatus halReadAdcBlocking(ADCUser id, int16u *value)
StStatus halReadAdcBlocking(ADCUser id, uint16_t *value)
{
StStatus stat;
@ -250,13 +250,13 @@ StStatus halAdcCalibrate(ADCUser id)
ADC_SOURCE_VREF_VREF2,
ADC_CONVERSION_TIME_US_4096);
stat = halReadAdcBlocking(id, (int16u *)(&Nvref));
stat = halReadAdcBlocking(id, (uint16_t *)(&Nvref));
if (stat == ST_ADC_CONVERSION_DONE) {
halStartAdcConversion(id,
ADC_REF_INT,
ADC_SOURCE_VREF2_VREF2,
ADC_CONVERSION_TIME_US_4096);
stat = halReadAdcBlocking(id, (int16u *)(&Nvref2));
stat = halReadAdcBlocking(id, (uint16_t *)(&Nvref2));
}
if (stat == ST_ADC_CONVERSION_DONE) {
adcCalibrated = TRUE;
@ -272,13 +272,13 @@ StStatus halAdcCalibrate(ADCUser id)
ADC_REF_INT,
ADC_SOURCE_GND_VREF2,
ADC_CONVERSION_TIME_US_4096);
stat = halReadAdcBlocking(id, (int16u *)(&Nvss));
stat = halReadAdcBlocking(id, (uint16_t *)(&Nvss));
if (stat == ST_ADC_CONVERSION_DONE) {
halStartAdcConversion(id,
ADC_REF_INT,
ADC_SOURCE_VREG2_VREF2,
ADC_CONVERSION_TIME_US_4096);
stat = halReadAdcBlocking(id, (int16u *)(&Nvdd));
stat = halReadAdcBlocking(id, (uint16_t *)(&Nvdd));
}
if (stat == ST_ADC_CONVERSION_DONE) {
Nvdd -= Nvss;
@ -297,11 +297,11 @@ StStatus halAdcCalibrate(ADCUser id)
// FIXME: support high voltage range
// use Vref-Vref/2 to calibrate
// FIXME: check for mfg token specifying measured VDD_PADSA
int16s halConvertValueToVolts(int16u value)
int16_t halConvertValueToVolts(uint16_t value)
{
int32s N;
int16s V;
int32s nvalue;
int32_t N;
int16_t V;
int32_t nvalue;
if (!adcCalibrated) {
halAdcCalibrate(ADC_USER_LQI);
@ -317,10 +317,10 @@ int16s halConvertValueToVolts(int16u value)
#ifdef ENABLE_ADC_EXTENDED_RANGE_BROKEN
if(halAdcGetRange()){ // High range.
N = (((int32s)value + Nvref - 2*Nvref2) << 16)/(2*(Nvref-Nvref2));
N = (((int32_t)value + Nvref - 2*Nvref2) << 16)/(2*(Nvref-Nvref2));
// Calculate voltage with: V = (N * VREF) / (2^16) where VDD = 1.2 volts
// Mutiplying by 1.2*10000 makes the result of this equation 100 uVolts
V = (int16s)((N*12000L) >> 16);
V = (int16_t)((N*12000L) >> 16);
if (V > 21000) { // VDD_PADS ?
V = 21000;
}
@ -336,7 +336,7 @@ int16s halConvertValueToVolts(int16u value)
// Mutiplying by0.9*10000 makes the result of this equation 100 uVolts
// (in fixed point E-4 which allows for 13.5 bits vs millivolts
// which is only 10.2 bits).
V = (int16s)((N*9000L) >> 16);
V = (int16_t)((N*9000L) >> 16);
if (V > 12000) {
V = 12000;
}
@ -349,7 +349,7 @@ int16s halConvertValueToVolts(int16u value)
return V;
}
int8u halGetADCChannelFromGPIO(int32u io)
uint8_t halGetADCChannelFromGPIO(uint32_t io)
{
switch(io)
{

12
cpu/stm32w108/hal/micro/cortexm3/board.c
View file

@ -250,7 +250,7 @@ BoardResourcesType const *boardDescription = NULL;
void halBoardInit(void)
{
char boardName[16];
int8s i;
int8_t i;
boardDescription = NULL;
#ifdef EMBERZNET_HAL
halCommonGetToken(boardName, TOKEN_MFG_BOARD_NAME);
@ -318,7 +318,7 @@ void halBoardPowerDown(void)
/* Configure GPIO for BUTTONSs */
{
ButtonResourceType *buttons = (ButtonResourceType *) boardDescription->io->buttons;
int8u i;
uint8_t i;
for (i = 0; i < boardDescription->buttons; i++) {
halGpioConfig(PORTx_PIN(buttons[i].gpioPort, buttons[i].gpioPin), GPIOCFG_IN_PUD);
halGpioSet(PORTx_PIN(buttons[i].gpioPort, buttons[i].gpioPin), GPIOOUT_PULLUP);
@ -328,7 +328,7 @@ void halBoardPowerDown(void)
/* Configure GPIO for LEDs */
{
LedResourceType *leds = (LedResourceType *) boardDescription->io->leds;
int8u i;
uint8_t i;
for (i = 0; i < boardDescription->leds; i++) {
/* LED default off */
halGpioConfig(PORTx_PIN(leds[i].gpioPort, leds[i].gpioPin), GPIOCFG_OUT);
@ -394,7 +394,7 @@ void halBoardPowerUp(void)
/* Configure GPIO for LEDs */
{
LedResourceType *leds = (LedResourceType *) boardDescription->io->leds;
int8u i;
uint8_t i;
for (i = 0; i < boardDescription->leds; i++) {
/* LED default off */
halGpioConfig(PORTx_PIN(leds[i].gpioPort, leds[i].gpioPin), GPIOCFG_OUT);
@ -404,7 +404,7 @@ void halBoardPowerUp(void)
/* Configure GPIO for BUTTONSs */
{
ButtonResourceType *buttons = (ButtonResourceType *) boardDescription->io->buttons;
int8u i;
uint8_t i;
for (i = 0; i < boardDescription->buttons; i++) {
halGpioConfig(PORTx_PIN(buttons[i].gpioPort, buttons[i].gpioPin), GPIOCFG_IN_PUD);
halGpioSet(PORTx_PIN(buttons[i].gpioPort, buttons[i].gpioPin), GPIOOUT_PULLUP);
@ -448,7 +448,7 @@ void printButtons (ButtonResourceType *buttons)
void boardPrintStringDescription(void)
{
int8u i = 0;
uint8_t i = 0;
while (boardList[i] != NULL) {
if ((boardDescription == boardList[i]) || (boardDescription == NULL)) {

10
cpu/stm32w108/hal/micro/cortexm3/bootloader/fib-bootloader.h
View file

@ -22,7 +22,7 @@
//------------------------------------------------------------------------------
// Status values.
typedef int32u FibStatus;
typedef uint32_t FibStatus;
#define FIB_SUCCESS 0
#define FIB_ERR_UNALIGNED 1
@ -36,7 +36,7 @@ typedef int32u FibStatus;
//------------------------------------------------------------------------------
// Erase types.
typedef int32u FibEraseType;
typedef uint32_t FibEraseType;
#define MFB_MASS_ERASE 0x01
#define MFB_PAGE_ERASE 0x02
@ -48,9 +48,9 @@ typedef int32u FibEraseType;
//------------------------------------------------------------------------------
// Shared flash functions.
FibStatus fibFlashWrite(int32u address, int8u *data,
int32u writeLength, int32u verifyLength);
FibStatus fibFlashWrite(uint32_t address, uint8_t *data,
uint32_t writeLength, uint32_t verifyLength);
FibStatus fibFlashErase(FibEraseType eraseType, int32u address);
FibStatus fibFlashErase(FibEraseType eraseType, uint32_t address);
#endif //__FIB_BOOTLOADER_H__

8
cpu/stm32w108/hal/micro/cortexm3/button.c
View file

@ -12,7 +12,7 @@
void halInitButton(void)
{
int8u i;
uint8_t i;
/* Configure GPIO for BUTTONSs */
ButtonResourceType *buttons = (ButtonResourceType *) boardDescription->io->buttons;
for (i = 0; i < boardDescription->buttons; i++) {
@ -22,10 +22,10 @@ void halInitButton(void)
}/* end halInitButton() */
int8u halGetButtonStatus(HalBoardButton button)
uint8_t halGetButtonStatus(HalBoardButton button)
{
int8u port = (button >> 3) & 0xf;
int8u pin = button & 0x7;
uint8_t port = (button >> 3) & 0xf;
uint8_t pin = button & 0x7;
if (button != DUMMY_BUTTON)
{

24
cpu/stm32w108/hal/micro/cortexm3/clocks.c
View file

@ -59,10 +59,10 @@
#define CLK1K_NUMERATOR 384000000
void halInternalCalibrateSlowRc( void )
{
int8u i;
int32u average=0;
int16s delta;
int32u period;
uint8_t i;
uint32_t average=0;
int16_t delta;
uint32_t period;
CALDBG(
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "halInternalCalibrateSlowRc:\r\n");
@ -85,7 +85,7 @@ void halInternalCalibrateSlowRc( void )
stSerialPrintf(ST_ASSERT_SERIAL_PORT,
"period: %u, ", CLK_PERIOD);
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "%u Hz\r\n",
((int16u)(((int32u)192000000)/((int32u)CLK_PERIOD))));
((uint16_t)(((uint32_t)192000000)/((uint32_t)CLK_PERIOD))));
)
//For 10kHz, the ideal CLK_PERIOD is 19200. Calculate the PERIOD delta.
//It's possible for a chip's 10kHz source RC to be too far out of range
@ -120,7 +120,7 @@ void halInternalCalibrateSlowRc( void )
stSerialPrintf(ST_ASSERT_SERIAL_PORT,
"period: %u, ", CLK_PERIOD);
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "%u Hz\r\n",
((int16u)(((int32u)192000000)/((int32u)CLK_PERIOD))));
((uint16_t)(((uint32_t)192000000)/((uint32_t)CLK_PERIOD))));
)
//The analog section should now be producing an output of ~10kHz
@ -138,11 +138,11 @@ void halInternalCalibrateSlowRc( void )
average = (average+(SLOWRC_PERIOD_SAMPLES/2))/SLOWRC_PERIOD_SAMPLES;
CALDBG(
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "average: %u, %u Hz\r\n",
((int16u)average), ((int16u)(((int32u)192000000)/((int32u)average))));
((uint16_t)average), ((uint16_t)(((uint32_t)192000000)/((uint32_t)average))));
)
//using an average period sample, calculate the clk1k divisor
CLK1K_CAL = (int16u)(CLK1K_NUMERATOR/average);
CLK1K_CAL = (uint16_t)(CLK1K_NUMERATOR/average);
CALDBG(
stSerialPrintf(ST_ASSERT_SERIAL_PORT,"CLK1K_CAL=%2X\r\n",CLK1K_CAL);
)
@ -167,7 +167,7 @@ void halInternalCalibrateSlowRc( void )
// CLK_PERIOD
void halInternalCalibrateFastRc(void)
{
int32s newTune = -16;
int32_t newTune = -16;
CALDBG(
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "halInternalCalibrateFastRc:\r\n");
@ -188,7 +188,7 @@ void halInternalCalibrateFastRc(void)
stSerialPrintf(ST_ASSERT_SERIAL_PORT,
"period: %u, ", CLK_PERIOD);
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "%u kHz\r\n",
((int16u)((((int32u)3072000000)/((int32u)CLK_PERIOD))/1000)));
((uint16_t)((((uint32_t)3072000000)/((uint32_t)CLK_PERIOD))/1000)));
)
//For 12MHz, the ideal CLK_PERIOD is 256. Tune the frequency down until
//the period is <= 256, which says the frequency is as close to 12MHz as
@ -211,7 +211,7 @@ void halInternalCalibrateFastRc(void)
stSerialPrintf(ST_ASSERT_SERIAL_PORT,
"period: %u, ", CLK_PERIOD);
stSerialPrintf(ST_ASSERT_SERIAL_PORT, "%u kHz\r\n",
((int16u)((((int32u)3072000000)/((int32u)CLK_PERIOD))/1000)));
((uint16_t)((((uint32_t)3072000000)/((uint32_t)CLK_PERIOD))/1000)));
)
//The analog section should now be producing an output of 11.5MHz - 12.0MHz
@ -337,7 +337,7 @@ static boolean setBiasCheckLow(void)
void halInternalSearchForBiasTrim(void)
{
int8u bit;
uint8_t bit;
//Enable the XTAL so we can search for the proper bias trim (NOTE: This
//will also forcefully ensure we're on the OSCHF so that we don't

25
cpu/stm32w108/hal/micro/cortexm3/compiler/gnu.h
View file

@ -18,6 +18,9 @@
#ifndef __GNU_H__
#define __GNU_H__
#include <stdint.h>
#ifndef __GNUC__
#error Improper PLATFORM_HEADER
#endif
@ -40,7 +43,7 @@
#include <stdarg.h>
#if defined (CORTEXM3_STM32W108)
#include "micro/cortexm3/stm32w108/regs.h"
#include "micro/cortexm3/stm32w108/stm32w108_type.h"
#include "micro/cortexm3/stm32w108/stm32w108-type.h"
#else
#error Unknown CORTEXM3 micro
#endif
@ -90,12 +93,12 @@
* @brief A typedef to make the size of the variable explicitly known.
*/
typedef unsigned char boolean;
typedef unsigned char int8u;
typedef signed char int8s;
typedef unsigned short int16u;
typedef signed short int16s;
typedef unsigned int int32u;
typedef signed int int32s;
//typedef unsigned char uint8_t;
//typedef signed char int8_t;
//typedef unsigned short uint16_t;
//typedef signed short int16_t;
//typedef unsigned int uint32_t;
//typedef signed int int32_t;
typedef unsigned int PointerType;
//@} \\END MASTER VARIABLE TYPES
@ -363,7 +366,7 @@ void _executeBarrierInstructions(void);
* declarations section of any function which calls DISABLE_INTERRUPTS()
* or RESTORE_INTERRUPTS().
*/
#define DECLARE_INTERRUPT_STATE int8u _emIsrState
#define DECLARE_INTERRUPT_STATE uint8_t _emIsrState
// Prototypes for the BASEPRI and PRIMASK access functions. They are very
// basic and instantiated in assembly code in the file spmr.s37 (since
@ -372,13 +375,13 @@ void _executeBarrierInstructions(void);
// with a priority equal to or less than the BASEPRI value.
// Note that the priority values used by these functions are 5 bits and
// right-aligned
extern int8u _readBasePri(void);
extern void _writeBasePri(int8u priority);
extern uint8_t _readBasePri(void);
extern void _writeBasePri(uint8_t priority);
// Prototypes for BASEPRI functions used to disable and enable interrupts
// while still allowing enabled faults to trigger.
extern void _enableBasePri(void);
extern int8u _disableBasePri(void);
extern uint8_t _disableBasePri(void);
extern boolean _basePriIsDisabled(void);
// Prototypes for setting and clearing PRIMASK for global interrupt

22
cpu/stm32w108/hal/micro/cortexm3/compiler/iar.h
View file

@ -33,7 +33,7 @@
#include <stdarg.h>
#if defined (CORTEXM3_STM32W108)
#include "micro/cortexm3/stm32w108/regs.h"
#include "micro/cortexm3/stm32w108/stm32w108_type.h"
#include "micro/cortexm3/stm32w108/stm32w108-type.h"
#elif defined (CORTEXM3_STM32F103)
#include "stm32f10x.h"
#else
@ -87,12 +87,12 @@
* @brief A typedef to make the size of the variable explicitly known.
*/
typedef unsigned char boolean;
typedef unsigned char int8u;
typedef signed char int8s;
typedef unsigned short int16u;
typedef signed short int16s;
typedef unsigned int int32u;
typedef signed int int32s;
typedef unsigned char uint8_t;
typedef signed char int8_t;
typedef unsigned short uint16_t;
typedef signed short int16_t;
typedef unsigned int uint32_t;
typedef signed int int32_t;
typedef unsigned int PointerType;
//@} \\END MASTER VARIABLE TYPES
@ -359,7 +359,7 @@ void _executeBarrierInstructions(void);
* declarations section of any function which calls DISABLE_INTERRUPTS()
* or RESTORE_INTERRUPTS().
*/
#define DECLARE_INTERRUPT_STATE int8u _emIsrState
#define DECLARE_INTERRUPT_STATE uint8_t _emIsrState
// Prototypes for the BASEPRI and PRIMASK access functions. They are very
// basic and instantiated in assembly code in the file spmr.s37 (since
@ -368,13 +368,13 @@ void _executeBarrierInstructions(void);
// with a priority equal to or less than the BASEPRI value.
// Note that the priority values used by these functions are 5 bits and
// right-aligned
extern int8u _readBasePri(void);
extern void _writeBasePri(int8u priority);
extern uint8_t _readBasePri(void);
extern void _writeBasePri(uint8_t priority);
// Prototypes for BASEPRI functions used to disable and enable interrupts
// while still allowing enabled faults to trigger.
extern void _enableBasePri(void);
extern int8u _disableBasePri(void);
extern uint8_t _disableBasePri(void);
extern boolean _basePriIsDisabled(void);
// Prototypes for setting and clearing PRIMASK for global interrupt

2
cpu/stm32w108/hal/micro/cortexm3/context-switch.s79
View file

@ -53,7 +53,7 @@ halPendSvSaveContext:
//------------------------------------------------------------------------------
// int32u savedMSP
// uint32_t savedMSP
//
// Private storage to hold the saved stack pointer. This variable is only used
// in this file and should not be extern'ed. In our current design we

149
cpu/stm32w108/hal/micro/cortexm3/cstartup_M.s
View file

@ -1,149 +0,0 @@
/**************************************************
*
* Part one of the system initialization code, contains low-level
* initialization, plain thumb variant.
*
* Customized by St Corporation for STM32W
*<!--(C) COPYRIGHT 2010 STMicroelectronics. All rights reserved. -->
*
**************************************************/
;
; The modules in this file are included in the libraries, and may be replaced
; by any user-defined modules that define the PUBLIC symbol _program_start or
; a user defined start symbol.
; To override the cstartup defined in the library, simply add your modified
; version to the workbench project.
;
; The vector table is normally located at address 0.
; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
; The name "__vector_table" has special meaning for C-SPY:
; it is where the SP start value is found, and the NVIC vector
; table register (VTOR) is initialized to this address if != 0.
;
; Cortex-M version
;
MODULE ?cstartup
;; Forward declaration of sections.
SECTION CSTACK:DATA:NOROOT(3)
SECTION .intvec:CODE:NOROOT(2)
EXTERN __iar_program_start
PUBLIC __vector_table
DATA
__vector_table
DCD sfe(CSTACK)
DCD __iar_program_start
;; Standard Cortex-M3 Vectors
DCD NMI_Handler ;;NMI Handler
DCD HardFault_Handler ;;Hard Fault Handler
DCD MemManage_Handler ;;Memory Fault Handler
DCD BusFault_Handler ;;Bus Fault Handler
DCD UsageFault_Handler ;;Usage Fault Handler
DCD 0 ;;Reserved
DCD 0 ;;Reserved
DCD 0 ;;Reserved
DCD 0 ;;Reserved
DCD SVC_Handler ;;SVCall Handler
DCD DebugMon_Handler ;;Debug Monitor Handler
DCD 0 ;;Reserved
DCD PendSV_Handler ;;PendSV Handler
DCD SysTick_Handler ;;SysTick Handler
;; STM32W Vectors
DCD halTimer1Isr ;;Timer 1 Handler
DCD halTimer2Isr ;;Timer 2 Handler
DCD halManagementIsr ;;Management Handler
DCD halBaseBandIsr ;;BaseBand Handler
DCD halSleepTimerIsr ;;Sleep Timer Handler
DCD halSc1Isr ;;SC1 Handler
DCD halSc2Isr ;;SC2 Handler
DCD halSecurityIsr ;;Security Handler
DCD halStackMacTimerIsr ;;MAC Timer Handler
DCD stmRadioTransmitIsr ;;MAC TX Handler
DCD stmRadioReceiveIsr ;;MAC RX Handler
DCD halAdcIsr ;;ADC Handler
DCD halIrqAIsr ;;GPIO IRQA Handler
DCD halIrqBIsr ;;GPIO IRQB Handler
DCD halIrqCIsr ;;GPIO IRQC Handler
DCD halIrqDIsr ;;GPIO IRQD Handler
DCD halDebugIsr ;;Debug Handler
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
;;
;; Default interrupt handlers.
;;
PUBWEAK NMI_Handler
PUBWEAK HardFault_Handler
PUBWEAK MemManage_Handler
PUBWEAK BusFault_Handler
PUBWEAK UsageFault_Handler
PUBWEAK SVC_Handler
PUBWEAK DebugMon_Handler
PUBWEAK PendSV_Handler
PUBWEAK SysTick_Handler
PUBWEAK halTimer1Isr
PUBWEAK halTimer2Isr
PUBWEAK halManagementIsr
PUBWEAK halBaseBandIsr
PUBWEAK halSleepTimerIsr
PUBWEAK halSc1Isr
PUBWEAK halSc2Isr
PUBWEAK halSecurityIsr
PUBWEAK halStackMacTimerIsr
PUBWEAK stmRadioTransmitIsr
PUBWEAK stmRadioReceiveIsr
PUBWEAK halAdcIsr
PUBWEAK halIrqAIsr
PUBWEAK halIrqBIsr
PUBWEAK halIrqCIsr
PUBWEAK halIrqDIsr
PUBWEAK halDebugIsr
SECTION .text:CODE:REORDER(1)
THUMB
NMI_Handler
HardFault_Handler
MemManage_Handler
BusFault_Handler
UsageFault_Handler
SVC_Handler
DebugMon_Handler
PendSV_Handler
SysTick_Handler
halTimer1Isr
halTimer2Isr
halManagementIsr
halBaseBandIsr
halSleepTimerIsr
halSc1Isr
halSc2Isr
halSecurityIsr
halStackMacTimerIsr
stmRadioTransmitIsr
stmRadioReceiveIsr
halAdcIsr
halIrqAIsr
halIrqBIsr
halIrqCIsr
halIrqDIsr
halDebugIsr
Default_Handler
B Default_Handler
END

68
cpu/stm32w108/hal/micro/cortexm3/flash.c
View file

@ -85,10 +85,10 @@ static void disableFlitf(void)
FLASH_CTRL = FLASH_CTRL_LOCK; //lock the flash from further accesses
}
static FibStatus fibFlashWrite(int32u address, int8u *data, int32u length, int32u dummy)
static FibStatus fibFlashWrite(uint32_t address, uint8_t *data, uint32_t length, uint32_t dummy)
{
int32u i;
int16u *ptr;
uint32_t i;
uint16_t *ptr;
FibStatus status = FIB_SUCCESS;
// Address and length must be half-word aligned.
if ((address & 1) || (length & 1)) {
@ -100,10 +100,10 @@ static FibStatus fibFlashWrite(int32u address, int8u *data, int32u length, int32
return FIB_ERR_INVALID_ADDRESS;
}
enableFlitf();
ptr = (int16u *)address;
ptr = (uint16_t *)address;
for (i = 0; i < length; i += 2) {
int16u currentData = *ptr;
int16u newData = HIGH_LOW_TO_INT(data[i + 1], data[i]);
uint16_t currentData = *ptr;
uint16_t newData = HIGH_LOW_TO_INT(data[i + 1], data[i]);
// Only program the data if it makes sense to do so.
if (currentData == newData) {
// If the new data matches the flash, don't bother doing anything.
@ -111,7 +111,7 @@ static FibStatus fibFlashWrite(int32u address, int8u *data, int32u length, int32
// If the flash is 0xFFFF we're allowed to write anything.
// If the new data is 0x0000 it doesn't matter what the flash is.
// OPTWREN must stay set to keep CIB unlocked.
if ((CIB_OB_BOTTOM <= (int32u)ptr) && ((int32u)ptr <= CIB_OB_TOP)) {
if ((CIB_OB_BOTTOM <= (uint32_t)ptr) && ((uint32_t)ptr <= CIB_OB_TOP)) {
FLASH_CTRL = (FLASH_CTRL_OPTWREN | FLASH_CTRL_OPTPROG);
} else {
FLASH_CTRL = (FLASH_CTRL_OPTWREN | FLASH_CTRL_PROG);
@ -144,10 +144,10 @@ static FibStatus fibFlashWrite(int32u address, int8u *data, int32u length, int32
return status;
}
static FibStatus fibFlashWriteVerify(int32u address, int8u *data, int32u length)
static FibStatus fibFlashWriteVerify(uint32_t address, uint8_t *data, uint32_t length)
{
int32u i;
int8u *ptr = (int8u *)address;
uint32_t i;
uint8_t *ptr = (uint8_t *)address;
for (i = 0; i < length; i++) {
if (*ptr != data[i]) {
return FIB_ERR_VERIFY_FAILED;
@ -157,26 +157,26 @@ static FibStatus fibFlashWriteVerify(int32u address, int8u *data, int32u length)
return FIB_SUCCESS;
}
static FibStatus fibFlashErase(FibEraseType eraseType, int32u address)
static FibStatus fibFlashErase(FibEraseType eraseType, uint32_t address)
{
int32u eraseOp;
int32u *ptr;
int32u length;
uint32_t eraseOp;
uint32_t *ptr;
uint32_t length;
FibStatus status = FIB_SUCCESS;
if (BYTE_0(eraseType) == MFB_MASS_ERASE) {
eraseOp = FLASH_CTRL_MASSERASE;
ptr = (int32u *)MFB_BOTTOM;
ptr = (uint32_t *)MFB_BOTTOM;
length = MFB_SIZE_W;
} else if (BYTE_0(eraseType) == MFB_PAGE_ERASE) {
if (address < MFB_BOTTOM || address > MFB_TOP) {
return FIB_ERR_INVALID_ADDRESS;
}
eraseOp = FLASH_CTRL_PAGEERASE;
ptr = (int32u *)(address & MFB_PAGE_MASK_B);
ptr = (uint32_t *)(address & MFB_PAGE_MASK_B);
length = MFB_PAGE_SIZE_W;
} else if (BYTE_0(eraseType) == CIB_ERASE) {
eraseOp = FLASH_CTRL_OPTWREN | FLASH_CTRL_OPTERASE;
ptr = (int32u *)CIB_BOTTOM;
ptr = (uint32_t *)CIB_BOTTOM;
length = CIB_SIZE_W;
} else {
return FIB_ERR_INVALID_TYPE;
@ -203,7 +203,7 @@ static FibStatus fibFlashErase(FibEraseType eraseType, int32u address)
}
if (status == FIB_SUCCESS
&& (eraseType & DO_VERIFY) != 0) {
int32u i;
uint32_t i;
for (i = 0; i < length; i++) {
if (*ptr != 0xFFFFFFFF) {
return FIB_ERR_VERIFY_FAILED;
@ -228,7 +228,7 @@ static boolean verifyFib(void)
//The parameter 'eraseType' chooses which erasure will be performed while
//the 'address' parameter chooses the page to be erased during MFB page erase.
StStatus halInternalFlashErase(int8u eraseType, int32u address)
StStatus halInternalFlashErase(uint8_t eraseType, uint32_t address)
{
FibStatus status;
@ -239,10 +239,10 @@ StStatus halInternalFlashErase(int8u eraseType, int32u address)
// Always try to use the FIB bootloader if its present
if(verifyFib()) {
status = halFixedAddressTable.fibFlashErase(
(((int32u)eraseType) | DO_ERASE),
(((uint32_t)eraseType) | DO_ERASE),
address);
} else {
status = fibFlashErase((((int32u)eraseType) | DO_ERASE), address);
status = fibFlashErase((((uint32_t)eraseType) | DO_ERASE), address);
}
#else
@ -250,7 +250,7 @@ StStatus halInternalFlashErase(int8u eraseType, int32u address)
assert(verifyFib());
status = halFixedAddressTable.fibFlashErase(
(((int32u)eraseType) | DO_ERASE),
(((uint32_t)eraseType) | DO_ERASE),
address);
#endif
)
@ -270,14 +270,14 @@ StStatus halInternalFlashErase(int8u eraseType, int32u address)
// Always try to use the FIB bootloader if its present
if(verifyFib()) {
status = halFixedAddressTable.fibFlashErase(
(((int32u)eraseType) | DO_VERIFY),
(((uint32_t)eraseType) | DO_VERIFY),
address);
} else {
status = fibFlashErase((((int32u)eraseType) | DO_VERIFY), address);
status = fibFlashErase((((uint32_t)eraseType) | DO_VERIFY), address);
}
#else
status = halFixedAddressTable.fibFlashErase(
(((int32u)eraseType) | DO_VERIFY),
(((uint32_t)eraseType) | DO_VERIFY),
address);
#endif
return fibToStStatus[status];
@ -291,7 +291,7 @@ StStatus halInternalFlashErase(int8u eraseType, int32u address)
//half-words contained in 'data' to be written to flash.
//NOTE: This function can NOT write the option bytes and will throw an error
//if that is attempted.
StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length)
StStatus halInternalFlashWrite(uint32_t address, uint16_t * data, uint32_t length)
{
FibStatus status;
@ -303,11 +303,11 @@ StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length)
// Always try to use the FIB bootloader if its present
if(verifyFib()) {
status = halFixedAddressTable.fibFlashWrite(address,
(int8u *)data,
(uint8_t *)data,
length,
0);
} else {
status = fibFlashWrite(address, (int8u *)data, length, 0);
status = fibFlashWrite(address, (uint8_t *)data, length, 0);
}
#else
@ -316,7 +316,7 @@ StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length)
// Ensure that a programmed FIB of a proper version is present
assert(verifyFib());
status = halFixedAddressTable.fibFlashWrite(address,
(int8u *)data,
(uint8_t *)data,
length,
0);
#endif
@ -331,15 +331,15 @@ StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length)
// Always try to use the FIB bootloader if its present
if(verifyFib()) {
status = halFixedAddressTable.fibFlashWrite(address,
(int8u *)data,
(uint8_t *)data,
0,
length);
} else {
status = fibFlashWriteVerify(address, (int8u *)data, length);
status = fibFlashWriteVerify(address, (uint8_t *)data, length);
}
#else
status = halFixedAddressTable.fibFlashWrite(address,
(int8u *)data,
(uint8_t *)data,
0,
length);
#endif
@ -352,9 +352,9 @@ StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length)
//parameter can have a value of 0 through 7. 'data' is the 8bit value to be
//programmed into the option byte since the hardware will calculate the
//compliment and program the full 16bit option byte.
StStatus halInternalCibOptionByteWrite(int8u byte, int8u data)
StStatus halInternalCibOptionByteWrite(uint8_t byte, uint8_t data)
{
int16u dataAndInverse = HIGH_LOW_TO_INT(~data, data);
uint16_t dataAndInverse = HIGH_LOW_TO_INT(~data, data);
// There are only 8 option bytes, don't try to program more than that.
if (byte > 7) {
return ST_ERR_FLASH_PROG_FAIL;

6
cpu/stm32w108/hal/micro/cortexm3/flash.h
View file

@ -65,7 +65,7 @@ boolean halFlashEraseIsActive(void);
* - ST_ERR_FLASH_VERIFY_FAILED if erase verification failed
* - ST_SUCCESS if erasure completed and verified properly
*/
StStatus halInternalFlashErase(int8u eraseType, int32u address);
StStatus halInternalFlashErase(uint8_t eraseType, uint32_t address);
/** @brief Writes a block of words to flash. A page is erased
* to 0xFFFF at every address. Only two writes can be performed to the same
@ -96,7 +96,7 @@ StStatus halInternalFlashErase(int8u eraseType, int32u address);
* - ST_ERR_FLASH_VERIFY_FAILED if write verification failed
* - ST_SUCCESS if writing completed and verified properly
*/
StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length);
StStatus halInternalFlashWrite(uint32_t address, uint16_t * data, uint32_t length);
/** @brief Writes an option byte to the customer information block. Only
* two writes can be performed to the same address between erasures and this
@ -116,7 +116,7 @@ StStatus halInternalFlashWrite(int32u address, int16u * data, int32u length);
* - ST_ERR_FLASH_VERIFY_FAILED if write verification failed
* - ST_SUCCESS if writing completed and verified properly
*/
StStatus halInternalCibOptionByteWrite(int8u byte, int8u data);
StStatus halInternalCibOptionByteWrite(uint8_t byte, uint8_t data);
#endif //DOXYGEN_SHOULD_SKIP_THIS

2
cpu/stm32w108/hal/micro/cortexm3/led.c
View file

@ -36,7 +36,7 @@ void halToggleLed(HalBoardLed led)
//purposes, we disable interrupts since this is a read-modify-write
ATOMIC(
if(led/8 < 3) {
*((volatile int32u *)(GPIO_PxOUT_BASE+(GPIO_Px_OFFSET*(led/8)))) ^= BIT(led&7);
*((volatile uint32_t *)(GPIO_PxOUT_BASE+(GPIO_Px_OFFSET*(led/8)))) ^= BIT(led&7);
}
)
}

6
cpu/stm32w108/hal/micro/cortexm3/memmap-fat.h
View file

@ -29,9 +29,9 @@ typedef struct {
HalBootloaderAddressTableType *bootloaderAddressTable;
void *startOfUnusedRam;
// ** pointers to shared functions **
FibStatus (* fibFlashWrite)(int32u address, int8u *data,
int32u writeLength, int32u verifyLength);
FibStatus (* fibFlashErase)(FibEraseType eraseType, int32u address);
FibStatus (* fibFlashWrite)(uint32_t address, uint8_t *data,
uint32_t writeLength, uint32_t verifyLength);
FibStatus (* fibFlashErase)(FibEraseType eraseType, uint32_t address);
} HalFixedAddressTableType;
extern const HalFixedAddressTableType halFixedAddressTable;

4
cpu/stm32w108/hal/micro/cortexm3/memmap.h
View file

@ -53,8 +53,8 @@ typedef struct {
void (*resetVector)(void);
void (*nmiHandler)(void);
void (*hardFaultHandler)(void);
int16u type;
int16u version;
uint16_t type;
uint16_t version;
const HalVectorTableType *vectorTable;
// Followed by more fields depending on the specific address table type
} HalBaseAddressTableType;

44
cpu/stm32w108/hal/micro/cortexm3/mems.c
View file

@ -19,19 +19,19 @@
#define WAIT_TX_FIN() do{}while((SC2_TWISTAT&SC_TWITXFIN)!=SC_TWITXFIN)
#define WAIT_RX_FIN() do{}while((SC2_TWISTAT&SC_TWIRXFIN)!=SC_TWIRXFIN)
static int8u i2c_MEMS_Init (void);
static int8u i2c_MEMS_Read (t_mems_data *mems_data);
static uint8_t i2c_MEMS_Init (void);
static uint8_t i2c_MEMS_Read (t_mems_data *mems_data);
//extern void halInternalResetWatchDog(void);
static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfBytes);
static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfBytes);
int8u i2c_write_reg (int8u slave_addr, int8u reg_addr, int8u reg_value);
static int8u i2c_MEMS_Init (void);
static int8u i2c_MEMS_Read (t_mems_data *mems_data);
static uint8_t i2c_Send_Frame (uint8_t DeviceAddress, uint8_t *pBuffer, uint8_t NoOfBytes);
static uint8_t i2c_Send_Frame (uint8_t DeviceAddress, uint8_t *pBuffer, uint8_t NoOfBytes);
uint8_t i2c_write_reg (uint8_t slave_addr, uint8_t reg_addr, uint8_t reg_value);
static uint8_t i2c_MEMS_Init (void);
static uint8_t i2c_MEMS_Read (t_mems_data *mems_data);
/* Functions -----------------------------------------------------------------*/
int8u mems_Init(void)
uint8_t mems_Init(void)
{
int8u ret = 0;
uint8_t ret = 0;
// GPIO assignments
// PA1: SC2SDA (Serial Data)
@ -60,9 +60,9 @@ int8u mems_Init(void)
return ret;
}/* end mems_Init */
int8u mems_GetValue(t_mems_data *mems_data)
uint8_t mems_GetValue(t_mems_data *mems_data)
{
int8u i;
uint8_t i;
i = i2c_MEMS_Read(mems_data);
return i;
}/* end mems_GetValue() */
@ -79,9 +79,9 @@ int8u mems_GetValue(t_mems_data *mems_data)
* Output : None
* Return : status
*******************************************************************************/
static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfBytes)
static uint8_t i2c_Send_Frame (uint8_t DeviceAddress, uint8_t *pBuffer, uint8_t NoOfBytes)
{
int8u i, data;
uint8_t i, data;
SC2_TWICTRL1 |= SC_TWISTART; // send start
WAIT_CMD_FIN();
@ -115,9 +115,9 @@ static int8u i2c_Send_Frame (int8u DeviceAddress, int8u *pBuffer, int8u NoOfByte
* Output : buffer
* Return : status
*******************************************************************************/
static int8u i2c_Receive_Frame (int8u slave_addr, int8u reg_addr, int8u *pBuffer, int8u NoOfBytes)
static uint8_t i2c_Receive_Frame (uint8_t slave_addr, uint8_t reg_addr, uint8_t *pBuffer, uint8_t NoOfBytes)
{
int8u i, addr = reg_addr;
uint8_t i, addr = reg_addr;
if (NoOfBytes > 1)
addr += REPETIR;
@ -168,9 +168,9 @@ static int8u i2c_Receive_Frame (int8u slave_addr, int8u reg_addr, int8u *pBuffer
* Output : None
* Return : I2C frame
*******************************************************************************/
int8u i2c_write_reg (int8u slave_addr, int8u reg_addr, int8u reg_value)
uint8_t i2c_write_reg (uint8_t slave_addr, uint8_t reg_addr, uint8_t reg_value)
{
int8u i2c_buffer[2];
uint8_t i2c_buffer[2];
i2c_buffer[0] = reg_addr;
i2c_buffer[1] = reg_value;
@ -188,7 +188,7 @@ int8u i2c_write_reg (int8u slave_addr, int8u reg_addr, int8u reg_value)
* Output : None
* Return : I2C frame
*******************************************************************************/
int8u i2c_read_reg (int8u slave_addr, int8u reg_addr, int8u *pBuffer, int8u NoOfBytes)
uint8_t i2c_read_reg (uint8_t slave_addr, uint8_t reg_addr, uint8_t *pBuffer, uint8_t NoOfBytes)
{
return i2c_Receive_Frame (slave_addr, reg_addr, pBuffer, NoOfBytes);
}/* end i2c_read_reg() */
@ -201,9 +201,9 @@ int8u i2c_read_reg (int8u slave_addr, int8u reg_addr, int8u *pBuffer, int8u NoOf
* Output : None
* Return : status
*******************************************************************************/
static int8u i2c_MEMS_Init (void)
static uint8_t i2c_MEMS_Init (void)
{
int8u i = 0;
uint8_t i = 0;
i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, STATUS_REG, 0x00); //no flag
i += i2c_write_reg (kLIS3L02DQ_SLAVE_ADDR, FF_WU_CFG, 0x00); // all off
@ -224,9 +224,9 @@ static int8u i2c_MEMS_Init (void)
* Output : mems_data
* Return : I2C frame
*******************************************************************************/
static int8u i2c_MEMS_Read (t_mems_data *mems_data)
static uint8_t i2c_MEMS_Read (t_mems_data *mems_data)
{
int8u i, i2c_buffer[8];
uint8_t i, i2c_buffer[8];
/* Wait for new set of data to be available */
while (1) {

20
cpu/stm32w108/hal/micro/cortexm3/mfg-token.c
View file

@ -13,7 +13,7 @@
#define DEFINETOKENS
#define TOKEN_MFG(name,creator,iscnt,isidx,type,arraysize,...) \
const int16u TOKEN_##name = TOKEN_##name##_ADDRESS;
const uint16_t TOKEN_##name = TOKEN_##name##_ADDRESS;
#include "hal/micro/cortexm3/token-manufacturing.h"
#undef TOKEN_DEF
#undef TOKEN_MFG
@ -26,12 +26,12 @@
static const int8u nullEui[] = { 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF };
static const uint8_t nullEui[] = { 0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF };
void halInternalGetMfgTokenData(void *data, int16u ID, int8u index, int8u len)
void halInternalGetMfgTokenData(void *data, uint16_t ID, uint8_t index, uint8_t len)
{
int8u *ram = (int8u*)data;
uint8_t *ram = (uint8_t*)data;
//0x7F is a non-indexed token. Remap to 0 for the address calculation
index = (index==0x7F) ? 0 : index;
@ -53,8 +53,8 @@ void halInternalGetMfgTokenData(void *data, int16u ID, int8u index, int8u len)
//bottom 16bits of the token's actual address. Since the info blocks
//exist in the range DATA_BIG_INFO_BASE-DATA_BIG_INFO_END, we need
//to OR the ID with DATA_BIG_INFO_BASE to get the real address.
int32u realAddress = (DATA_BIG_INFO_BASE|ID) + (len*index);
int8u *flash = (int8u *)realAddress;
uint32_t realAddress = (DATA_BIG_INFO_BASE|ID) + (len*index);
uint8_t *flash = (uint8_t *)realAddress;
@ -74,12 +74,12 @@ void halInternalGetMfgTokenData(void *data, int16u ID, int8u index, int8u len)
}
void halInternalSetMfgTokenData(int16u token, void *data, int8u len)
void halInternalSetMfgTokenData(uint16_t token, void *data, uint8_t len)
{
StStatus flashStatus;
int32u realAddress = (DATA_BIG_INFO_BASE|token);
int8u * flash = (int8u *)realAddress;
int32u i;
uint32_t realAddress = (DATA_BIG_INFO_BASE|token);
uint8_t * flash = (uint8_t *)realAddress;
uint32_t i;
//The flash library (and hardware) requires the address and length to both
//be multiples of 16bits. Since this API is only valid for writing to

6
cpu/stm32w108/hal/micro/cortexm3/mfg-token.h
View file

@ -26,7 +26,7 @@
* will be stored. This parameter is generated with a macro above.
*/
#define TOKEN_MFG(name,creator,iscnt,isidx,type,arraysize,...) \
extern const int16u TOKEN_##name;
extern const uint16_t TOKEN_##name;
#include "hal/micro/cortexm3/token-manufacturing.h"
#undef TOKEN_MFG
@ -125,7 +125,7 @@ enum {
* @param len: The length of the token being worked on. This value is
* automatically set by the API to be the size of the token.
*/
void halInternalGetMfgTokenData(void *data, int16u token, int8u index, int8u len);
void halInternalGetMfgTokenData(void *data, uint16_t token, uint8_t index, uint8_t len);
/**
* @description Sets the value of a token in non-volatile storage. This is
@ -147,7 +147,7 @@ void halInternalGetMfgTokenData(void *data, int16u token, int8u index, int8u len
* @param len: The length of the token being worked on. This value is
* automatically set by the API to be the size of the token.
*/
void halInternalSetMfgTokenData(int16u token, void *data, int8u len);
void halInternalSetMfgTokenData(uint16_t token, void *data, uint8_t len);
#define halCommonGetMfgToken( data, token ) \
halInternalGetMfgTokenData(data, token, 0x7F, token##_SIZE)

46
cpu/stm32w108/hal/micro/cortexm3/micro-common-internal.c
View file

@ -54,8 +54,8 @@ void stCalibrateVref(void)
assert(FALSE);
} else {
//The bias trim token is set, so use the trim directly
int16u temp_value;
int16u mask = 0xFFFF;
uint16_t temp_value;
uint16_t mask = 0xFFFF;
// halClearLed(BOARDLED3);
@ -95,11 +95,11 @@ void calDisableAdc(void) {
// These routines maintain the same signature as their hal- counterparts to
// facilitate simple support between phys.
// It is assumed (hoped?) that the compiler will optimize out unused arguments.
StStatus calStartAdcConversion(int8u dummy1, // Not used.
int8u dummy2, // Not used.
int8u channel,
int8u rate,
int8u clock) {
StStatus calStartAdcConversion(uint8_t dummy1, // Not used.
uint8_t dummy2, // Not used.
uint8_t channel,
uint8_t rate,
uint8_t clock) {
// Disable the Calibration ADC interrupt so that we can poll it.
INT_MGMTCFG &= ~INT_MGMTCALADC;
@ -118,14 +118,14 @@ StStatus calStartAdcConversion(int8u dummy1, // Not used.
}
StStatus calReadAdcBlocking(int8u dummy,
int16u *value) {
StStatus calReadAdcBlocking(uint8_t dummy,
uint16_t *value) {
// Wait for conversion to complete.
while ( ! (INT_MGMTFLAG & INT_MGMTCALADC) );
// Clear the interrupt for this conversion.
INT_MGMTFLAG = INT_MGMTCALADC;
// Get the result.
*value = (int16u)CAL_ADC_DATA;
*value = (uint16_t)CAL_ADC_DATA;
return ST_SUCCESS;
}
@ -137,12 +137,12 @@ StStatus calReadAdcBlocking(int8u dummy,
//the fastest conversions with the greatest reasonable accuracy. Variation
//across successive conversions appears to be +/-20mv of the average
//conversion. Overall function time is <150us.
int16u stMeasureVddFast(void)
uint16_t stMeasureVddFast(void)
{
int16u value;
int32u Ngnd;
int32u Nreg;
int32u Nvdd;
uint16_t value;
uint32_t Ngnd;
uint32_t Nreg;
uint32_t Nvdd;
tokTypeMfgRegVoltage1V8 vregOutTok;
halCommonGetMfgToken(&vregOutTok, TOKEN_MFG_1V8_REG_VOLTAGE);
@ -153,7 +153,7 @@ int16u stMeasureVddFast(void)
ADC_SAMPLE_CLOCKS_128,
ADC_6MHZ_CLOCK);
calReadAdcBlocking(DUMMY, &value);
Ngnd = (int32u)value;
Ngnd = (uint32_t)value;
//Measure VREG_OUT/2
calStartAdcConversion(DUMMY,
@ -162,7 +162,7 @@ int16u stMeasureVddFast(void)
ADC_SAMPLE_CLOCKS_128,
ADC_6MHZ_CLOCK);
calReadAdcBlocking(DUMMY, &value);
Nreg = (int32u)value;
Nreg = (uint32_t)value;
//Measure VDD_PADS/4
calStartAdcConversion(DUMMY,
@ -171,7 +171,7 @@ int16u stMeasureVddFast(void)
ADC_SAMPLE_CLOCKS_128,
ADC_6MHZ_CLOCK);
calReadAdcBlocking(DUMMY, &value);
Nvdd = (int32u)value;
Nvdd = (uint32_t)value;
calDisableAdc();
@ -202,8 +202,8 @@ void halCommonCalibratePads(void)
void halInternalSetRegTrim(boolean boostMode)
{
tokTypeMfgRegTrim regTrim;
int8u trim1V2;
int8u trim1V8;
uint8_t trim1V2;
uint8_t trim1V8;
halCommonGetMfgToken(&regTrim, TOKEN_MFG_REG_TRIM);
// The compiler can optimize this function a bit more and keep the
@ -247,9 +247,9 @@ void halInternalSetRegTrim(boolean boostMode)
// OSCHF, though, the clock speed is cut in half, so the input parameter
// is divided by two. With respect to accuracy, we're now limited by
// the accuracy of OSCHF (much lower than XTAL).
void halCommonDelayMicroseconds(int16u us)
void halCommonDelayMicroseconds(uint16_t us)
{
int32u beginTime = ReadRegister(MAC_TIMER);
uint32_t beginTime = ReadRegister(MAC_TIMER);
//If we're not using the XTAL, the MAC Timer is running off OSCHF,
//that means the clock is half speed, 6MHz. We need to halve our delay
@ -281,7 +281,7 @@ void halCommonDelayMicroseconds(int16u us)
//necessary in some situations. If you have to burn more than 65ms of time,
//the halCommonDelayMicroseconds function becomes cumbersome, so this
//function gives you millisecond granularity.
void halCommonDelayMilliseconds(int16u ms)
void halCommonDelayMilliseconds(uint16_t ms)
{
if(ms==0) {
return;

28
cpu/stm32w108/hal/micro/cortexm3/micro-common.c
View file

@ -28,7 +28,7 @@ void halInternalResetWatchDog(void)
WDOG_RESET = 1;
}
void halInternalDisableWatchDog(int8u magicKey)
void halInternalDisableWatchDog(uint8_t magicKey)
{
if (magicKey == MICRO_DISABLE_WATCH_DOG_KEY) {
WDOG_KEY = 0xDEAD;
@ -45,33 +45,33 @@ boolean halInternalWatchDogEnabled(void)
}
}
void halGpioConfig(int32u io, int32u config)
void halGpioConfig(uint32_t io, uint32_t config)
{
static volatile int32u *const configRegs[] =
{ (volatile int32u *)GPIO_PACFGL_ADDR,
(volatile int32u *)GPIO_PACFGH_ADDR,
(volatile int32u *)GPIO_PBCFGL_ADDR,
(volatile int32u *)GPIO_PBCFGH_ADDR,
(volatile int32u *)GPIO_PCCFGL_ADDR,
(volatile int32u *)GPIO_PCCFGH_ADDR };
int32u portcfg;
static volatile uint32_t *const configRegs[] =
{ (volatile uint32_t *)GPIO_PACFGL_ADDR,
(volatile uint32_t *)GPIO_PACFGH_ADDR,
(volatile uint32_t *)GPIO_PBCFGL_ADDR,
(volatile uint32_t *)GPIO_PBCFGH_ADDR,
(volatile uint32_t *)GPIO_PCCFGL_ADDR,
(volatile uint32_t *)GPIO_PCCFGH_ADDR };
uint32_t portcfg;
portcfg = *configRegs[io/4]; // get current config
portcfg = portcfg & ~((0xF)<<((io&3)*4)); // mask out config of this pin
*configRegs[io/4] = portcfg | (config <<((io&3)*4));
}
void halGpioSet(int32u gpio, boolean value)
void halGpioSet(uint32_t gpio, boolean value)
{
if(gpio/8 < 3) {
if (value) {
*((volatile int32u *)(GPIO_PxSET_BASE+(GPIO_Px_OFFSET*(gpio/8)))) = BIT(gpio&7);
*((volatile uint32_t *)(GPIO_PxSET_BASE+(GPIO_Px_OFFSET*(gpio/8)))) = BIT(gpio&7);
} else {
*((volatile int32u *)(GPIO_PxCLR_BASE+(GPIO_Px_OFFSET*(gpio/8)))) = BIT(gpio&7);
*((volatile uint32_t *)(GPIO_PxCLR_BASE+(GPIO_Px_OFFSET*(gpio/8)))) = BIT(gpio&7);
}
}
}
int16u halInternalStartSystemTimer(void)
uint16_t halInternalStartSystemTimer(void)
{
//Since the SleepTMR is the only timer maintained during deep sleep, it is
//used as the System Timer (RTC). We maintain a 32 bit hardware timer

22
cpu/stm32w108/hal/micro/cortexm3/micro-common.h
View file

@ -20,7 +20,7 @@
//This is necessary here because halSleepForQsWithOptions returns an
//StStatus and not adding this typedef to this file breaks a
//whole lot of builds.
typedef int8u StStatus;
typedef uint8_t StStatus;
#endif //__STSTATUS_TYPE__
#endif // DOXYGEN_SHOULD_SKIP_THIS
@ -71,7 +71,7 @@ void halInternalResetWatchDog( void );
* @param config The configuration mode to use.
*
*/
void halGpioConfig(int32u io, int32u config);
void halGpioConfig(uint32_t io, uint32_t config);
/**
* @brief Set/Clear single GPIO bit
@ -81,7 +81,7 @@ void halGpioConfig(int32u io, int32u config);
* @param value A flag indicating whether to set or clear the io.
*
*/
void halGpioSet(int32u io, boolean value);
void halGpioSet(uint32_t io, boolean value);
/**
@ -111,7 +111,7 @@ void halInternalSetRegTrim(boolean boostMode);
*
* @return A slow measurement of VDD_PADS in millivolts.
*/
int16u stMeasureVddSlow(void);
uint16_t stMeasureVddSlow(void);
/** @brief Takes a fast ADC measurement of VDD_PADS in millivolts.
@ -121,7 +121,7 @@ int16u stMeasureVddSlow(void);
*
* @return A fast measurement of VDD_PADS in millivolts.
*/
int16u stMeasureVddFast(void);
uint16_t stMeasureVddFast(void);
/**
@ -164,7 +164,7 @@ void halInternalSearchForBiasTrim(void);
*
* @param ms The specified time, in milliseconds.
*/
void halCommonDelayMilliseconds(int16u ms);
void halCommonDelayMilliseconds(uint16_t ms);
/** @brief Puts the microcontroller to sleep in a specified mode, allows
@ -183,7 +183,7 @@ void halCommonDelayMilliseconds(int16u ms);
*
* @sa ::SleepModes
*/
void halSleepWithOptions(SleepModes sleepMode, int32u gpioWakeBitMask);
void halSleepWithOptions(SleepModes sleepMode, uint32_t gpioWakeBitMask);
/**
@ -218,7 +218,7 @@ void halSleepWithOptions(SleepModes sleepMode, int32u gpioWakeBitMask);
* @return An StStatus value indicating the success or
* failure of the command.
*/
StStatus halSleepForQsWithOptions(int32u *duration, int32u gpioWakeBitMask);
StStatus halSleepForQsWithOptions(uint32_t *duration, uint32_t gpioWakeBitMask);
/**
* @brief Provides access to assembly code which triggers idle sleep.
@ -262,7 +262,7 @@ void halInternalSleep(SleepModes sleepMode);
*
* @return The events that caused the last wake from sleep.
*/
int32u halGetWakeInfo(void);
uint32_t halGetWakeInfo(void);
/** @brief Seeds the ::halCommonGetRandom() pseudorandom number
@ -273,7 +273,7 @@ int32u halGetWakeInfo(void);
*
* @param seed A seed for the pseudorandom number generator.
*/
void halCommonSeedRandom(int32u seed);
void halCommonSeedRandom(uint32_t seed);
/** @brief Runs a standard LFSR to generate pseudorandom numbers.
*
@ -283,7 +283,7 @@ void halCommonSeedRandom(int32u seed);
* ability to avoid collisions in large networks, but it is \b critical to
* implement this function to return quickly.
*/
int16u halCommonGetRandom(void);
uint16_t halCommonGetRandom(void);
#endif //__STM32W108XX_MICRO_COMMON_H__

38
cpu/stm32w108/hal/micro/cortexm3/micro.c
View file

@ -70,22 +70,22 @@ void halPowerUp(void)
halBoardPowerUp();
}
static int16u seed0 = 0xbeef;
static int16u seed1 = 0xface;
static uint16_t seed0 = 0xbeef;
static uint16_t seed1 = 0xface;
void halCommonSeedRandom(int32u seed)
void halCommonSeedRandom(uint32_t seed)
{
seed0 = (int16u) seed;
seed0 = (uint16_t) seed;
if (seed0 == 0)
seed0 = 0xbeef;
seed1 = (int16u) (seed >> 16);
seed1 = (uint16_t) (seed >> 16);
if (seed1 == 0)
seed1 = 0xface;
}
static int16u shift(int16u *val, int16u taps)
static uint16_t shift(uint16_t *val, uint16_t taps)
{
int16u newVal = *val;
uint16_t newVal = *val;
if (newVal & 0x8000)
newVal ^= taps;
@ -93,44 +93,44 @@ static int16u shift(int16u *val, int16u taps)
return newVal;
}
int16u halCommonGetRandom(void)
uint16_t halCommonGetRandom(void)
{
return (shift(&seed0, 0x0062)
^ shift(&seed1, 0x100B));
}
void halCommonMemCopy(void *dest, const void *source, int8u bytes)
void halCommonMemCopy(void *dest, const void *source, uint8_t bytes)
{
memcpy(dest, source, bytes);
}
int8s halCommonMemCompare(const void *source0, const void *source1, int8u bytes)
int8_t halCommonMemCompare(const void *source0, const void *source1, uint8_t bytes)
{
return memcmp(source0, source1, bytes);
}
void halCommonMemSet(void *dest, int8u val, int16u bytes)
void halCommonMemSet(void *dest, uint8_t val, uint16_t bytes)
{
memset(dest, val, bytes);
}
#pragma pack(1)
typedef struct appSwitchStruct {
int32u signature;
int8u mode;
int8u channel;
uint32_t signature;
uint8_t mode;
uint8_t channel;
union {
int16u panID;
int16u offset;
uint16_t panID;
uint16_t offset;
} param;
} appSwitchStructType;
#pragma pack()
static appSwitchStructType *appSwitch = (appSwitchStructType *) RAM_BOTTOM;
StStatus halBootloaderStart(int8u mode, int8u channel, int16u panID)
StStatus halBootloaderStart(uint8_t mode, uint8_t channel, uint16_t panID)
{
if (mode == IAP_BOOTLOADER_MODE_UART) {
int8u cut = *(volatile int8u *) 0x08040798;
uint8_t cut = *(volatile uint8_t *) 0x08040798;
if (!( (halFixedAddressTable.baseTable.type == FIXED_ADDRESS_TABLE_TYPE) &&
( ( (halFixedAddressTable.baseTable.version & FAT_MAJOR_VERSION_MASK)
== 0x0000 ) &&
@ -140,7 +140,7 @@ StStatus halBootloaderStart(int8u mode, int8u channel, int16u panID)
return ST_ERR_FATAL;
} else {
/* Check that OTA bootloader is at the base of the flash */
if (*((int32u *) (MFB_BOTTOM + 28)) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) {
if (*((uint32_t *) (MFB_BOTTOM + 28)) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) {
appSwitch->channel = ((channel >= 11) && (channel <= 26)) ? channel :IAP_BOOTLOADER_DEFAULT_CHANNEL;
appSwitch->param.panID = panID;
} else {

72
cpu/stm32w108/hal/micro/cortexm3/nvm.c
View file

@ -13,7 +13,7 @@
#ifdef NVM_RAM_EMULATION
static int16u calibrationData[32+2]={
static uint16_t calibrationData[32+2]={
0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
@ -21,14 +21,14 @@ static int16u calibrationData[32+2]={
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF,
};
int8u halCommonReadFromNvm(void *data, int32u offset, int16u length)
uint8_t halCommonReadFromNvm(void *data, uint32_t offset, uint16_t length)
{
halCommonMemCopy(data, ((int8u *) calibrationData) + offset, length);
halCommonMemCopy(data, ((uint8_t *) calibrationData) + offset, length);
return ST_SUCCESS;
}
int8u halCommonWriteToNvm(const void *data, int32u offset, int16u length)
uint8_t halCommonWriteToNvm(const void *data, uint32_t offset, uint16_t length)
{
halCommonMemCopy(((int8u *) calibrationData) + offset, data, length);
halCommonMemCopy(((uint8_t *) calibrationData) + offset, data, length);
return ST_SUCCESS;
}
@ -50,14 +50,14 @@ int8u halCommonWriteToNvm(const void *data, int32u offset, int16u length)
//are not required to be continuous memory blocks so they can be define
//separately. The linker is responsible for placing these storage containers
//on flash page boundaries.
NO_STRIPPING __no_init VAR_AT_SEGMENT (const int8u nvmStorageLeft[NVM_DATA_SIZE_B], __NVM__);
NO_STRIPPING __no_init VAR_AT_SEGMENT (const int8u nvmStorageRight[NVM_DATA_SIZE_B], __NVM__);
NO_STRIPPING __no_init VAR_AT_SEGMENT (const uint8_t nvmStorageLeft[NVM_DATA_SIZE_B], __NVM__);
NO_STRIPPING __no_init VAR_AT_SEGMENT (const uint8_t nvmStorageRight[NVM_DATA_SIZE_B], __NVM__);
static int8u determineState(void)
static uint8_t determineState(void)
{
int32u leftMgmt = *(int32u *)NVM_LEFT_PAGE;
int32u rightMgmt = *(int32u *)NVM_RIGHT_PAGE;
int8u state=0;
uint32_t leftMgmt = *(uint32_t *)NVM_LEFT_PAGE;
uint32_t rightMgmt = *(uint32_t *)NVM_RIGHT_PAGE;
uint8_t state=0;
if((leftMgmt==0xFFFF0000) && (rightMgmt==0xFFFFFFFF)) {
//State 1 and state 4 use identical mgmt words. The function
@ -95,12 +95,12 @@ static int8u determineState(void)
}
int8u halCommonReadFromNvm(void *data, int32u offset, int16u length)
uint8_t halCommonReadFromNvm(void *data, uint32_t offset, uint16_t length)
{
int16u i;
int16u *flash;
uint16_t i;
uint16_t *flash;
//Remember: all flash writes are 16bits.
int16u *ram = (int16u*)data;
uint16_t *ram = (uint16_t*)data;
//The NVM data storage system cannot function if the LEFT and RIGHT
//storage are not aligned to physical flash pages.
@ -121,7 +121,7 @@ int8u halCommonReadFromNvm(void *data, int32u offset, int16u length)
case 4:
case 9:
case 10:
flash = (int16u *)(NVM_LEFT_PAGE+offset);
flash = (uint16_t *)(NVM_LEFT_PAGE+offset);
for(i=0;i<(length/2);i++) {
ram[i] = flash[i];
}
@ -130,7 +130,7 @@ int8u halCommonReadFromNvm(void *data, int32u offset, int16u length)
case 6:
case 7:
case 8:
flash = (int16u *)(NVM_RIGHT_PAGE+offset);
flash = (uint16_t *)(NVM_RIGHT_PAGE+offset);
for(i=0;i<(length/2);i++) {
ram[i] = flash[i];
}
@ -155,9 +155,9 @@ int8u halCommonReadFromNvm(void *data, int32u offset, int16u length)
return ST_SUCCESS;
}
int16u *halCommonGetAddressFromNvm(int32u offset)
uint16_t *halCommonGetAddressFromNvm(uint32_t offset)
{
int16u *flash;
uint16_t *flash;
//The NVM data storage system cannot function if the LEFT and RIGHT
//storage are not aligned to physical flash pages.
@ -174,22 +174,22 @@ int16u *halCommonGetAddressFromNvm(int32u offset)
case 4:
case 9:
case 10:
flash = (int16u *)(NVM_LEFT_PAGE+offset);
flash = (uint16_t *)(NVM_LEFT_PAGE+offset);
break;
case 5:
case 6:
case 7:
case 8:
flash = (int16u *)(NVM_RIGHT_PAGE+offset);
flash = (uint16_t *)(NVM_RIGHT_PAGE+offset);
break;
case 0:
default:
// Flash is in an invalid state
// Fix it with a dummy write and then return the flash page left
{
int16u dummy = 0xFFFF;
uint16_t dummy = 0xFFFF;
halCommonWriteToNvm(&dummy, 0, 2);
flash = (int16u *)(NVM_LEFT_PAGE+offset);
flash = (uint16_t *)(NVM_LEFT_PAGE+offset);
}
}
@ -197,12 +197,12 @@ int16u *halCommonGetAddressFromNvm(int32u offset)
}
static int8u erasePage(int32u page)
static uint8_t erasePage(uint32_t page)
{
StStatus status;
int32u i, k;
int32u address;
int8u *flash;
uint32_t i, k;
uint32_t address;
uint8_t *flash;
//Erasing a LEFT or RIGHT page requires erasing all of the flash pages.
//Since the mgmt bytes are stored at the bottom of a page, the flash pages
@ -211,7 +211,7 @@ static int8u erasePage(int32u page)
//words are still valid the next time determineState() is called.
for(i=NVM_FLASH_PAGE_COUNT;i>0;i--) {
address = (page+((i-1)*MFB_PAGE_SIZE_B));
flash = (int8u *)address;
flash = (uint8_t *)address;
//Scan the page to determine if it is fully erased already.
//If the flash is not erased, erase it. The purpose of scanning
//first is to save a little time if erasing is not required.
@ -248,7 +248,7 @@ static int8u erasePage(int32u page)
do { \
/*Copy all data below the new data from the srcPage to the destPage*/ \
status = halInternalFlashWrite(destPage+NVM_MGMT_SIZE_B, \
(int16u *)(srcPage+NVM_MGMT_SIZE_B), \
(uint16_t *)(srcPage+NVM_MGMT_SIZE_B), \
(offset-NVM_MGMT_SIZE_B)/2); \
if(status != ST_SUCCESS) { return status; } \
/*Write the new data*/ \
@ -258,7 +258,7 @@ static int8u erasePage(int32u page)
if(status != ST_SUCCESS) { return status; } \
/*Copy all data above the new data from the srcPage to the destPage*/ \
status = halInternalFlashWrite(destPage+offset+length, \
(int16u *)(srcPage+offset+length), \
(uint16_t *)(srcPage+offset+length), \
(NVM_DATA_SIZE_B- \
length-offset- \
NVM_MGMT_SIZE_B)/2); \
@ -269,7 +269,7 @@ static int8u erasePage(int32u page)
//the proper management address.
#define WRITE_MGMT_16BITS(address, data) \
do{ \
int16u value = data; \
uint16_t value = data; \
status = halInternalFlashWrite((address), &value, 1); \
if(status != ST_SUCCESS) { \
return status; \
@ -277,14 +277,14 @@ static int8u erasePage(int32u page)
} while(0)
int8u halCommonWriteToNvm(const void *data, int32u offset, int16u length)
uint8_t halCommonWriteToNvm(const void *data, uint32_t offset, uint16_t length)
{
StStatus status;
int8u state, exitState;
int32u srcPage;
int32u destPage;
uint8_t state, exitState;
uint32_t srcPage;
uint32_t destPage;
//Remember: NVM data storage works on 16bit quantities.
int16u *ram = (int16u*)data;
uint16_t *ram = (uint16_t*)data;
//The NVM data storage system cannot function if the LEFT and RIGHT
//storage are not aligned to physical flash pages.

12
cpu/stm32w108/hal/micro/cortexm3/nvm.h
View file

@ -137,7 +137,7 @@
* - Refer to nvm-def.h for a list of offset/length that define the data
* stored in NVM storage space.
* - All writes to flash are 16bit granularity and therefore the internal
* flash writes cast the data to int16u. Length is also required to be
* flash writes cast the data to uint16_t. Length is also required to be
* a multiple of 16bits.
* - Flash page erase uses a granularity of a single flash page. The size
* of a flash page depends on the chip and is defined in memmap.h with
@ -198,7 +198,7 @@
* - ST_ERR_FATAL if the NVM storage management indicated an invalid
* state. The function will return entirely 0xFF in the data parameter.
*/
StStatus halCommonReadFromNvm(void *data, int32u offset, int16u length);
StStatus halCommonReadFromNvm(void *data, uint32_t offset, uint16_t length);
/**
* @brief Return the address of the token in NVM
@ -208,7 +208,7 @@ StStatus halCommonReadFromNvm(void *data, int32u offset, int16u length);
*
* @return The address requested
*/
int16u *halCommonGetAddressFromNvm(int32u offset);
uint16_t *halCommonGetAddressFromNvm(uint32_t offset);
/**
* @brief Write the NVM data from the provided location RAM into flash.
@ -226,7 +226,7 @@ int16u *halCommonGetAddressFromNvm(int32u offset);
* - Any other status value is an error code generated by the low level
* flash erase and write API. Refer to flash.h for details.
*/
StStatus halCommonWriteToNvm(const void *data, int32u offset, int16u length);
StStatus halCommonWriteToNvm(const void *data, uint32_t offset, uint16_t length);
/**
* @brief Define the number of physical flash pages that comprise a NVM page.
@ -256,14 +256,14 @@ StStatus halCommonWriteToNvm(const void *data, int32u offset, int16u length);
* is defined by nvmStorageLeft[NVM_DATA_SIZE_B] and placed by the linker
* using the segment "NVM".
*/
#define NVM_LEFT_PAGE ((int32u)nvmStorageLeft)
#define NVM_LEFT_PAGE ((uint32_t)nvmStorageLeft)
/**
* @brief Define the absolute address of the RIGHT page. RIGHT page storage
* is defined by nvmStorageRight[NVM_DATA_SIZE_B] and placed by the linker
* using the segment "NVM".
*/
#define NVM_RIGHT_PAGE ((int32u)nvmStorageRight)
#define NVM_RIGHT_PAGE ((uint32_t)nvmStorageRight)
/**
* @brief Define the number of bytes that comprise the NVM management bytes.

62
cpu/stm32w108/hal/micro/cortexm3/sleep.c
View file

@ -117,9 +117,9 @@
//place in the halInternalWakeEvent variable
#define INTERNAL_WAKE_EVENT_BIT_SHIFT 20
static int32u halInternalWakeEvent=0;
static uint32_t halInternalWakeEvent=0;
int32u halGetWakeInfo(void)
uint32_t halGetWakeInfo(void)
{
return halInternalWakeEvent;
}
@ -129,7 +129,7 @@ void halInternalSleep(SleepModes sleepMode)
//Timer restoring always takes place during the wakeup sequence. We save
//the state here in case SLEEPMODE_NOTIMER is invoked, which would disable
//the clocks.
int32u SLEEPTMR_CLKEN_SAVED = SLEEPTMR_CLKEN;
uint32_t SLEEPTMR_CLKEN_SAVED = SLEEPTMR_CLKEN;
//This code assumes all wake source registers are properly configured.
//As such, it should be called from halSleepWithOptions() or from
@ -138,7 +138,7 @@ void halInternalSleep(SleepModes sleepMode)
//The parameter gpioWakeSel is a bitfield composite of the GPIO wake
//sources derived from the 3 ports, indicating which of the 24 GPIO
//are configured as a wake source.
int32u gpioWakeSel = (GPIO_PAWAKE<<0);
uint32_t gpioWakeSel = (GPIO_PAWAKE<<0);
gpioWakeSel |= (GPIO_PBWAKE<<8);
gpioWakeSel |= (GPIO_PCWAKE<<16);
@ -248,38 +248,38 @@ deepSleepCore:
//MAC_TIMER_INT_MASK - reinitialized by stStackPowerUp()
//BB_INT_MASK - reinitialized by stStackPowerUp()
//SEC_INT_MASK - reinitialized by stStackPowerUp()
int32u INT_SLEEPTMRCFG_SAVED = INT_SLEEPTMRCFG_REG;
int32u INT_MGMTCFG_SAVED = INT_MGMTCFG_REG;
uint32_t INT_SLEEPTMRCFG_SAVED = INT_SLEEPTMRCFG_REG;
uint32_t INT_MGMTCFG_SAVED = INT_MGMTCFG_REG;
//INT_TIM1CFG - reinitialized by halPowerUp() or similar
//INT_TIM2CFG - reinitialized by halPowerUp() or similar
//INT_SC1CFG - reinitialized by halPowerUp() or similar
//INT_SC2CFG - reinitialized by halPowerUp() or similar
//INT_ADCCFG - reinitialized by halPowerUp() or similar
int32u GPIO_INTCFGA_SAVED = GPIO_INTCFGA_REG;
int32u GPIO_INTCFGB_SAVED = GPIO_INTCFGB_REG;
int32u GPIO_INTCFGC_SAVED = GPIO_INTCFGC_REG;
int32u GPIO_INTCFGD_SAVED = GPIO_INTCFGD_REG;
uint32_t GPIO_INTCFGA_SAVED = GPIO_INTCFGA_REG;
uint32_t GPIO_INTCFGB_SAVED = GPIO_INTCFGB_REG;
uint32_t GPIO_INTCFGC_SAVED = GPIO_INTCFGC_REG;
uint32_t GPIO_INTCFGD_SAVED = GPIO_INTCFGD_REG;
//SC1_INTMODE - reinitialized by halPowerUp() or similar
//SC2_INTMODE - reinitialized by halPowerUp() or similar
//----CM_LV
int32u OSC24M_BIASTRIM_SAVED = OSC24M_BIASTRIM_REG;
int32u OSCHF_TUNE_SAVED = OSCHF_TUNE_REG;
int32u DITHER_DIS_SAVED = DITHER_DIS_REG;
uint32_t OSC24M_BIASTRIM_SAVED = OSC24M_BIASTRIM_REG;
uint32_t OSCHF_TUNE_SAVED = OSCHF_TUNE_REG;
uint32_t DITHER_DIS_SAVED = DITHER_DIS_REG;
//OSC24M_CTRL - reinitialized by halPowerUp() or similar
//CPU_CLKSEL - reinitialized by halPowerUp() or similar
//TMR1_CLK_SEL - reinitialized by halPowerUp() or similar
//TMR2_CLK_SEL - reinitialized by halPowerUp() or similar
int32u PCTRACE_SEL_SAVED = PCTRACE_SEL_REG;
uint32_t PCTRACE_SEL_SAVED = PCTRACE_SEL_REG;
//----RAM_CTRL
int32u MEM_PROT_0_SAVED = MEM_PROT_0_REG;
int32u MEM_PROT_1_SAVED = MEM_PROT_1_REG;
int32u MEM_PROT_2_SAVED = MEM_PROT_2_REG;
int32u MEM_PROT_3_SAVED = MEM_PROT_3_REG;
int32u MEM_PROT_4_SAVED = MEM_PROT_4_REG;
int32u MEM_PROT_5_SAVED = MEM_PROT_5_REG;
int32u MEM_PROT_6_SAVED = MEM_PROT_6_REG;
int32u MEM_PROT_7_SAVED = MEM_PROT_7_REG;
int32u MEM_PROT_EN_SAVED = MEM_PROT_EN_REG;
uint32_t MEM_PROT_0_SAVED = MEM_PROT_0_REG;
uint32_t MEM_PROT_1_SAVED = MEM_PROT_1_REG;
uint32_t MEM_PROT_2_SAVED = MEM_PROT_2_REG;
uint32_t MEM_PROT_3_SAVED = MEM_PROT_3_REG;
uint32_t MEM_PROT_4_SAVED = MEM_PROT_4_REG;
uint32_t MEM_PROT_5_SAVED = MEM_PROT_5_REG;
uint32_t MEM_PROT_6_SAVED = MEM_PROT_6_REG;
uint32_t MEM_PROT_7_SAVED = MEM_PROT_7_REG;
uint32_t MEM_PROT_EN_SAVED = MEM_PROT_EN_REG;
//----AUX_ADC
// reinitialized by halPowerUp() or similar
//----CAL_ADC
@ -295,14 +295,14 @@ deepSleepCore:
//----NVIC
//ST_CSR - fixed, restored by cstartup when exiting deep sleep
//ST_RVR - fixed, restored by cstartup when exiting deep sleep
int32u INT_CFGSET_SAVED = INT_CFGSET_REG; //mask against wake sources
uint32_t INT_CFGSET_SAVED = INT_CFGSET_REG; //mask against wake sources
//INT_PENDSET - used below when overlapping interrupts and wake sources
//NVIC_IPR_3to0 - fixed, restored by cstartup when exiting deep sleep
//NVIC_IPR_7to4 - fixed, restored by cstartup when exiting deep sleep
//NVIC_IPR_11to8 - fixed, restored by cstartup when exiting deep sleep
//NVIC_IPR_15to12 - fixed, restored by cstartup when exiting deep sleep
//NVIC_IPR_19to16 - fixed, restored by cstartup when exiting deep sleep
int32u SCS_VTOR_SAVED = SCS_VTOR_REG;
uint32_t SCS_VTOR_SAVED = SCS_VTOR_REG;
//SCS_CCR - fixed, restored by cstartup when exiting deep sleep
//SCS_SHPR_7to4 - fixed, restored by cstartup when exiting deep sleep
//SCS_SHPR_11to8 - fixed, restored by cstartup when exiting deep sleep
@ -320,7 +320,7 @@ deepSleepCore:
//up exactly which GPIO could have woken us up.
//Reading the three IN registers is done separately to avoid warnings
//about undefined order of volatile access.
int32u GPIO_IN_SAVED = GPIO_PAIN;
uint32_t GPIO_IN_SAVED = GPIO_PAIN;
GPIO_IN_SAVED |= (GPIO_PBIN<<8);
GPIO_IN_SAVED |= (GPIO_PCIN<<16);
//reset the power up events by writing 1 to all bits.
@ -425,7 +425,7 @@ deepSleepCore:
//only propagate across deep sleep the interrupts that are both
//enabled and possible wake sources
{
int32u wakeSourceInterruptMask = 0;
uint32_t wakeSourceInterruptMask = 0;
if(GPIO_PBWAKE&PB0) {
wakeSourceInterruptMask |= INT_IRQA;
@ -513,7 +513,7 @@ deepSleepCore:
{
//Use a local copy of WAKE_SEL to avoid warnings from the compiler
//about order of volatile accesses
int32u wakeSel = WAKE_SEL;
uint32_t wakeSel = WAKE_SEL;
//stall until a wake event or CSYSPWRUPREQ/ACK clears
while( (CSYSPWRUPACK_STATUS) && (!(PWRUP_EVENT&wakeSel)) ) {}
//if there was a wake event, allow CSYSPWRUPACK and skip sleep
@ -630,14 +630,14 @@ deepSleepCore:
//Now that we're awake, normal interrupts are operational again
//Take a snapshot of the new GPIO state and the EVENT register to
//record our wake event
int32u GPIO_IN_NEW = GPIO_PAIN;
uint32_t GPIO_IN_NEW = GPIO_PAIN;
GPIO_IN_NEW |= (GPIO_PBIN<<8);
GPIO_IN_NEW |= (GPIO_PCIN<<16);
//Only operate on power up events that are also wake events. Power
//up events will always trigger like an interrupt flag, so we have
//to check them against events that are enabled for waking. (This is
//a two step process because we're accessing two volatile values.)
int32u powerUpEvents = PWRUP_EVENT;
uint32_t powerUpEvents = PWRUP_EVENT;
powerUpEvents &= WAKE_SEL;
halInternalWakeEvent |= ((GPIO_IN_SAVED^GPIO_IN_NEW)&gpioWakeSel);
//PWRUP_SC1 is PB2 which is bit 10
@ -845,7 +845,7 @@ deepSleepCore:
}
void halSleepWithOptions(SleepModes sleepMode, int32u gpioWakeBitMask)
void halSleepWithOptions(SleepModes sleepMode, uint32_t gpioWakeBitMask)
{
//configure all GPIO wake sources
GPIO_PAWAKE = (gpioWakeBitMask>>0)&0xFF;

6
cpu/stm32w108/hal/micro/cortexm3/spmr.s79
View file

@ -35,7 +35,7 @@
__EXPORT__ _executeBarrierInstructions
//------------------------------------------------------------------------------
// int8u _readBasePri(void)
// uint8_t _readBasePri(void)
//
// Read and return the BASEPRI value.
//
@ -50,7 +50,7 @@ _readBasePri:
__CFI__(EndBlock cfiBlock0)
//------------------------------------------------------------------------------
// void _writeBasePri(int8u priority)
// void _writeBasePri(uint8_t priority)
//
// Write BASEPRI with the passed value to obtain the proper preemptive priority
// group masking. Note that the value passed must have been left shifted by 3
@ -68,7 +68,7 @@ _writeBasePri:
__CFI__(EndBlock cfiBlock1)
//------------------------------------------------------------------------------
// int8u _disableBasePri(void)
// uint8_t _disableBasePri(void)
//
// Set BASEPRI to mask out interrupts but allow faults. It returns the value
// BASEPRI had when it was called.

22
cpu/stm32w108/hal/micro/cortexm3/stm32w108/board.h
View file

@ -84,9 +84,9 @@ typedef struct LedResourceStruct {
/** Name of the LED as printed in the board */
char *name;
/** GPIO port associated with the LED */
int8u gpioPort;
uint8_t gpioPort;
/** GPIO pin associated with the LED */
int8u gpioPin;
uint8_t gpioPin;
} LedResourceType;
typedef LedResourceType InfraRedLedResourceType;
@ -98,9 +98,9 @@ typedef struct ButtonResourceStruct {
/** Name of the button as printed in the board */
char *name;
/** GPIO port associated with the button */
int8u gpioPort;
uint8_t gpioPort;
/** GPIO pin associated with the button */
int8u gpioPin;
uint8_t gpioPin;
} ButtonResourceType;
/**
@ -110,7 +110,7 @@ typedef struct MemsResourceStruct {
/** Name of the MEMS device */
char *name;
/** Serial communication port associated with the MEMS */
int8u scPort;
uint8_t scPort;
} MemsResourceType;
/**
@ -120,9 +120,9 @@ typedef struct TempSensorResourceStruct {
/** Name of the temperature sensor device */
char *name;
/** GPIO port associated with the sensor */
int8u gpioPort;
uint8_t gpioPort;
/** GPIO pin associated with the sensor */
int8u gpioPin;
uint8_t gpioPin;
/** Flag to indicate whether the ADC range extension bug fix is implemented */
boolean adcFix;
} TempSensorResourceType;
@ -167,11 +167,11 @@ typedef struct BoardIOStruct {
*/
typedef struct BoardResourcesStruct {
const char *name;
const int32u flags;
const uint32_t flags;
/** Number of buttons */
int8u buttons;
uint8_t buttons;
/** Number of leds */
int8u leds;
uint8_t leds;
/** Board I/O description */
const BoardIOType *io;
/** Board infrared led description */
@ -202,7 +202,7 @@ extern BoardResourcesType const *boardDescription;
/** Description buttons definition */
#define BUTTON_Sn(n) (PORTx_PIN(boardDescription->io->buttons[n].gpioPort, boardDescription->io->buttons[n].gpioPin))
#define BUTTON_Sn_WAKE_SOURCE(n) (1 << ((boardDescription->io->buttons[n].gpioPin) + (8 * (boardDescription->io->buttons[n].gpioPort >> 3))))
#define BUTTON_INPUT_GPIO(port) *((volatile int32u *) (GPIO_PxIN_BASE + GPIO_Px_OFFSET * port))
#define BUTTON_INPUT_GPIO(port) *((volatile uint32_t *) (GPIO_PxIN_BASE + GPIO_Px_OFFSET * port))
#define DUMMY_BUTTON 0xff
#define BUTTON_S1 (boardDescription->buttons>0 ? BUTTON_Sn(0): DUMMY_BUTTON)

18
cpu/stm32w108/hal/micro/cortexm3/stm32w108/crt_stm32w108.c → cpu/stm32w108/hal/micro/cortexm3/stm32w108/crt-stm32w108.c
View file

@ -139,8 +139,8 @@ void (* const g_pfnVectors[])(void) =
halDebugIsr, // 32
};
static void setStackPointer(int32u address) __attribute__((noinline));
static void setStackPointer(int32u address)
static void setStackPointer(uint32_t address) __attribute__((noinline));
static void setStackPointer(uint32_t address)
{
// This code is needed to generate the instruction below
// that GNU ASM is refusing to add
@ -148,7 +148,7 @@ static void setStackPointer(int32u address)
asm(".short 0x4685");
}
static const int16u blOffset[] = {
static const uint16_t blOffset[] = {
0x0715 - 0x03ad - 0x68,
0x0719 - 0x03ad - 0x6C
};
@ -277,17 +277,17 @@ void Reset_Handler(void)
}
//USART bootloader software activation check
if ((*((int32u *)RAM_BOTTOM) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) && (*((int8u *)(RAM_BOTTOM+4)) == IAP_BOOTLOADER_MODE_UART)){
int8u cut = *(volatile int8u *) 0x08040798;
int16u offset = 0;
if ((*((uint32_t *)RAM_BOTTOM) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) && (*((uint8_t *)(RAM_BOTTOM+4)) == IAP_BOOTLOADER_MODE_UART)){
uint8_t cut = *(volatile uint8_t *) 0x08040798;
uint16_t offset = 0;
typedef void (*EntryPoint)(void);
offset = (halFixedAddressTable.baseTable.version == 3) ? blOffset[cut - 2] : 0;
*((int32u *)RAM_BOTTOM) = 0;
*((uint32_t *)RAM_BOTTOM) = 0;
if (offset) {
halInternalSwitchToXtal();
}
EntryPoint entryPoint = (EntryPoint)(*(int32u *)(FIB_BOTTOM+4) - offset);
setStackPointer(*(int32u *)FIB_BOTTOM);
EntryPoint entryPoint = (EntryPoint)(*(uint32_t *)(FIB_BOTTOM+4) - offset);
setStackPointer(*(uint32_t *)FIB_BOTTOM);
entryPoint();
}

18
cpu/stm32w108/hal/micro/cortexm3/stm32w108/low_level_init.c → cpu/stm32w108/hal/micro/cortexm3/stm32w108/low-level-init.c
View file

@ -38,12 +38,12 @@ extern void halInternalSwitchToXtal(void);
__interwork int __low_level_init(void);
static void setStackPointer(int32u address)
static void setStackPointer(uint32_t address)
{
asm("MOVS SP, r0");
}
static const int16u blOffset[] = {
static const uint16_t blOffset[] = {
0x0715 - 0x03ad - 0x68,
0x0719 - 0x03ad - 0x6C
};
@ -79,7 +79,7 @@ __interwork int __low_level_init(void)
////---- Always remap the vector table ----////
// We might be coming from a bootloader at the base of flash, or even in the
// NULL_BTL case, the BAT/AAT will be at the beginning of the image
SCS_VTOR = (int32u)__vector_table;
SCS_VTOR = (uint32_t)__vector_table;
////---- Always Configure Interrupt Priorities ----////
//The STM32W support 5 bits of priority configuration.
@ -169,17 +169,17 @@ __interwork int __low_level_init(void)
}
//USART bootloader software activation check
if ((*((int32u *)RAM_BOTTOM) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) && (*((int8u *)(RAM_BOTTOM+4)) == IAP_BOOTLOADER_MODE_UART)){
int8u cut = *(volatile int8u *) 0x08040798;
int16u offset = 0;
if ((*((uint32_t *)RAM_BOTTOM) == IAP_BOOTLOADER_APP_SWITCH_SIGNATURE) && (*((uint8_t *)(RAM_BOTTOM+4)) == IAP_BOOTLOADER_MODE_UART)){
uint8_t cut = *(volatile uint8_t *) 0x08040798;
uint16_t offset = 0;
typedef void (*EntryPoint)(void);
offset = (halFixedAddressTable.baseTable.version == 3) ? blOffset[cut - 2] : 0;
*((int32u *)RAM_BOTTOM) = 0;
*((uint32_t *)RAM_BOTTOM) = 0;
if (offset) {
halInternalSwitchToXtal();
}
EntryPoint entryPoint = (EntryPoint)(*(int32u *)(FIB_BOTTOM+4) - offset);
setStackPointer(*(int32u *)FIB_BOTTOM);
EntryPoint entryPoint = (EntryPoint)(*(uint32_t *)(FIB_BOTTOM+4) - offset);
setStackPointer(*(uint32_t *)FIB_BOTTOM);
entryPoint();
}

8
cpu/stm32w108/hal/micro/cortexm3/stm32w108/memmap.h
View file

@ -46,12 +46,12 @@
#define FPEC_KEY2 0xCDEF89AB //magic key defined in hardware
//Translation between page number and simee (word based) address
#define SIMEE_ADDR_TO_PAGE(x) ((int8u)(((int16u)(x)) >> 9))
#define PAGE_TO_SIMEE_ADDR(x) (((int16u)(x)) << 9)
#define SIMEE_ADDR_TO_PAGE(x) ((uint8_t)(((uint16_t)(x)) >> 9))
#define PAGE_TO_SIMEE_ADDR(x) (((uint16_t)(x)) << 9)
//Translation between page number and code addresses, used by bootloaders
#define PROG_ADDR_TO_PAGE(x) ((int8u)((((int32u)(x))&MFB_ADDR_MASK) >> 10))
#define PAGE_TO_PROG_ADDR(x) ((((int32u)(x)) << 10)|MFB_BOTTOM)
#define PROG_ADDR_TO_PAGE(x) ((uint8_t)((((uint32_t)(x))&MFB_ADDR_MASK) >> 10))
#define PAGE_TO_PROG_ADDR(x) ((((uint32_t)(x)) << 10)|MFB_BOTTOM)
#endif //__STM32W108_MEMMAP_H__

2260
cpu/stm32w108/hal/micro/cortexm3/stm32w108/regs.h
View file

File diff suppressed because it is too large Load diff

2
cpu/stm32w108/hal/micro/cortexm3/stm32w108/stm32w108_type.h → cpu/stm32w108/hal/micro/cortexm3/stm32w108/stm32w108-type.h
View file

@ -1,5 +1,5 @@
/******************** (C) COPYRIGHT 2007 STMicroelectronics ********************
* File Name : stm32w108_type.h
* File Name : stm32w108-type.h
* Author : MCD Application Team
* Version : V1.0
* Date : 10/08/2009

24
cpu/stm32w108/hal/micro/cortexm3/system-timer.c
View file

@ -32,14 +32,14 @@ static boolean sleepTimerInterruptOccurred = FALSE;
* a single clock tick occurs every 0.9769625 milliseconds, and a rollover
* of the 16-bit timer occurs every 64 seconds.
*/
int16u halCommonGetInt16uMillisecondTick(void)
uint16_t halCommonGetInt16uMillisecondTick(void)
{
return (int16u)halCommonGetInt32uMillisecondTick();
return (uint16_t)halCommonGetInt32uMillisecondTick();
}
int16u halCommonGetInt16uQuarterSecondTick(void)
uint16_t halCommonGetInt16uQuarterSecondTick(void)
{
return (int16u)(halCommonGetInt32uMillisecondTick() >> 8);
return (uint16_t)(halCommonGetInt32uMillisecondTick() >> 8);
}
/**
@ -47,9 +47,9 @@ int16u halCommonGetInt16uQuarterSecondTick(void)
* a single clock tick occurs every 0.9769625 milliseconds, and a rollover
* of the 32-bit timer occurs approximately every 48.5 days.
*/
int32u halCommonGetInt32uMillisecondTick(void)
uint32_t halCommonGetInt32uMillisecondTick(void)
{
int32u time;
uint32_t time;
time = SLEEPTMR_CNTH<<16;
time |= SLEEPTMR_CNTL;
@ -71,13 +71,13 @@ void halSleepTimerIsr(void)
#define CONVERT_TICKS_TO_QS(x) ((x) >> 8)
#define TIMER_MAX_QS 0x1000000 // = 4194304 seconds * 4 = 16777216
static StStatus internalSleepForQs(boolean useGpioWakeMask,
int32u *duration,
int32u gpioWakeBitMask)
uint32_t *duration,
uint32_t gpioWakeBitMask)
{
StStatus status = ST_SUCCESS;
int32u sleepOverflowCount;
int32u remainder;
int32u startCount;
uint32_t sleepOverflowCount;
uint32_t remainder;
uint32_t startCount;
//There is really no reason to bother with a duration of 0qs
if(*duration==0) {
@ -165,7 +165,7 @@ static StStatus internalSleepForQs(boolean useGpioWakeMask,
return status;
}
StStatus halSleepForQsWithOptions(int32u *duration, int32u gpioWakeBitMask)
StStatus halSleepForQsWithOptions(uint32_t *duration, uint32_t gpioWakeBitMask)
{
return internalSleepForQs(TRUE, duration, gpioWakeBitMask);
}

12
cpu/stm32w108/hal/micro/cortexm3/temperature_sensor.c → cpu/stm32w108/hal/micro/cortexm3/temperature-sensor.c
View file

@ -1,4 +1,4 @@
/**@file temperature_sensor.c
/**@file temperature-sensor.c
* @brief MB851 temperature sensor APIS
*
*
@ -8,7 +8,7 @@
#include BOARD_HEADER
#include "hal/hal.h"
#include "hal/error.h"
#include "hal/micro/temperature_sensor.h"
#include "hal/micro/temperature-sensor.h"
#include "hal/micro/adc.h"
void temperatureSensor_Init(void)
@ -29,10 +29,10 @@ void temperatureSensor_Init(void)
#endif /* ENABLE_ADC_EXTENDED_RANGE_BROKEN */
}/* end temperatureSensor_Init() */
int32u temperatureSensor_GetValue(void)
uint32_t temperatureSensor_GetValue(void)
{
static int16u ADCvalue;
static int16s volts;
static uint16_t ADCvalue;
static int16_t volts;
/*
NOTE:
@ -47,6 +47,6 @@ int32u temperatureSensor_GetValue(void)
// 100 uVolts
volts = halConvertValueToVolts(ADCvalue);
return ((18641 - (int32s)volts)*100)/1171;
return ((18641 - (int32_t)volts)*100)/1171;
}/* end temperatureSensor_GetValue() */

112
cpu/stm32w108/hal/micro/cortexm3/token-manufacturing.h
View file

@ -83,72 +83,72 @@
#ifndef __MFG_TYPES_DEFINED__
#define __MFG_TYPES_DEFINED__
//--- Fixed Information Block ---
typedef int8u tokTypeMfgChipData[24];
typedef int8u tokTypeMfgPartData[6];
typedef int8u tokTypeMfgTesterData[6];
typedef int8u tokTypeMfgStEui64[8];
typedef uint8_t tokTypeMfgChipData[24];
typedef uint8_t tokTypeMfgPartData[6];
typedef uint8_t tokTypeMfgTesterData[6];
typedef uint8_t tokTypeMfgStEui64[8];
typedef struct {
int16u iffilterL;
int16u lna;
int16u ifamp;
int16u rxadcH;
int16u prescalar;
int16u phdet;
int16u vco;
int16u loopfilter;
int16u pa;
int16u iqmixer;
uint16_t iffilterL;
uint16_t lna;
uint16_t ifamp;
uint16_t rxadcH;
uint16_t prescalar;
uint16_t phdet;
uint16_t vco;
uint16_t loopfilter;
uint16_t pa;
uint16_t iqmixer;
} tokTypeMfgAnalogueTrim;
typedef struct {
int16u iffilterH;
int16u biasmaster;
int16u moddac;
int16u auxadc;
int16u caladc;
uint16_t iffilterH;
uint16_t biasmaster;
uint16_t moddac;
uint16_t auxadc;
uint16_t caladc;
} tokTypeMfgAnalogueTrimBoth;
typedef struct {
int8u regTrim1V2;
int8u regTrim1V8;
uint8_t regTrim1V2;
uint8_t regTrim1V8;
} tokTypeMfgRegTrim;
typedef int16u tokTypeMfgRegVoltage1V8;
typedef int16u tokTypeMfgAdcVrefVoltage;
typedef int16u tokTypeMfgTempCal;
typedef int16u tokTypeMfgFibVersion;
typedef int16u tokTypeMfgFibChecksum;
typedef uint16_t tokTypeMfgRegVoltage1V8;
typedef uint16_t tokTypeMfgAdcVrefVoltage;
typedef uint16_t tokTypeMfgTempCal;
typedef uint16_t tokTypeMfgFibVersion;
typedef uint16_t tokTypeMfgFibChecksum;
typedef struct {
int16u ob2;
int16u ob3;
int16u ob0;
int16u ob1;
uint16_t ob2;
uint16_t ob3;
uint16_t ob0;
uint16_t ob1;
} tokTypeMfgFibObs;
//--- Customer Information Block ---
typedef struct {
int16u ob0;
int16u ob1;
int16u ob2;
int16u ob3;
int16u ob4;
int16u ob5;
int16u ob6;
int16u ob7;
uint16_t ob0;
uint16_t ob1;
uint16_t ob2;
uint16_t ob3;
uint16_t ob4;
uint16_t ob5;
uint16_t ob6;
uint16_t ob7;
} tokTypeMfgCibObs;
typedef int16u tokTypeMfgCustomVersion;
typedef int8u tokTypeMfgCustomEui64[8];
typedef int8u tokTypeMfgString[16];
typedef int8u tokTypeMfgBoardName[16];
typedef int16u tokTypeMfgManufId;
typedef int16u tokTypeMfgPhyConfig;
typedef int8u tokTypeMfgBootloadAesKey[16];
typedef int8u tokTypeMfgEui64[8];
typedef int8u tokTypeMfgEzspStorage[8];
typedef int16u tokTypeMfgAshConfig;
typedef uint16_t tokTypeMfgCustomVersion;
typedef uint8_t tokTypeMfgCustomEui64[8];
typedef uint8_t tokTypeMfgString[16];
typedef uint8_t tokTypeMfgBoardName[16];
typedef uint16_t tokTypeMfgManufId;
typedef uint16_t tokTypeMfgPhyConfig;
typedef uint8_t tokTypeMfgBootloadAesKey[16];
typedef uint8_t tokTypeMfgEui64[8];
typedef uint8_t tokTypeMfgEzspStorage[8];
typedef uint16_t tokTypeMfgAshConfig;
typedef struct {
int8u certificate[48];
int8u caPublicKey[22];
int8u privateKey[21];
uint8_t certificate[48];
uint8_t caPublicKey[22];
uint8_t privateKey[21];
// The bottom flag bit is 1 for uninitialized, 0 for initialized.
// The other flag bits should be set to 0 at initialization.
int8u flags;
uint8_t flags;
} tokTypeMfgCbkeData;
typedef struct {
// The bottom flag bit is 1 for uninitialized, 0 for initialized.
@ -158,11 +158,11 @@ typedef struct {
// Special flags support. Due to a bug in the way some customers
// had programmed the flags field, we will also examine the upper
// bits 9 and 10 for the size field. Those bits are also reserved.
int16u flags;
int8u value[16];
int16u crc;
uint16_t flags;
uint8_t value[16];
uint16_t crc;
} tokTypeMfgInstallationCode;
typedef int16u tokTypeMfgOsc24mBiasTrim;
typedef uint16_t tokTypeMfgOsc24mBiasTrim;
#endif //__MFG_TYPES_DEFINED__

22
cpu/stm32w108/hal/micro/cortexm3/uart.c
View file

@ -28,18 +28,18 @@ int putchar (int c)
#endif
#define RECEIVE_QUEUE_SIZE (128)
int8u rxQ[RECEIVE_QUEUE_SIZE];
int16u rxHead;
int16u rxTail;
int16u rxUsed;
uint8_t rxQ[RECEIVE_QUEUE_SIZE];
uint16_t rxHead;
uint16_t rxTail;
uint16_t rxUsed;
//////////////////////////////////////////////////////////////////////////////
// Initialization
void uartInit(int32u baudrate, int8u databits, SerialParity parity, int8u stopbits)
void uartInit(uint32_t baudrate, uint8_t databits, SerialParity parity, uint8_t stopbits)
{
int32u tempcfg;
int32u tmp;
uint32_t tempcfg;
uint32_t tmp;
assert( (baudrate >= 300) && (baudrate <=921600) );
@ -171,10 +171,10 @@ static void halInternalUart1RxIsr(void)
// data, processing any errors noted
// along the way.
while ( SC1_UARTSTAT & SC_UARTRXVAL ) {
int8u errors = SC1_UARTSTAT & (SC_UARTFRMERR |
uint8_t errors = SC1_UARTSTAT & (SC_UARTFRMERR |
SC_UARTRXOVF |
SC_UARTPARERR );
int8u incoming = (int8u) SC1_DATA;
uint8_t incoming = (uint8_t) SC1_DATA;
if ( (errors == 0) && (rxUsed < (RECEIVE_QUEUE_SIZE-1)) ) {
rxQ[rxHead] = incoming;
@ -194,7 +194,7 @@ static void halInternalUart1RxIsr(void)
void halSc1Isr(void)
{
int32u interrupt;
uint32_t interrupt;
//this read and mask is performed in two steps otherwise the compiler
//will complain about undefined order of volatile access
@ -233,7 +233,7 @@ void halSc1Isr(void)
* Output : dataByte: buffer containing the read byte if any
* Return : TRUE if there is a data, FALSE otherwise
*******************************************************************************/
boolean __io_getcharNonBlocking(int8u *data)
boolean __io_getcharNonBlocking(uint8_t *data)
{
if (__read(_LLIO_STDIN,data,1))
return TRUE;

4
cpu/stm32w108/hal/micro/cortexm3/uart.h
View file

@ -36,7 +36,7 @@ typedef enum
* @return stopbits The number of stop bits used for communication.
* Valid values are 1 or 2
*/
void uartInit(int32u baudrate, int8u databits, SerialParity parity, int8u stopbits);
void uartInit(uint32_t baudrate, uint8_t databits, SerialParity parity, uint8_t stopbits);
#ifdef __ICCARM__
/**
@ -63,7 +63,7 @@ size_t fflush(int handle);
/**
* @brief Read the input byte if any.
*/
boolean __io_getcharNonBlocking(int8u *data);
boolean __io_getcharNonBlocking(uint8_t *data);
void __io_putchar( char c );
int __io_getchar(void);
void __io_flush( void );