better start file
removed unnecessary line from tmr-int test
This commit is contained in:
parent
9b05f05503
commit
a00b9f7bd0
121
src/start.S
121
src/start.S
|
@ -4,9 +4,6 @@
|
||||||
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
|
||||||
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
|
||||||
*
|
*
|
||||||
* Modified for the mc13224v
|
|
||||||
* Copyright (c) 2009 Mariano Alvira <mar@devl.org>
|
|
||||||
*
|
|
||||||
* See file CREDITS for list of people who contributed to this
|
* See file CREDITS for list of people who contributed to this
|
||||||
* project.
|
* project.
|
||||||
*
|
*
|
||||||
|
@ -26,10 +23,11 @@
|
||||||
* MA 02111-1307 USA
|
* MA 02111-1307 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
|
/* Standard definitions of Mode bits and Interrupt (I & F) flags in PSRs */
|
||||||
|
|
||||||
.equ I_BIT, 0x80 /* when I bit is set, IRQ is disabled */
|
.equ IRQ_DISABLE, 0x80 /* when I bit is set, IRQ is disabled */
|
||||||
.equ F_BIT, 0x40 /* when F bit is set, FIQ is disabled */
|
.equ FIQ_DISABLE, 0x40 /* when F bit is set, FIQ is disabled */
|
||||||
|
|
||||||
.equ USR_MODE, 0x10
|
.equ USR_MODE, 0x10
|
||||||
.equ FIQ_MODE, 0x11
|
.equ FIQ_MODE, 0x11
|
||||||
|
@ -39,12 +37,13 @@
|
||||||
.equ UND_MODE, 0x1B
|
.equ UND_MODE, 0x1B
|
||||||
.equ SYS_MODE, 0x1F
|
.equ SYS_MODE, 0x1F
|
||||||
|
|
||||||
.equ usr_stack_size, 256*4
|
.equ usr_stack_size, 1024
|
||||||
.equ irq_stack_size, 128*4
|
.equ irq_stack_size, 256
|
||||||
.equ fiq_stack_size, 128*4
|
.equ fiq_stack_size, 256
|
||||||
.equ und_stack_size, 32*4
|
.equ und_stack_size, 256
|
||||||
.equ abt_stack_size, 32*4
|
.equ abt_stack_size, 16
|
||||||
.equ sup_stack_size, 32*4
|
.equ sup_stack_size, 16
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
*************************************************************************
|
*************************************************************************
|
||||||
|
@ -54,9 +53,11 @@
|
||||||
*************************************************************************
|
*************************************************************************
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
|
||||||
.set base, .
|
.set base, .
|
||||||
.set _rom_data_init, 0x108d0
|
.set _rom_data_init, 0x108d0
|
||||||
|
|
||||||
|
|
||||||
.globl _start
|
.globl _start
|
||||||
_start: b _begin
|
_start: b _begin
|
||||||
ldr pc, _undefined_instruction
|
ldr pc, _undefined_instruction
|
||||||
|
@ -86,7 +87,6 @@ _RPTV_2_START:
|
||||||
_RPTV_3_START:
|
_RPTV_3_START:
|
||||||
bx lr /* do nothing */
|
bx lr /* do nothing */
|
||||||
|
|
||||||
|
|
||||||
.org 0x120
|
.org 0x120
|
||||||
ROM_var_start: .word 0
|
ROM_var_start: .word 0
|
||||||
.org 0x7ff
|
.org 0x7ff
|
||||||
|
@ -96,40 +96,65 @@ ROM_var_end: .word 0
|
||||||
.code 32
|
.code 32
|
||||||
.align
|
.align
|
||||||
_begin:
|
_begin:
|
||||||
|
/* FIQ mode stack */
|
||||||
|
msr CPSR_c, #(FIQ_MODE | IRQ_DISABLE | FIQ_DISABLE)
|
||||||
|
ldr sp, =__fiq_stack_top__ /* set the FIQ stack pointer */
|
||||||
|
|
||||||
ldr r1,=_system_stack
|
/* IRQ mode stack */
|
||||||
msr cpsr_c,#(SVC_MODE | I_BIT | F_BIT)
|
msr CPSR_c, #(IRQ_MODE | IRQ_DISABLE | FIQ_DISABLE)
|
||||||
add r1,r1,#sup_stack_size
|
ldr sp, =__irq_stack_top__ /* set the IRQ stack pointer */
|
||||||
mov sp,r1
|
|
||||||
|
|
||||||
msr cpsr_c,#(IRQ_MODE | I_BIT | F_BIT)
|
/* Supervisor mode stack */
|
||||||
add r1,r1,#irq_stack_size
|
msr CPSR_c, #(SVC_MODE | IRQ_DISABLE | FIQ_DISABLE)
|
||||||
mov sp,r1
|
ldr sp, =__svc_stack_top__ /* set the SVC stack pointer */
|
||||||
|
|
||||||
msr cpsr_c,#(FIQ_MODE | I_BIT | F_BIT)
|
/* Undefined mode stack */
|
||||||
add r1,r1,#fiq_stack_size
|
msr CPSR_c, #(UND_MODE | IRQ_DISABLE | FIQ_DISABLE)
|
||||||
mov sp,r1
|
ldr sp, =__und_stack_top__ /* set the UND stack pointer */
|
||||||
|
|
||||||
msr cpsr_c,#(ABT_MODE | I_BIT | F_BIT)
|
/* Abort mode stack */
|
||||||
add r1,r1,#abt_stack_size
|
msr CPSR_c, #(ABT_MODE | IRQ_DISABLE | FIQ_DISABLE)
|
||||||
mov sp,r1
|
ldr sp, =__abt_stack_top__ /* set the ABT stack pointer */
|
||||||
|
|
||||||
msr cpsr_c,#(UND_MODE | I_BIT | F_BIT)
|
/* System mode stack */
|
||||||
add r1,r1,#und_stack_size
|
msr CPSR_c, #(SYS_MODE | IRQ_DISABLE | FIQ_DISABLE)
|
||||||
mov sp,r1
|
ldr sp, =__sys_stack_top__ /* set the SYS stack pointer */
|
||||||
|
|
||||||
// msr cpsr_c,#(USR_MODE | I_BIT | F_BIT)
|
|
||||||
|
|
||||||
#ifdef USE_ROM_VARS
|
#ifdef USE_ROM_VARS
|
||||||
bl _rom_data_init+.-base
|
bl _rom_data_init+.-base
|
||||||
#endif
|
#endif
|
||||||
msr cpsr_c,#(SVC_MODE) // turn on interrupts --- for debug only
|
msr CPSR_c, #(SYS_MODE)
|
||||||
// msr cpsr_c,#(USR_MODE) // turn on interrupts --- for debug only
|
|
||||||
// add r1,r1,#usr_stack_size
|
|
||||||
// mov sp,r1
|
|
||||||
|
|
||||||
b main
|
b main
|
||||||
|
|
||||||
|
// ldr r1,=_system_stack
|
||||||
|
// msr cpsr_c,#(SVC_MODE | I_BIT | F_BIT)
|
||||||
|
// add r1,r1,#sup_stack_size
|
||||||
|
// mov sp,r1
|
||||||
|
|
||||||
|
// msr cpsr_c,#(IRQ_MODE | I_BIT | F_BIT)
|
||||||
|
// add r1,r1,#irq_stack_size
|
||||||
|
// mov sp,r1
|
||||||
|
|
||||||
|
// msr cpsr_c,#(FIQ_MODE | I_BIT | F_BIT)
|
||||||
|
// add r1,r1,#fiq_stack_size
|
||||||
|
// mov sp,r1
|
||||||
|
|
||||||
|
// msr cpsr_c,#(ABT_MODE | I_BIT | F_BIT)
|
||||||
|
// add r1,r1,#abt_stack_size
|
||||||
|
// mov sp,r1
|
||||||
|
|
||||||
|
// msr cpsr_c,#(UND_MODE | I_BIT | F_BIT)
|
||||||
|
// add r1,r1,#und_stack_size
|
||||||
|
// mov sp,r1
|
||||||
|
|
||||||
|
// msr cpsr_c,#(USR_MODE | I_BIT | F_BIT)
|
||||||
|
|
||||||
|
// bl _rom_data_init+.-base
|
||||||
|
// msr cpsr_c,#(SVC_MODE) // turn on interrupts --- for debug only
|
||||||
|
// msr cpsr_c,#(USR_MODE) // turn on interrupts --- for debug only
|
||||||
|
// add r1,r1,#usr_stack_size
|
||||||
|
// mov sp,r1
|
||||||
|
|
||||||
_undefined_instruction: .word undefined_instruction
|
_undefined_instruction: .word undefined_instruction
|
||||||
_software_interrupt: .word software_interrupt
|
_software_interrupt: .word software_interrupt
|
||||||
|
@ -140,6 +165,7 @@ _irq: .word irq
|
||||||
_fiq: .word fiq
|
_fiq: .word fiq
|
||||||
.balignl 16,0xdeadbeef
|
.balignl 16,0xdeadbeef
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
*************************************************************************
|
*************************************************************************
|
||||||
*
|
*
|
||||||
|
@ -160,10 +186,6 @@ _TEXT_BASE:
|
||||||
_armboot_start:
|
_armboot_start:
|
||||||
.word _start
|
.word _start
|
||||||
|
|
||||||
_system_stack:
|
|
||||||
. = . + usr_stack_size + irq_stack_size + fiq_stack_size + und_stack_size + abt_stack_size + sup_stack_size
|
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* These are defined in the board-specific linker script.
|
* These are defined in the board-specific linker script.
|
||||||
*/
|
*/
|
||||||
|
@ -177,6 +199,22 @@ _bss_end:
|
||||||
|
|
||||||
_start_armboot: .word main
|
_start_armboot: .word main
|
||||||
|
|
||||||
|
_system_stack:
|
||||||
|
. = . + usr_stack_size + irq_stack_size + fiq_stack_size + und_stack_size + abt_stack_size + sup_stack_size
|
||||||
|
|
||||||
|
|
||||||
|
/*
|
||||||
|
*************************************************************************
|
||||||
|
*
|
||||||
|
* CPU_init_critical registers
|
||||||
|
*
|
||||||
|
*************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
cpu_init_crit:
|
||||||
|
# actually do nothing for now!
|
||||||
|
mov pc, lr
|
||||||
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* exception handlers
|
* exception handlers
|
||||||
|
@ -199,11 +237,8 @@ not_used:
|
||||||
|
|
||||||
.align 5
|
.align 5
|
||||||
//irq:
|
//irq:
|
||||||
// push {lr}
|
//
|
||||||
// movs lr,pc
|
// .align 5
|
||||||
// b isr
|
|
||||||
// pop {lr}
|
|
||||||
// subs pc,r14,#4 // suggested irq return cmd
|
|
||||||
fiq:
|
fiq:
|
||||||
|
|
||||||
.align 5
|
.align 5
|
||||||
|
|
|
@ -60,12 +60,6 @@ void main(void) {
|
||||||
|
|
||||||
enable_tmr_irq();
|
enable_tmr_irq();
|
||||||
|
|
||||||
/* go into user mode to handle IRQs */
|
|
||||||
/* disabling interrupts is now difficult */
|
|
||||||
asm(".code 32;"
|
|
||||||
"msr cpsr_c,#(0x10);"
|
|
||||||
".code 16; ");
|
|
||||||
|
|
||||||
while(1) {
|
while(1) {
|
||||||
/* sit here and let the interrupts do the work */
|
/* sit here and let the interrupts do the work */
|
||||||
};
|
};
|
||||||
|
|
Loading…
Reference in a new issue