Clock the GPT module only when we need it
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@ -155,11 +155,19 @@ clock_wait(clock_time_t i)
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void
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void
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clock_delay_usec(uint16_t len)
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clock_delay_usec(uint16_t len)
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{
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{
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uint32_t clock_status;
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH) !=
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if(ti_lib_prcm_power_domain_status(PRCM_DOMAIN_PERIPH) !=
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PRCM_DOMAIN_POWER_ON) {
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PRCM_DOMAIN_POWER_ON) {
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power_domain_on();
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power_domain_on();
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}
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}
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clock_status = HWREG(PRCM_BASE + PRCM_O_GPTCLKGR) & PRCM_GPIOCLKGR_CLK_EN;
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ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_TIMER0);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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ti_lib_timer_load_set(GPT0_BASE, TIMER_B, len);
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ti_lib_timer_load_set(GPT0_BASE, TIMER_B, len);
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ti_lib_timer_enable(GPT0_BASE, TIMER_B);
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ti_lib_timer_enable(GPT0_BASE, TIMER_B);
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@ -168,6 +176,12 @@ clock_delay_usec(uint16_t len)
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* function, hence the direct register access here
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* function, hence the direct register access here
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*/
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*/
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while(HWREG(GPT0_BASE + GPT_O_CTL) & GPT_CTL_TBEN);
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while(HWREG(GPT0_BASE + GPT_O_CTL) & GPT_CTL_TBEN);
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if(clock_status == 0) {
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ti_lib_prcm_peripheral_run_disable(PRCM_PERIPH_TIMER0);
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ti_lib_prcm_load_set();
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while(!ti_lib_prcm_load_get());
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}
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}
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}
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/*---------------------------------------------------------------------------*/
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/*---------------------------------------------------------------------------*/
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/**
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/**
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