use all submodules
This commit is contained in:
commit
9b6bdd30b8
4
.gitmodules
vendored
4
.gitmodules
vendored
|
@ -7,3 +7,7 @@
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||||||
[submodule "platform/osd-merkur/dev/LED_Strip_Suli"]
|
[submodule "platform/osd-merkur/dev/LED_Strip_Suli"]
|
||||||
path = platform/osd-merkur/dev/LED_Strip_Suli
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path = platform/osd-merkur/dev/LED_Strip_Suli
|
||||||
url = https://github.com/osdomotics/LED_Strip_Suli.git
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url = https://github.com/osdomotics/LED_Strip_Suli.git
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||||||
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[submodule "cpu/cc26xx/lib/cc26xxware"]
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path = cpu/cc26xx/lib/cc26xxware
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||||||
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url = https://github.com/g-oikonomou/cc26xxware.git
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|
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@ -49,13 +49,6 @@ before_script:
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arm-none-eabi-gcc --version ;
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arm-none-eabi-gcc --version ;
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fi
|
fi
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|
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||||||
## Download and extract cc26xxware
|
|
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- if [ ${BUILD_ARCH:-0} = arm-aapcs ] ; then
|
|
||||||
wget http://www.ti.com/lit/sw/swrc296/swrc296.zip &&
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|
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unzip swrc296.zip &&
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export TI_CC26XXWARE=cc26xxware_2_20_06_14829 ;
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|
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fi
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|
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|
|
||||||
## Install RL78 GCC toolchain
|
## Install RL78 GCC toolchain
|
||||||
- sudo apt-get install libncurses5:i386 zlib1g:i386
|
- sudo apt-get install libncurses5:i386 zlib1g:i386
|
||||||
- $WGET http://adamdunkels.github.io/contiki-fork/gnurl78-v13.02-elf_1-2_i386.deb &&
|
- $WGET http://adamdunkels.github.io/contiki-fork/gnurl78-v13.02-elf_1-2_i386.deb &&
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||||||
|
|
|
@ -1125,8 +1125,6 @@ cfs_read(int fd, void *buf, unsigned size)
|
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* ordinary file if the page has no log record.
|
* ordinary file if the page has no log record.
|
||||||
*/
|
*/
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||||||
for(bytes_left = size; bytes_left > 0; bytes_left -= r) {
|
for(bytes_left = size; bytes_left > 0; bytes_left -= r) {
|
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r = -1;
|
|
||||||
|
|
||||||
lp.offset = fdp->offset;
|
lp.offset = fdp->offset;
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||||||
lp.buf = buf;
|
lp.buf = buf;
|
||||||
lp.size = bytes_left;
|
lp.size = bytes_left;
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||||||
|
|
|
@ -37,12 +37,12 @@
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||||||
* Implementation of the clock module for the cc2538
|
* Implementation of the clock module for the cc2538
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*
|
*
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||||||
* To implement the clock functionality, we use the SysTick peripheral on the
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* To implement the clock functionality, we use the SysTick peripheral on the
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* cortex-M3. We run the system clock at 16 MHz and we set the SysTick to give
|
* cortex-M3. We run the system clock at a configurable speed and set the
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||||||
* us 128 interrupts / sec. However, the Sleep Timer counter value is used for
|
* SysTick to give us 128 interrupts / sec. However, the Sleep Timer counter
|
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* the number of elapsed ticks in order to avoid a significant time drift caused
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* value is used for the number of elapsed ticks in order to avoid a
|
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* by PM1/2. Contrary to the Sleep Timer, the SysTick peripheral is indeed
|
* significant time drift caused by PM1/2. Contrary to the Sleep Timer, the
|
||||||
* frozen during PM1/2, so adjusting upon wake-up a tick counter based on this
|
* SysTick peripheral is indeed frozen during PM1/2, so adjusting upon wake-up
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* peripheral would hardly be accurate.
|
* a tick counter based on this peripheral would hardly be accurate.
|
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* @{
|
* @{
|
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*
|
*
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* \file
|
* \file
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|
@ -62,7 +62,19 @@
|
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#include <stdint.h>
|
#include <stdint.h>
|
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/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
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#define RTIMER_CLOCK_TICK_RATIO (RTIMER_SECOND / CLOCK_SECOND)
|
#define RTIMER_CLOCK_TICK_RATIO (RTIMER_SECOND / CLOCK_SECOND)
|
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#define RELOAD_VALUE (125000 - 1) /** Fire 128 times / sec */
|
|
||||||
|
/* Prescaler for GPT0:Timer A used for clock_delay_usec(). */
|
||||||
|
#if SYS_CTRL_SYS_CLOCK < SYS_CTRL_1MHZ
|
||||||
|
#error System clock speeds below 1MHz are not supported
|
||||||
|
#endif
|
||||||
|
#define PRESCALER_VALUE (SYS_CTRL_SYS_CLOCK / SYS_CTRL_1MHZ - 1)
|
||||||
|
|
||||||
|
/* Reload value for SysTick counter */
|
||||||
|
#if SYS_CTRL_SYS_CLOCK % CLOCK_SECOND
|
||||||
|
/* Too low clock speeds will lead to reduced accurracy */
|
||||||
|
#error System clock speed too slow for CLOCK_SECOND, accuracy reduced
|
||||||
|
#endif
|
||||||
|
#define RELOAD_VALUE (SYS_CTRL_SYS_CLOCK / CLOCK_SECOND - 1)
|
||||||
|
|
||||||
static volatile uint64_t rt_ticks_startup = 0, rt_ticks_epoch = 0;
|
static volatile uint64_t rt_ticks_startup = 0, rt_ticks_epoch = 0;
|
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/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
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|
@ -74,8 +86,8 @@ static volatile uint64_t rt_ticks_startup = 0, rt_ticks_epoch = 0;
|
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*
|
*
|
||||||
* We also initialise GPT0:Timer A, which is used by clock_delay_usec().
|
* We also initialise GPT0:Timer A, which is used by clock_delay_usec().
|
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* We use 16-bit range (individual), count-down, one-shot, no interrupts.
|
* We use 16-bit range (individual), count-down, one-shot, no interrupts.
|
||||||
* The system clock is at 16MHz giving us 62.5 nano sec ticks for Timer A.
|
* The prescaler is computed according to the system clock in order to get 1
|
||||||
* Prescaled by 16 gives us a very convenient 1 tick per usec
|
* tick per usec.
|
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*/
|
*/
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void
|
void
|
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clock_init(void)
|
clock_init(void)
|
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|
@ -98,15 +110,14 @@ clock_init(void)
|
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/* Make sure GPT0 is off */
|
/* Make sure GPT0 is off */
|
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REG(GPT_0_BASE + GPTIMER_CTL) = 0;
|
REG(GPT_0_BASE + GPTIMER_CTL) = 0;
|
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|
|
||||||
|
|
||||||
/* 16-bit */
|
/* 16-bit */
|
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REG(GPT_0_BASE + GPTIMER_CFG) = 0x04;
|
REG(GPT_0_BASE + GPTIMER_CFG) = 0x04;
|
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|
|
||||||
/* One-Shot, Count Down, No Interrupts */
|
/* One-Shot, Count Down, No Interrupts */
|
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REG(GPT_0_BASE + GPTIMER_TAMR) = GPTIMER_TAMR_TAMR_ONE_SHOT;
|
REG(GPT_0_BASE + GPTIMER_TAMR) = GPTIMER_TAMR_TAMR_ONE_SHOT;
|
||||||
|
|
||||||
/* Prescale by 16 (thus, value 15 in TAPR) */
|
/* Prescale depending on system clock used */
|
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REG(GPT_0_BASE + GPTIMER_TAPR) = 0x0F;
|
REG(GPT_0_BASE + GPTIMER_TAPR) = PRESCALER_VALUE;
|
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}
|
}
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/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
CCIF clock_time_t
|
CCIF clock_time_t
|
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|
|
|
@ -43,15 +43,7 @@
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|
|
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#include <stdint.h>
|
#include <stdint.h>
|
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#include "clock.h"
|
#include "clock.h"
|
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/*---------------------------------------------------------------------------*/
|
#include "sys-ctrl.h"
|
||||||
/* Additional functions */
|
|
||||||
static uint32_t
|
|
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get_sys_clock(void)
|
|
||||||
{
|
|
||||||
/* Get the clock status diviser */
|
|
||||||
return SYS_CTRL_32MHZ /
|
|
||||||
(1 << (REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SYS_DIV));
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|
||||||
}
|
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
void
|
void
|
||||||
i2c_init(uint8_t port_sda, uint8_t pin_sda, uint8_t port_scl, uint8_t pin_scl,
|
i2c_init(uint8_t port_sda, uint8_t pin_sda, uint8_t port_scl, uint8_t pin_scl,
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||||||
|
@ -111,7 +103,7 @@ void
|
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i2c_set_frequency(uint32_t freq)
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i2c_set_frequency(uint32_t freq)
|
||||||
{
|
{
|
||||||
/* Peripheral clock setting, using the system clock */
|
/* Peripheral clock setting, using the system clock */
|
||||||
REG(I2CM_TPR) = ((get_sys_clock() + (2 * 10 * freq) - 1) /
|
REG(I2CM_TPR) = ((SYS_CTRL_SYS_CLOCK + (2 * 10 * freq) - 1) /
|
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(2 * 10 * freq)) - 1;
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(2 * 10 * freq)) - 1;
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}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
|
|
|
@ -226,8 +226,8 @@ spix_init(uint8_t spi)
|
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/* Start by disabling the peripheral before configuring it */
|
/* Start by disabling the peripheral before configuring it */
|
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REG(regs->base + SSI_CR1) = 0;
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REG(regs->base + SSI_CR1) = 0;
|
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|
|
||||||
/* Set the IO clock as the SSI clock */
|
/* Set the system clock as the SSI clock */
|
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REG(regs->base + SSI_CC) = 1;
|
REG(regs->base + SSI_CC) = 0;
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|
|
||||||
/* Set the mux correctly to connect the SSI pins to the correct GPIO pins */
|
/* Set the mux correctly to connect the SSI pins to the correct GPIO pins */
|
||||||
ioc_set_sel(regs->clk.port,
|
ioc_set_sel(regs->clk.port,
|
||||||
|
|
|
@ -70,17 +70,18 @@ sys_ctrl_init()
|
||||||
* 32KHz source: RC or crystal, according to SYS_CTRL_OSC32K_USE_XTAL
|
* 32KHz source: RC or crystal, according to SYS_CTRL_OSC32K_USE_XTAL
|
||||||
* System Clock: 32 MHz
|
* System Clock: 32 MHz
|
||||||
* Power Down Unused
|
* Power Down Unused
|
||||||
* I/O Div: 16MHz
|
* I/O Div: according to SYS_CTRL_IO_DIV
|
||||||
* Sys Div: 16MHz
|
* Sys Div: according to SYS_CTRL_SYS_DIV
|
||||||
* Rest: Don't care
|
* Rest: Don't care
|
||||||
*/
|
*/
|
||||||
|
|
||||||
val = SYS_CTRL_OSCS | SYS_CTRL_CLOCK_CTRL_OSC_PD
|
val = SYS_CTRL_OSCS | SYS_CTRL_CLOCK_CTRL_OSC_PD
|
||||||
| SYS_CTRL_CLOCK_CTRL_IO_DIV_16MHZ | SYS_CTRL_CLOCK_CTRL_SYS_DIV_16MHZ;
|
| SYS_CTRL_IO_DIV | SYS_CTRL_SYS_DIV;
|
||||||
REG(SYS_CTRL_CLOCK_CTRL) = val;
|
REG(SYS_CTRL_CLOCK_CTRL) = val;
|
||||||
|
|
||||||
while((REG(SYS_CTRL_CLOCK_STA) & (SYS_CTRL_CLOCK_STA_OSC32K |
|
while((REG(SYS_CTRL_CLOCK_STA)
|
||||||
SYS_CTRL_CLOCK_STA_OSC)) != SYS_CTRL_OSCS);
|
& (SYS_CTRL_CLOCK_STA_OSC32K | SYS_CTRL_CLOCK_STA_OSC))
|
||||||
|
!= SYS_CTRL_OSCS);
|
||||||
|
|
||||||
#if SYS_CTRL_OSC32K_USE_XTAL
|
#if SYS_CTRL_OSC32K_USE_XTAL
|
||||||
/* Wait for the 32-kHz crystal oscillator to stabilize */
|
/* Wait for the 32-kHz crystal oscillator to stabilize */
|
||||||
|
@ -94,7 +95,20 @@ sys_ctrl_reset()
|
||||||
{
|
{
|
||||||
REG(SYS_CTRL_PWRDBG) = SYS_CTRL_PWRDBG_FORCE_WARM_RESET;
|
REG(SYS_CTRL_PWRDBG) = SYS_CTRL_PWRDBG_FORCE_WARM_RESET;
|
||||||
}
|
}
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
uint32_t
|
||||||
|
sys_ctrl_get_sys_clock(void)
|
||||||
|
{
|
||||||
|
return SYS_CTRL_32MHZ >> (REG(SYS_CTRL_CLOCK_STA) &
|
||||||
|
SYS_CTRL_CLOCK_STA_SYS_DIV);
|
||||||
|
}
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
|
uint32_t
|
||||||
|
sys_ctrl_get_io_clock(void)
|
||||||
|
{
|
||||||
|
return SYS_CTRL_32MHZ >> ((REG(SYS_CTRL_CLOCK_STA) &
|
||||||
|
SYS_CTRL_CLOCK_STA_IO_DIV) >> 8);
|
||||||
|
}
|
||||||
/**
|
/**
|
||||||
* @}
|
* @}
|
||||||
* @}
|
* @}
|
||||||
|
|
|
@ -42,6 +42,8 @@
|
||||||
*/
|
*/
|
||||||
#ifndef SYS_CTRL_H_
|
#ifndef SYS_CTRL_H_
|
||||||
#define SYS_CTRL_H_
|
#define SYS_CTRL_H_
|
||||||
|
|
||||||
|
#include <stdint.h>
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/** \name SysCtrl Constants, used by the SYS_DIV and IO_DIV bits of the
|
/** \name SysCtrl Constants, used by the SYS_DIV and IO_DIV bits of the
|
||||||
* SYS_CTRL_CLOCK_CTRL register
|
* SYS_CTRL_CLOCK_CTRL register
|
||||||
|
@ -242,6 +244,33 @@
|
||||||
#endif
|
#endif
|
||||||
/** @} */
|
/** @} */
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
|
/** \name System clock divisor selection
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#ifdef SYS_CTRL_CONF_SYS_DIV
|
||||||
|
#if SYS_CTRL_CONF_SYS_DIV & ~SYS_CTRL_CLOCK_CTRL_SYS_DIV
|
||||||
|
#error Invalid system clock divisor
|
||||||
|
#endif
|
||||||
|
#define SYS_CTRL_SYS_DIV SYS_CTRL_CONF_SYS_DIV
|
||||||
|
#else
|
||||||
|
#define SYS_CTRL_SYS_DIV SYS_CTRL_CLOCK_CTRL_SYS_DIV_16MHZ
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#ifdef SYS_CTRL_CONF_IO_DIV
|
||||||
|
#if SYS_CTRL_CONF_IO_DIV & ~SYS_CTRL_CLOCK_CTRL_IO_DIV
|
||||||
|
#error Invalid I/O clock divisor
|
||||||
|
#endif
|
||||||
|
#define SYS_CTRL_IO_DIV SYS_CTRL_CONF_IO_DIV
|
||||||
|
#else
|
||||||
|
#define SYS_CTRL_IO_DIV SYS_CTRL_CLOCK_CTRL_IO_DIV_16MHZ
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/* Returns actual system clock in Hz */
|
||||||
|
#define SYS_CTRL_SYS_CLOCK (SYS_CTRL_32MHZ >> SYS_CTRL_SYS_DIV)
|
||||||
|
/* Returns actual I/O clock in Hz */
|
||||||
|
#define SYS_CTRL_IO_CLOCK (SYS_CTRL_32MHZ >> (SYS_CTRL_IO_DIV >> 8))
|
||||||
|
/** @} */
|
||||||
|
/*---------------------------------------------------------------------------*/
|
||||||
/** \name SysCtrl functions
|
/** \name SysCtrl functions
|
||||||
* @{
|
* @{
|
||||||
*/
|
*/
|
||||||
|
@ -253,6 +282,12 @@ void sys_ctrl_init();
|
||||||
/** \brief Generates a warm reset through the SYS_CTRL_PWRDBG register */
|
/** \brief Generates a warm reset through the SYS_CTRL_PWRDBG register */
|
||||||
void sys_ctrl_reset();
|
void sys_ctrl_reset();
|
||||||
|
|
||||||
|
/** \brief Returns the actual system clock in Hz */
|
||||||
|
uint32_t sys_ctrl_get_sys_clock();
|
||||||
|
|
||||||
|
/** \brief Returns the actual io clock in Hz */
|
||||||
|
uint32_t sys_ctrl_get_io_clock();
|
||||||
|
|
||||||
/** @} */
|
/** @} */
|
||||||
|
|
||||||
#endif /* SYS_CTRL_H_ */
|
#endif /* SYS_CTRL_H_ */
|
||||||
|
|
|
@ -136,7 +136,7 @@
|
||||||
* Baud rate defines used in uart_init() to set the values of UART_IBRD and
|
* Baud rate defines used in uart_init() to set the values of UART_IBRD and
|
||||||
* UART_FBRD in order to achieve the configured baud rates.
|
* UART_FBRD in order to achieve the configured baud rates.
|
||||||
*/
|
*/
|
||||||
#define UART_CLOCK_RATE 16000000 /* 16 MHz */
|
#define UART_CLOCK_RATE SYS_CTRL_SYS_CLOCK
|
||||||
#define UART_CTL_HSE_VALUE 0
|
#define UART_CTL_HSE_VALUE 0
|
||||||
#define UART_CTL_VALUE (UART_CTL_RXE | UART_CTL_TXE | (UART_CTL_HSE_VALUE << 5))
|
#define UART_CTL_VALUE (UART_CTL_RXE | UART_CTL_TXE | (UART_CTL_HSE_VALUE << 5))
|
||||||
|
|
||||||
|
|
|
@ -78,8 +78,8 @@ static unsigned long irq_energest = 0;
|
||||||
#if LPM_CONF_STATS
|
#if LPM_CONF_STATS
|
||||||
rtimer_clock_t lpm_stats[3];
|
rtimer_clock_t lpm_stats[3];
|
||||||
|
|
||||||
#define LPM_STATS_INIT() do { memset(lpm_stats, 0, sizeof(lpm_stats)); \
|
#define LPM_STATS_INIT() \
|
||||||
} while(0)
|
do { memset(lpm_stats, 0, sizeof(lpm_stats)); } while(0)
|
||||||
#define LPM_STATS_ADD(pm, val) do { lpm_stats[pm] += val; } while(0)
|
#define LPM_STATS_ADD(pm, val) do { lpm_stats[pm] += val; } while(0)
|
||||||
#else
|
#else
|
||||||
#define LPM_STATS_INIT()
|
#define LPM_STATS_INIT()
|
||||||
|
@ -163,8 +163,15 @@ select_32_mhz_xosc(void)
|
||||||
/* Wait for the switch to take place */
|
/* Wait for the switch to take place */
|
||||||
while((REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_OSC) != 0);
|
while((REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_OSC) != 0);
|
||||||
|
|
||||||
/* Power down the unused oscillator. */
|
/* Power down the unused oscillator and restore divisors (silicon errata) */
|
||||||
REG(SYS_CTRL_CLOCK_CTRL) |= SYS_CTRL_CLOCK_CTRL_OSC_PD;
|
REG(SYS_CTRL_CLOCK_CTRL) = (REG(SYS_CTRL_CLOCK_CTRL)
|
||||||
|
#if SYS_CTRL_SYS_DIV == SYS_CTRL_CLOCK_CTRL_SYS_DIV_32MHZ
|
||||||
|
& ~SYS_CTRL_CLOCK_CTRL_SYS_DIV
|
||||||
|
#endif
|
||||||
|
#if SYS_CTRL_IO_DIV == SYS_CTRL_CLOCK_CTRL_IO_DIV_32MHZ
|
||||||
|
& ~SYS_CTRL_CLOCK_CTRL_IO_DIV
|
||||||
|
#endif
|
||||||
|
) | SYS_CTRL_CLOCK_CTRL_OSC_PD;
|
||||||
}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
static void
|
static void
|
||||||
|
@ -172,9 +179,19 @@ select_16_mhz_rcosc(void)
|
||||||
{
|
{
|
||||||
/*
|
/*
|
||||||
* Power up both oscillators in order to speed up the transition to the 32-MHz
|
* Power up both oscillators in order to speed up the transition to the 32-MHz
|
||||||
* XOSC after wake up.
|
* XOSC after wake up. In addition, consider CC2538 silicon errata:
|
||||||
|
* "Possible Incorrect Value of Clock Dividers after PM2 and PM3" and
|
||||||
|
* set system clock divisor / I/O clock divisor to 16 MHz in case they run
|
||||||
|
* at full speed (=32 MHz)
|
||||||
*/
|
*/
|
||||||
REG(SYS_CTRL_CLOCK_CTRL) &= ~SYS_CTRL_CLOCK_CTRL_OSC_PD;
|
REG(SYS_CTRL_CLOCK_CTRL) = (REG(SYS_CTRL_CLOCK_CTRL)
|
||||||
|
#if SYS_CTRL_SYS_DIV == SYS_CTRL_CLOCK_CTRL_SYS_DIV_32MHZ
|
||||||
|
| SYS_CTRL_CLOCK_CTRL_SYS_DIV_16MHZ
|
||||||
|
#endif
|
||||||
|
#if SYS_CTRL_IO_DIV == SYS_CTRL_CLOCK_CTRL_IO_DIV_32MHZ
|
||||||
|
| SYS_CTRL_CLOCK_CTRL_IO_DIV_16MHZ
|
||||||
|
#endif
|
||||||
|
) & ~SYS_CTRL_CLOCK_CTRL_OSC_PD;
|
||||||
|
|
||||||
/*First, make sure there is no ongoing clock source change */
|
/*First, make sure there is no ongoing clock source change */
|
||||||
while((REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SOURCE_CHANGE) != 0);
|
while((REG(SYS_CTRL_CLOCK_STA) & SYS_CTRL_CLOCK_STA_SOURCE_CHANGE) != 0);
|
||||||
|
|
|
@ -8,33 +8,24 @@ NM = arm-none-eabi-nm
|
||||||
SIZE = arm-none-eabi-size
|
SIZE = arm-none-eabi-size
|
||||||
SREC_CAT = srec_cat
|
SREC_CAT = srec_cat
|
||||||
|
|
||||||
### TI CC26xxware out-of-tree
|
CPU_ABS_PATH = cpu/cc26xx
|
||||||
### TI_CC26XXWARE is the home directory of the cc26xxware
|
TI_CC26XXWARE_PATH = lib/cc26xxware
|
||||||
### It MUST be provided as a path relative to $(CONTIKI)
|
TI_CC26XXWARE = $(CONTIKI_CPU)/$(TI_CC26XXWARE_PATH)
|
||||||
### For example, if
|
|
||||||
### CONTIKI = /home/user/contiki
|
|
||||||
### and TI_CC26XXWARE is stored in
|
|
||||||
### /home/user/cc26xxware
|
|
||||||
### then set
|
|
||||||
### TI_CC26XXWARE = ../cc26xxware
|
|
||||||
ifndef TI_CC26XXWARE
|
|
||||||
$(error TI_CC26XXWARE not defined. Please see the README)
|
|
||||||
endif
|
|
||||||
|
|
||||||
### cc26xxware sources will be added to the MODULES list
|
### cc26xxware sources under driverlib will be added to the MODULES list
|
||||||
TI_CC26XXWARE_SRC = $(TI_CC26XXWARE)/driverlib
|
TI_CC26XXWARE_SRC = $(CPU_ABS_PATH)/$(TI_CC26XXWARE_PATH)/driverlib
|
||||||
|
|
||||||
### The directory with startup sources will be added to the CONTIKI_CPU_DIRS
|
### The directory with startup sources will be added to the CONTIKI_CPU_DIRS
|
||||||
### and the sources therein are added to the sources list explicitly. They are
|
### and the sources therein are added to the sources list explicitly. They are
|
||||||
### also listed explicitly in the linker command (through TARGET_STARTFILES),
|
### also listed explicitly in the linker command (through TARGET_STARTFILES),
|
||||||
### to make sure they always get linked in the image
|
### to make sure they always get linked in the image
|
||||||
TI_CC26XXWARE_STARTUP = ../../$(TI_CC26XXWARE)/startup_files
|
TI_CC26XXWARE_STARTUP_DIR = $(TI_CC26XXWARE_PATH)/startup_files
|
||||||
TI_CC26XXWARE_STARTUP_SRCS = ccfg.c startup_gcc.c
|
TI_CC26XXWARE_STARTUP_SRCS = ccfg.c startup_gcc.c
|
||||||
|
|
||||||
### MODULES will add some of these to the include pach, but we need to add
|
### MODULES will add some of these to the include path, but we need to add
|
||||||
### them earlier to prevent filename clashes with Contiki core files
|
### them earlier to prevent filename clashes with Contiki core files
|
||||||
CFLAGS += -I$(CONTIKI)/$(TI_CC26XXWARE) -I$(CONTIKI)/$(TI_CC26XXWARE_SRC)
|
CFLAGS += -I$(TI_CC26XXWARE) -I$(CONTIKI)/$(TI_CC26XXWARE_SRC)
|
||||||
CFLAGS += -I$(CONTIKI)/$(TI_CC26XXWARE)/inc
|
CFLAGS += -I$(TI_CC26XXWARE)/inc
|
||||||
MODULES += $(TI_CC26XXWARE_SRC)
|
MODULES += $(TI_CC26XXWARE_SRC)
|
||||||
|
|
||||||
LDSCRIPT = $(CONTIKI_CPU)/cc26xx.ld
|
LDSCRIPT = $(CONTIKI_CPU)/cc26xx.ld
|
||||||
|
@ -71,7 +62,7 @@ endif
|
||||||
CLEAN += symbols.c symbols.h *.d *.elf *.hex
|
CLEAN += symbols.c symbols.h *.d *.elf *.hex
|
||||||
|
|
||||||
### CPU-dependent directories
|
### CPU-dependent directories
|
||||||
CONTIKI_CPU_DIRS = . dev dev/rfc-api $(TI_CC26XXWARE_STARTUP)
|
CONTIKI_CPU_DIRS = . dev dev/rfc-api $(TI_CC26XXWARE_STARTUP_DIR)
|
||||||
|
|
||||||
### Use the existing debug I/O in cpu/arm/common
|
### Use the existing debug I/O in cpu/arm/common
|
||||||
CONTIKI_CPU_DIRS += ../arm/common/dbg-io
|
CONTIKI_CPU_DIRS += ../arm/common/dbg-io
|
||||||
|
|
|
@ -35,14 +35,14 @@ ENTRY(ResetISR)
|
||||||
|
|
||||||
MEMORY
|
MEMORY
|
||||||
{
|
{
|
||||||
/* Flash Size 128 KB minus the CCA area below (76 bytes) */
|
/* Flash Size 128 KB minus the CCA area below (88 bytes) */
|
||||||
FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x0001FFAC
|
FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x0001FFA8
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Customer Configuration Area and Bootloader Backdoor configuration
|
* Customer Configuration Area and Bootloader Backdoor configuration
|
||||||
* in flash, up to 80 bytes
|
* in flash, up to 88 bytes
|
||||||
*/
|
*/
|
||||||
FLASH_CCFG (RX) : ORIGIN = 0x0001FFAC, LENGTH = 84
|
FLASH_CCFG (RX) : ORIGIN = 0x0001FFA8, LENGTH = 88
|
||||||
|
|
||||||
/* RAM Size 20KB (PG2.1) */
|
/* RAM Size 20KB (PG2.1) */
|
||||||
SRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00005000
|
SRAM (RWX) : ORIGIN = 0x20000000, LENGTH = 0x00005000
|
||||||
|
|
|
@ -61,28 +61,25 @@ static int enabled = SENSOR_STATUS_DISABLED;
|
||||||
* \brief Returns a reading from the sensor
|
* \brief Returns a reading from the sensor
|
||||||
* \param type BATMON_SENSOR_TYPE_TEMP or BATMON_SENSOR_TYPE_VOLT
|
* \param type BATMON_SENSOR_TYPE_TEMP or BATMON_SENSOR_TYPE_VOLT
|
||||||
*
|
*
|
||||||
* \return The raw sensor reading, not converted to human-readable form
|
* \return The value as returned by the respective CC26xxware function
|
||||||
*/
|
*/
|
||||||
static int
|
static int
|
||||||
value(int type)
|
value(int type)
|
||||||
{
|
{
|
||||||
uint32_t tmp_value;
|
|
||||||
|
|
||||||
if(enabled == SENSOR_STATUS_DISABLED) {
|
if(enabled == SENSOR_STATUS_DISABLED) {
|
||||||
PRINTF("Sensor Disabled\n");
|
PRINTF("Sensor Disabled\n");
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
if(type == BATMON_SENSOR_TYPE_TEMP) {
|
if(type == BATMON_SENSOR_TYPE_TEMP) {
|
||||||
tmp_value = ti_lib_aon_batmon_temperature_get();
|
return (int)ti_lib_aon_batmon_temperature_get_deg_c();
|
||||||
} else if(type == BATMON_SENSOR_TYPE_VOLT) {
|
} else if(type == BATMON_SENSOR_TYPE_VOLT) {
|
||||||
tmp_value = ti_lib_aon_batmon_battery_voltage_get();
|
return (int)ti_lib_aon_batmon_battery_voltage_get();
|
||||||
} else {
|
} else {
|
||||||
PRINTF("Invalid type\n");
|
PRINTF("Invalid type\n");
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
return (int)tmp_value;
|
return 0;
|
||||||
}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/**
|
/**
|
||||||
|
@ -101,7 +98,6 @@ configure(int type, int enable)
|
||||||
switch(type) {
|
switch(type) {
|
||||||
case SENSORS_HW_INIT:
|
case SENSORS_HW_INIT:
|
||||||
ti_lib_aon_batmon_enable();
|
ti_lib_aon_batmon_enable();
|
||||||
ti_lib_aon_batmon_measurement_cycle_set(AON_BATMON_CYCLE_32);
|
|
||||||
enabled = SENSOR_STATUS_ENABLED;
|
enabled = SENSOR_STATUS_ENABLED;
|
||||||
break;
|
break;
|
||||||
case SENSORS_ACTIVE:
|
case SENSORS_ACTIVE:
|
||||||
|
|
|
@ -154,10 +154,7 @@ configure(void)
|
||||||
BOARD_IOID_UART_CTS, BOARD_IOID_UART_RTS);
|
BOARD_IOID_UART_CTS, BOARD_IOID_UART_RTS);
|
||||||
|
|
||||||
/* Configure the UART for 115,200, 8-N-1 operation. */
|
/* Configure the UART for 115,200, 8-N-1 operation. */
|
||||||
ti_lib_uart_config_set_exp_clk(UART0_BASE,
|
ti_lib_uart_config_set_exp_clk(UART0_BASE, ti_lib_sys_ctrl_clock_get(),
|
||||||
ti_lib_sys_ctrl_peripheral_clock_get(
|
|
||||||
PRCM_PERIPH_UART0,
|
|
||||||
SYSCTRL_SYSBUS_ON),
|
|
||||||
CC26XX_UART_CONF_BAUD_RATE,
|
CC26XX_UART_CONF_BAUD_RATE,
|
||||||
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
|
(UART_CONFIG_WLEN_8 | UART_CONFIG_STOP_ONE |
|
||||||
UART_CONFIG_PAR_NONE));
|
UART_CONFIG_PAR_NONE));
|
||||||
|
|
1
cpu/cc26xx/lib/cc26xxware
Submodule
1
cpu/cc26xx/lib/cc26xxware
Submodule
|
@ -0,0 +1 @@
|
||||||
|
Subproject commit 420ae3682c11619c1340697632b2dc49f7e53037
|
|
@ -141,11 +141,9 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
|
||||||
ti_lib_aon_wuc_mcu_power_down_config(AONWUC_NO_CLOCK);
|
ti_lib_aon_wuc_mcu_power_down_config(AONWUC_NO_CLOCK);
|
||||||
ti_lib_aon_wuc_aux_power_down_config(AONWUC_NO_CLOCK);
|
ti_lib_aon_wuc_aux_power_down_config(AONWUC_NO_CLOCK);
|
||||||
|
|
||||||
/* Disable retentions: SRAM, CPU, AUX, RFCORE - possibly not required */
|
/* Disable SRAM and AUX retentions */
|
||||||
ti_lib_aon_wuc_mcu_sram_config(0);
|
ti_lib_aon_wuc_mcu_sram_config(0);
|
||||||
ti_lib_prcm_retention_disable(PRCM_DOMAIN_CPU);
|
|
||||||
ti_lib_aon_wuc_aux_sram_config(false);
|
ti_lib_aon_wuc_aux_sram_config(false);
|
||||||
ti_lib_prcm_retention_disable(PRCM_DOMAIN_RFCORE);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Request CPU, SYSBYS and VIMS PD off.
|
* Request CPU, SYSBYS and VIMS PD off.
|
||||||
|
@ -160,7 +158,7 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
|
||||||
/* Turn off AUX */
|
/* Turn off AUX */
|
||||||
ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
|
ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
|
||||||
ti_lib_aon_wuc_domain_power_down_enable();
|
ti_lib_aon_wuc_domain_power_down_enable();
|
||||||
while(ti_lib_aon_wuc_power_status() & AONWUC_AUX_POWER_ON);
|
while(ti_lib_aon_wuc_power_status_get() & AONWUC_AUX_POWER_ON);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Request MCU VD power off.
|
* Request MCU VD power off.
|
||||||
|
@ -176,7 +174,7 @@ lpm_shutdown(uint32_t wakeup_pin, uint32_t io_pull, uint32_t wake_on)
|
||||||
ti_lib_pwr_ctrl_io_freeze_enable();
|
ti_lib_pwr_ctrl_io_freeze_enable();
|
||||||
|
|
||||||
/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
|
/* Turn off VIMS cache, CRAM and TRAM - possibly not required */
|
||||||
ti_lib_prcm_retention_disable(PRCM_DOMAIN_VIMS);
|
ti_lib_prcm_cache_retention_disable();
|
||||||
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
|
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
|
||||||
|
|
||||||
/* Enable shutdown and sync AON */
|
/* Enable shutdown and sync AON */
|
||||||
|
@ -216,7 +214,7 @@ wake_up(void)
|
||||||
|
|
||||||
/* Turn on cache again */
|
/* Turn on cache again */
|
||||||
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_ENABLED);
|
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_ENABLED);
|
||||||
ti_lib_prcm_retention_enable(PRCM_DOMAIN_VIMS);
|
ti_lib_prcm_cache_retention_enable();
|
||||||
|
|
||||||
ti_lib_aon_ioc_freeze_disable();
|
ti_lib_aon_ioc_freeze_disable();
|
||||||
ti_lib_sys_ctrl_aon_sync();
|
ti_lib_sys_ctrl_aon_sync();
|
||||||
|
@ -340,15 +338,9 @@ lpm_drop()
|
||||||
ti_lib_aon_wuc_mcu_sram_config(MCU_RAM0_RETENTION | MCU_RAM1_RETENTION |
|
ti_lib_aon_wuc_mcu_sram_config(MCU_RAM0_RETENTION | MCU_RAM1_RETENTION |
|
||||||
MCU_RAM2_RETENTION | MCU_RAM3_RETENTION);
|
MCU_RAM2_RETENTION | MCU_RAM3_RETENTION);
|
||||||
|
|
||||||
/* Enable retention on the CPU domain */
|
|
||||||
ti_lib_prcm_retention_enable(PRCM_DOMAIN_CPU);
|
|
||||||
|
|
||||||
/* Disable retention of AUX RAM */
|
/* Disable retention of AUX RAM */
|
||||||
ti_lib_aon_wuc_aux_sram_config(false);
|
ti_lib_aon_wuc_aux_sram_config(false);
|
||||||
|
|
||||||
/* Disable retention in the RFCORE RAM */
|
|
||||||
ti_lib_prcm_retention_disable(PRCM_DOMAIN_RFCORE);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Always turn off RFCORE, CPU, SYSBUS and VIMS. RFCORE should be off
|
* Always turn off RFCORE, CPU, SYSBUS and VIMS. RFCORE should be off
|
||||||
* already
|
* already
|
||||||
|
@ -362,7 +354,7 @@ lpm_drop()
|
||||||
/* Turn off AUX */
|
/* Turn off AUX */
|
||||||
ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
|
ti_lib_aux_wuc_power_ctrl(AUX_WUC_POWER_OFF);
|
||||||
ti_lib_aon_wuc_domain_power_down_enable();
|
ti_lib_aon_wuc_domain_power_down_enable();
|
||||||
while(ti_lib_aon_wuc_power_status() & AONWUC_AUX_POWER_ON);
|
while(ti_lib_aon_wuc_power_status_get() & AONWUC_AUX_POWER_ON);
|
||||||
|
|
||||||
/* Configure the recharge controller */
|
/* Configure the recharge controller */
|
||||||
ti_lib_sys_ctrl_set_recharge_before_power_down(false);
|
ti_lib_sys_ctrl_set_recharge_before_power_down(false);
|
||||||
|
@ -389,7 +381,7 @@ lpm_drop()
|
||||||
* until right before deep sleep to be able to use the cache for as long
|
* until right before deep sleep to be able to use the cache for as long
|
||||||
* as possible.
|
* as possible.
|
||||||
*/
|
*/
|
||||||
ti_lib_prcm_retention_disable(PRCM_DOMAIN_VIMS);
|
ti_lib_prcm_cache_retention_disable();
|
||||||
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
|
ti_lib_vims_mode_set(VIMS_BASE, VIMS_MODE_OFF);
|
||||||
|
|
||||||
/* Deep Sleep */
|
/* Deep Sleep */
|
||||||
|
|
|
@ -57,12 +57,7 @@
|
||||||
|
|
||||||
#define ti_lib_aon_batmon_enable(...) AONBatMonEnable(__VA_ARGS__)
|
#define ti_lib_aon_batmon_enable(...) AONBatMonEnable(__VA_ARGS__)
|
||||||
#define ti_lib_aon_batmon_disable(...) AONBatMonDisable(__VA_ARGS__)
|
#define ti_lib_aon_batmon_disable(...) AONBatMonDisable(__VA_ARGS__)
|
||||||
#define ti_lib_aon_batmon_measurement_cycle_set(...) AONBatMonMeasurementCycleSet(__VA_ARGS__)
|
#define ti_lib_aon_batmon_temperature_get_deg_c(...) AONBatMonTemperatureGetDegC(__VA_ARGS__)
|
||||||
#define ti_lib_aon_batmon_measurement_cycle_get(...) AONBatMonMeasurementCycleGet(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_batmon_battery_trim_set(...) AONBatMonBatteryTrimSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_batmon_temperature_trim_set(...) AONBatMonTemperatureTrimSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_batmon_temperature_get(...) AONBatMonTemperatureGet(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_batmon_temp_get_deg(...) AON_BatmonTempGetDegC(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_batmon_battery_voltage_get(...) AONBatMonBatteryVoltageGet(__VA_ARGS__)
|
#define ti_lib_aon_batmon_battery_voltage_get(...) AONBatMonBatteryVoltageGet(__VA_ARGS__)
|
||||||
#define ti_lib_aon_batmon_new_battery_measure_ready(...) AONBatMonNewBatteryMeasureReady(__VA_ARGS__)
|
#define ti_lib_aon_batmon_new_battery_measure_ready(...) AONBatMonNewBatteryMeasureReady(__VA_ARGS__)
|
||||||
#define ti_lib_aon_batmon_new_temp_measure_ready(...) AONBatMonNewTempMeasureReady(__VA_ARGS__)
|
#define ti_lib_aon_batmon_new_temp_measure_ready(...) AONBatMonNewTempMeasureReady(__VA_ARGS__)
|
||||||
|
@ -123,21 +118,19 @@
|
||||||
#define ti_lib_aon_wuc_mcu_power_down_config(...) AONWUCMcuPowerDownConfig(__VA_ARGS__)
|
#define ti_lib_aon_wuc_mcu_power_down_config(...) AONWUCMcuPowerDownConfig(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_mcu_power_off_config(...) AONWUCMcuPowerOffConfig(__VA_ARGS__)
|
#define ti_lib_aon_wuc_mcu_power_off_config(...) AONWUCMcuPowerOffConfig(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_mcu_sram_config(...) AONWUCMcuSRamConfig(__VA_ARGS__)
|
#define ti_lib_aon_wuc_mcu_sram_config(...) AONWUCMcuSRamConfig(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_clock_config_set(...) AONWUCAuxClockConfigSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_wuc_aux_clock_config_get(...) AONWUCAuxClockConfigGet(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_clock_config_get(...) AONWUCAuxClockConfigGet(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_power_down_config(...) AONWUCAuxPowerDownConfig(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_power_down_config(...) AONWUCAuxPowerDownConfig(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_power_off_config(...) AONWUCAuxPowerOffConfig(__VA_ARGS__)
|
|
||||||
#define ti_lib_aon_wuc_aux_wake_up_config(...) AONWUCAuxWakeUpConfig(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_wake_up_config(...) AONWUCAuxWakeUpConfig(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_sram_config(...) AONWUCAuxSRamConfig(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_sram_config(...) AONWUCAuxSRamConfig(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_wakeup_event(...) AONWUCAuxWakeupEvent(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_wakeup_event(...) AONWUCAuxWakeupEvent(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_image_valid(...) AONWUCAuxImageValid(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_image_valid(...) AONWUCAuxImageValid(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_image_invalid(...) AONWUCAuxImageInvalid(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_image_invalid(...) AONWUCAuxImageInvalid(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_aux_reset(...) AONWUCAuxReset(__VA_ARGS__)
|
#define ti_lib_aon_wuc_aux_reset(...) AONWUCAuxReset(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_power_status(...) AONWUCPowerStatus(__VA_ARGS__)
|
#define ti_lib_aon_wuc_power_status_get(...) AONWUCPowerStatusGet(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_shut_down_enable(...) AONWUCShutDownEnable(__VA_ARGS__)
|
#define ti_lib_aon_wuc_shut_down_enable(...) AONWUCShutDownEnable(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_domain_power_down_enable(...) AONWUCDomainPowerDownEnable(__VA_ARGS__)
|
#define ti_lib_aon_wuc_domain_power_down_enable(...) AONWUCDomainPowerDownEnable(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_domain_power_down_disable(...) AONWUCDomainPowerDownDisable(__VA_ARGS__)
|
#define ti_lib_aon_wuc_domain_power_down_disable(...) AONWUCDomainPowerDownDisable(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_mcu_reset_status(...) AONWUCMcuResetStatus(__VA_ARGS__)
|
#define ti_lib_aon_wuc_mcu_reset_status_get(...) AONWUCMcuResetStatusGet(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_mcu_reset_clear(...) AONWUCMcuResetClear(__VA_ARGS__)
|
#define ti_lib_aon_wuc_mcu_reset_clear(...) AONWUCMcuResetClear(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_recharge_ctrl_config_set(...) AONWUCRechargeCtrlConfigSet(__VA_ARGS__)
|
#define ti_lib_aon_wuc_recharge_ctrl_config_set(...) AONWUCRechargeCtrlConfigSet(__VA_ARGS__)
|
||||||
#define ti_lib_aon_wuc_recharge_ctrl_config_get(...) AONWUCRechargeCtrlConfigGet(__VA_ARGS__)
|
#define ti_lib_aon_wuc_recharge_ctrl_config_get(...) AONWUCRechargeCtrlConfigGet(__VA_ARGS__)
|
||||||
|
@ -173,10 +166,6 @@
|
||||||
|
|
||||||
#define ti_lib_aux_adi_ddi_safe_write(...) AuxAdiDdiSafeWrite(__VA_ARGS__)
|
#define ti_lib_aux_adi_ddi_safe_write(...) AuxAdiDdiSafeWrite(__VA_ARGS__)
|
||||||
#define ti_lib_aux_adi_ddi_safe_read(...) AuxAdiDdiSafeRead(__VA_ARGS__)
|
#define ti_lib_aux_adi_ddi_safe_read(...) AuxAdiDdiSafeRead(__VA_ARGS__)
|
||||||
#define ti_lib_ddi_status_get(...) DDIStatusGet(__VA_ARGS__)
|
|
||||||
#define ti_lib_ddi_config_set(...) DDIConfigSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_ddi_sync(...) DDISync(__VA_ARGS__)
|
|
||||||
#define ti_lib_ddi_protect(...) DDIProtect(__VA_ARGS__)
|
|
||||||
#define ti_lib_ddi_32_reg_write(...) DDI32RegWrite(__VA_ARGS__)
|
#define ti_lib_ddi_32_reg_write(...) DDI32RegWrite(__VA_ARGS__)
|
||||||
#define ti_lib_ddi_32_reg_read(...) DDI32RegRead(__VA_ARGS__)
|
#define ti_lib_ddi_32_reg_read(...) DDI32RegRead(__VA_ARGS__)
|
||||||
#define ti_lib_ddi_32_bits_set(...) DDI32BitsSet(__VA_ARGS__)
|
#define ti_lib_ddi_32_bits_set(...) DDI32BitsSet(__VA_ARGS__)
|
||||||
|
@ -256,7 +245,6 @@
|
||||||
#define ti_lib_ioc_port_configure_set(...) IOCPortConfigureSet(__VA_ARGS__)
|
#define ti_lib_ioc_port_configure_set(...) IOCPortConfigureSet(__VA_ARGS__)
|
||||||
#define ti_lib_ioc_port_configure_get(...) IOCPortConfigureGet(__VA_ARGS__)
|
#define ti_lib_ioc_port_configure_get(...) IOCPortConfigureGet(__VA_ARGS__)
|
||||||
#define ti_lib_ioc_io_shutdown_set(...) IOCIOShutdownSet(__VA_ARGS__)
|
#define ti_lib_ioc_io_shutdown_set(...) IOCIOShutdownSet(__VA_ARGS__)
|
||||||
#define ti_lib_ioc_io_jtag_set(...) IOCIOJTagSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_ioc_io_mode_set(...) IOCIOModeSet(__VA_ARGS__)
|
#define ti_lib_ioc_io_mode_set(...) IOCIOModeSet(__VA_ARGS__)
|
||||||
#define ti_lib_ioc_io_port_pull_set(...) IOCIOPortPullSet(__VA_ARGS__)
|
#define ti_lib_ioc_io_port_pull_set(...) IOCIOPortPullSet(__VA_ARGS__)
|
||||||
#define ti_lib_ioc_io_hyst_set(...) IOCIOHystSet(__VA_ARGS__)
|
#define ti_lib_ioc_io_hyst_set(...) IOCIOHystSet(__VA_ARGS__)
|
||||||
|
@ -303,8 +291,6 @@
|
||||||
#define ti_lib_prcm_mcu_power_off(...) PRCMMcuPowerOff(__VA_ARGS__)
|
#define ti_lib_prcm_mcu_power_off(...) PRCMMcuPowerOff(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_mcu_power_off_cancel(...) PRCMMcuPowerOffCancel(__VA_ARGS__)
|
#define ti_lib_prcm_mcu_power_off_cancel(...) PRCMMcuPowerOffCancel(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_mcu_uldo_configure(...) PRCMMcuUldoConfigure(__VA_ARGS__)
|
#define ti_lib_prcm_mcu_uldo_configure(...) PRCMMcuUldoConfigure(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_clock_configure_set(...) PRCMClockConfigureSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_prcm_clock_configure_get(...) PRCMClockConfigureGet(__VA_ARGS__)
|
|
||||||
#define ti_lib_prcm_audio_clock_enable(...) PRCMAudioClockEnable(__VA_ARGS__)
|
#define ti_lib_prcm_audio_clock_enable(...) PRCMAudioClockEnable(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_audio_clock_disable(...) PRCMAudioClockDisable(__VA_ARGS__)
|
#define ti_lib_prcm_audio_clock_disable(...) PRCMAudioClockDisable(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_audio_clock_config_set(...) PRCMAudioClockConfigSet(__VA_ARGS__)
|
#define ti_lib_prcm_audio_clock_config_set(...) PRCMAudioClockConfigSet(__VA_ARGS__)
|
||||||
|
@ -326,8 +312,8 @@
|
||||||
#define ti_lib_prcm_wdt_reset_status(...) PRCMWdtResetStatus(__VA_ARGS__)
|
#define ti_lib_prcm_wdt_reset_status(...) PRCMWdtResetStatus(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_sleep(...) PRCMSleep(__VA_ARGS__)
|
#define ti_lib_prcm_sleep(...) PRCMSleep(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_deep_sleep(...) PRCMDeepSleep(__VA_ARGS__)
|
#define ti_lib_prcm_deep_sleep(...) PRCMDeepSleep(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_retention_enable(...) PRCMRetentionEnable(__VA_ARGS__)
|
#define ti_lib_prcm_cache_retention_enable(...) PRCMCacheRetentionEnable(__VA_ARGS__)
|
||||||
#define ti_lib_prcm_retention_disable(...) PRCMRetentionDisable(__VA_ARGS__)
|
#define ti_lib_prcm_cache_retention_disable(...) PRCMCacheRetentionDisable(__VA_ARGS__)
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/* sys_ctrl.h */
|
/* sys_ctrl.h */
|
||||||
#include "driverlib/pwr_ctrl.h"
|
#include "driverlib/pwr_ctrl.h"
|
||||||
|
@ -335,7 +321,6 @@
|
||||||
#define ti_lib_pwr_ctrl_state_set(...) PowerCtrlStateSet(__VA_ARGS__)
|
#define ti_lib_pwr_ctrl_state_set(...) PowerCtrlStateSet(__VA_ARGS__)
|
||||||
#define ti_lib_pwr_ctrl_source_set(...) PowerCtrlSourceSet(__VA_ARGS__)
|
#define ti_lib_pwr_ctrl_source_set(...) PowerCtrlSourceSet(__VA_ARGS__)
|
||||||
#define ti_lib_pwr_ctrl_source_get(...) PowerCtrlSourceGet(__VA_ARGS__)
|
#define ti_lib_pwr_ctrl_source_get(...) PowerCtrlSourceGet(__VA_ARGS__)
|
||||||
#define ti_lib_pwr_ctrl_io_config_set(...) PowerCtrlIoConfigSet(__VA_ARGS__)
|
|
||||||
#define ti_lib_pwr_ctrl_reset_source_get(...) PowerCtrlResetSourceGet(__VA_ARGS__)
|
#define ti_lib_pwr_ctrl_reset_source_get(...) PowerCtrlResetSourceGet(__VA_ARGS__)
|
||||||
#define ti_lib_pwr_ctrl_reset_source_clear(...) PowerCtrlResetSourceClear(__VA_ARGS__)
|
#define ti_lib_pwr_ctrl_reset_source_clear(...) PowerCtrlResetSourceClear(__VA_ARGS__)
|
||||||
#define ti_lib_pwr_ctrl_io_freeze_enable(...) PowerCtrlIOFreezeEnable(__VA_ARGS__)
|
#define ti_lib_pwr_ctrl_io_freeze_enable(...) PowerCtrlIOFreezeEnable(__VA_ARGS__)
|
||||||
|
@ -371,7 +356,6 @@
|
||||||
#define ti_lib_rom_aon_rtc_current_compare_value_get ROM_AONRTCCurrentCompareValueGet
|
#define ti_lib_rom_aon_rtc_current_compare_value_get ROM_AONRTCCurrentCompareValueGet
|
||||||
|
|
||||||
/* AON_WUC API */
|
/* AON_WUC API */
|
||||||
#define ti_lib_rom_aon_wuc_aux_clock_config_set ROM_AONWUCAuxClockConfigSet
|
|
||||||
#define ti_lib_rom_aon_wuc_aux_s_ram_config ROM_AONWUCAuxSRamConfig
|
#define ti_lib_rom_aon_wuc_aux_s_ram_config ROM_AONWUCAuxSRamConfig
|
||||||
#define ti_lib_rom_aon_wuc_aux_wakeup_event ROM_AONWUCAuxWakeupEvent
|
#define ti_lib_rom_aon_wuc_aux_wakeup_event ROM_AONWUCAuxWakeupEvent
|
||||||
#define ti_lib_rom_aon_wuc_aux_reset ROM_AONWUCAuxReset
|
#define ti_lib_rom_aon_wuc_aux_reset ROM_AONWUCAuxReset
|
||||||
|
@ -449,8 +433,6 @@
|
||||||
/* PRCM API */
|
/* PRCM API */
|
||||||
#define ti_lib_rom_prcm_inf_clock_configure_set ROM_PRCMInfClockConfigureSet
|
#define ti_lib_rom_prcm_inf_clock_configure_set ROM_PRCMInfClockConfigureSet
|
||||||
#define ti_lib_rom_prcm_inf_clock_configure_get ROM_PRCMInfClockConfigureGet
|
#define ti_lib_rom_prcm_inf_clock_configure_get ROM_PRCMInfClockConfigureGet
|
||||||
#define ti_lib_rom_prcm_clock_configure_set ROM_PRCMClockConfigureSet
|
|
||||||
#define ti_lib_rom_prcm_clock_configure_get ROM_PRCMClockConfigureGet
|
|
||||||
#define ti_lib_rom_prcm_audio_clock_config_set ROM_PRCMAudioClockConfigSet
|
#define ti_lib_rom_prcm_audio_clock_config_set ROM_PRCMAudioClockConfigSet
|
||||||
#define ti_lib_rom_prcm_power_domain_on ROM_PRCMPowerDomainOn
|
#define ti_lib_rom_prcm_power_domain_on ROM_PRCMPowerDomainOn
|
||||||
#define ti_lib_rom_prcm_power_domain_off ROM_PRCMPowerDomainOff
|
#define ti_lib_rom_prcm_power_domain_off ROM_PRCMPowerDomainOff
|
||||||
|
@ -462,8 +444,6 @@
|
||||||
#define ti_lib_rom_prcm_peripheral_deep_sleep_disable ROM_PRCMPeripheralDeepSleepDisable
|
#define ti_lib_rom_prcm_peripheral_deep_sleep_disable ROM_PRCMPeripheralDeepSleepDisable
|
||||||
#define ti_lib_rom_prcm_power_domain_status ROM_PRCMPowerDomainStatus
|
#define ti_lib_rom_prcm_power_domain_status ROM_PRCMPowerDomainStatus
|
||||||
#define ti_lib_rom_prcm_deep_sleep ROM_PRCMDeepSleep
|
#define ti_lib_rom_prcm_deep_sleep ROM_PRCMDeepSleep
|
||||||
#define ti_lib_rom_prcm_retention_enable ROM_PRCMRetentionEnable
|
|
||||||
#define ti_lib_rom_prcm_retention_disable ROM_PRCMRetentionDisable
|
|
||||||
|
|
||||||
/* SMPH API */
|
/* SMPH API */
|
||||||
#define ti_lib_rom_smph_acquire ROM_SMPHAcquire
|
#define ti_lib_rom_smph_acquire ROM_SMPHAcquire
|
||||||
|
@ -517,6 +497,29 @@
|
||||||
#define ti_lib_rom_vims_configure ROM_VIMSConfigure
|
#define ti_lib_rom_vims_configure ROM_VIMSConfigure
|
||||||
#define ti_lib_rom_vims_mode_set ROM_VIMSModeSet
|
#define ti_lib_rom_vims_mode_set ROM_VIMSModeSet
|
||||||
#define ti_lib_rom_vims_mode_get ROM_VIMSModeGet
|
#define ti_lib_rom_vims_mode_get ROM_VIMSModeGet
|
||||||
|
|
||||||
|
/* HAPI */
|
||||||
|
#define ti_lib_hapi_crc32(a, b, c) HapiCrc32(a, b, c)
|
||||||
|
#define ti_lib_hapi_get_chip_id() HapiGetChipId()
|
||||||
|
#define ti_lib_hapi_reset_device() HapiResetDevice()
|
||||||
|
#define ti_lib_hapi_fletcher32(a, b, c) HapiFletcher32(a, b, c)
|
||||||
|
#define ti_lib_hapi_min_value(a, b) HapiMinValue(a,b)
|
||||||
|
#define ti_lib_hapi_max_value(a, b) HapiMaxValue(a,b)
|
||||||
|
#define ti_lib_hapi_mean_value(a, b) HapiMeanValue(a,b)
|
||||||
|
#define ti_lib_hapi_stand_deviation_value(a, b) HapiStandDeviationValue(a,b)
|
||||||
|
#define ti_lib_hapi_reset_peripheral(a) HapiResetPeripheral(a)
|
||||||
|
#define ti_lib_hapi_reset_domain(a) HapiResetDomain(a)
|
||||||
|
#define ti_lib_hapi_hf_source_safe_switch() HapiHFSourceSafeSwitch()
|
||||||
|
#define ti_lib_hapi_select_comp_a_input(a) HapiSelectCompAInput(a)
|
||||||
|
#define ti_lib_hapi_select_comp_a_ref(a) HapiSelectCompARef(a)
|
||||||
|
#define ti_lib_hapi_select_adc_comp_b_input(a) HapiSelectADCCompBInput(a)
|
||||||
|
#define ti_lib_hapi_select_comp_b_ref(a) HapiSelectCompBRef(a)
|
||||||
|
#define ti_lib_hapi_get_flash_size() HapiGetFlashSize()
|
||||||
|
#define ti_lib_hapi_sector_erase(a) HapiSectorErase(a)
|
||||||
|
#define ti_lib_hapi_program_flash(a, b, c) HapiProgramFlash(a, b, c)
|
||||||
|
#define ti_lib_hapi_get_flash_size() HapiGetFlashSize()
|
||||||
|
#define ti_lib_hapi_sector_erase(a) HapiSectorErase(a)
|
||||||
|
#define ti_lib_hapi_program_flash(a, b, c) HapiProgramFlash(a, b, c)
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/* sys_ctrl.h */
|
/* sys_ctrl.h */
|
||||||
#include "driverlib/sys_ctrl.h"
|
#include "driverlib/sys_ctrl.h"
|
||||||
|
@ -526,13 +529,13 @@
|
||||||
#define ti_lib_sys_ctrl_standby(...) SysCtrlStandby(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_standby(...) SysCtrlStandby(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_shutdown(...) SysCtrlShutdown(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_shutdown(...) SysCtrlShutdown(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_clock_get(...) SysCtrlClockGet(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_clock_get(...) SysCtrlClockGet(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_peripheral_clock_get(...) SysCtrlPeripheralClockGet(__VA_ARGS__)
|
|
||||||
#define ti_lib_sys_ctrl_aon_sync(...) SysCtrlAonSync(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_aon_sync(...) SysCtrlAonSync(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_aon_update(...) SysCtrlAonUpdate(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_aon_update(...) SysCtrlAonUpdate(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_set_recharge_before_power_down(...) SysCtrlSetRechargeBeforePowerDown(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_set_recharge_before_power_down(...) SysCtrlSetRechargeBeforePowerDown(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down(...) SysCtrlAdjustRechargeAfterPowerDown(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_adjust_recharge_after_power_down(...) SysCtrlAdjustRechargeAfterPowerDown(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_dcdc_voltage_conditional_control(...) SysCtrl_DCDC_VoltageConditionalControl(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_dcdc_voltage_conditional_control(...) SysCtrl_DCDC_VoltageConditionalControl(__VA_ARGS__)
|
||||||
#define ti_lib_sys_ctrl_reset_source_get(...) SysCtrlResetSourceGet(__VA_ARGS__)
|
#define ti_lib_sys_ctrl_reset_source_get(...) SysCtrlResetSourceGet(__VA_ARGS__)
|
||||||
|
#define ti_lib_sys_ctrl_system_reset(...) SysCtrlSystemReset(__VA_ARGS__)
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/* ssi.h */
|
/* ssi.h */
|
||||||
#include "driverlib/ssi.h"
|
#include "driverlib/ssi.h"
|
||||||
|
@ -597,6 +600,10 @@
|
||||||
#define ti_lib_timer_int_status(...) TimerIntStatus(__VA_ARGS__)
|
#define ti_lib_timer_int_status(...) TimerIntStatus(__VA_ARGS__)
|
||||||
#define ti_lib_timer_int_clear(...) TimerIntClear(__VA_ARGS__)
|
#define ti_lib_timer_int_clear(...) TimerIntClear(__VA_ARGS__)
|
||||||
#define ti_lib_timer_synchronize(...) TimerSynchronize(__VA_ARGS__)
|
#define ti_lib_timer_synchronize(...) TimerSynchronize(__VA_ARGS__)
|
||||||
|
#define ti_lib_timer_ccp_combine_enable(...) TimerCcpCombineEnable(__VA_ARGS__)
|
||||||
|
#define ti_lib_timer_ccp_combine_disable(...) TimerCcpCombineDisable(__VA_ARGS__)
|
||||||
|
#define ti_lib_timer_match_update_mode(...) TimerMatchUpdateMode(__VA_ARGS__)
|
||||||
|
#define ti_lib_timer_interval_load_mode(...) TimerIntervalLoadMode(__VA_ARGS__)
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/* uart.h */
|
/* uart.h */
|
||||||
#include "driverlib/uart.h"
|
#include "driverlib/uart.h"
|
||||||
|
@ -629,8 +636,8 @@
|
||||||
#define ti_lib_uart_dma_disable(...) UARTDMADisable(__VA_ARGS__)
|
#define ti_lib_uart_dma_disable(...) UARTDMADisable(__VA_ARGS__)
|
||||||
#define ti_lib_uart_rx_error_get(...) UARTRxErrorGet(__VA_ARGS__)
|
#define ti_lib_uart_rx_error_get(...) UARTRxErrorGet(__VA_ARGS__)
|
||||||
#define ti_lib_uart_rx_error_clear(...) UARTRxErrorClear(__VA_ARGS__)
|
#define ti_lib_uart_rx_error_clear(...) UARTRxErrorClear(__VA_ARGS__)
|
||||||
#define ti_lib_uart_tx_int_mode_set(...) UARTTxIntModeSet(__VA_ARGS__)
|
#define ti_lib_uart_hw_flow_control_en(...) UARTHwFlowControlEnable(__VA_ARGS__)
|
||||||
#define ti_lib_uart_tx_int_mode_get(...) UARTTxIntModeGet(__VA_ARGS__)
|
#define ti_lib_uart_hw_flow_control_dis(...) UARTHwFlowControlDisable(__VA_ARGS__)
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/* vims.h */
|
/* vims.h */
|
||||||
#include "driverlib/vims.h"
|
#include "driverlib/vims.h"
|
||||||
|
|
|
@ -807,7 +807,7 @@ EXCLUDE_SYMLINKS = NO
|
||||||
# Note that the wildcards are matched against the file with absolute path, so to
|
# Note that the wildcards are matched against the file with absolute path, so to
|
||||||
# exclude all test directories for example use the pattern */test/*
|
# exclude all test directories for example use the pattern */test/*
|
||||||
|
|
||||||
EXCLUDE_PATTERNS =
|
EXCLUDE_PATTERNS = */cpu/cc26xx/lib/*
|
||||||
|
|
||||||
# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
|
# The EXCLUDE_SYMBOLS tag can be used to specify one or more symbol names
|
||||||
# (namespaces, classes, functions, etc.) that should be excluded from the
|
# (namespaces, classes, functions, etc.) that should be excluded from the
|
||||||
|
|
|
@ -329,8 +329,7 @@ get_sync_sensor_readings(void)
|
||||||
printf("-----------------------------------------\n");
|
printf("-----------------------------------------\n");
|
||||||
|
|
||||||
value = batmon_sensor.value(BATMON_SENSOR_TYPE_TEMP);
|
value = batmon_sensor.value(BATMON_SENSOR_TYPE_TEMP);
|
||||||
printf("Bat: Temp=%d.%02d C (%08x)\n", value >> 2,
|
printf("Bat: Temp=%d C\n", value);
|
||||||
(value & 0x00000003) * 25, value);
|
|
||||||
|
|
||||||
value = batmon_sensor.value(BATMON_SENSOR_TYPE_VOLT);
|
value = batmon_sensor.value(BATMON_SENSOR_TYPE_VOLT);
|
||||||
printf("Bat: Volt=%d mV\n", (value * 125) >> 5);
|
printf("Bat: Volt=%d mV\n", (value * 125) >> 5);
|
||||||
|
|
|
@ -392,8 +392,7 @@ get_batmon_reading(void *data)
|
||||||
|
|
||||||
buf = batmon_temp_reading.converted;
|
buf = batmon_temp_reading.converted;
|
||||||
memset(buf, 0, CC26XX_WEB_DEMO_CONVERTED_LEN);
|
memset(buf, 0, CC26XX_WEB_DEMO_CONVERTED_LEN);
|
||||||
snprintf(buf, CC26XX_WEB_DEMO_CONVERTED_LEN, "%d.%02d", value >> 2,
|
snprintf(buf, CC26XX_WEB_DEMO_CONVERTED_LEN, "%d", value);
|
||||||
(value & 0x00000003) * 25);
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
@ -59,7 +59,8 @@ Requirements
|
||||||
============
|
============
|
||||||
To use the port you need:
|
To use the port you need:
|
||||||
|
|
||||||
* TI's CC26xxware sources (more below)
|
* TI's CC26xxware sources. The correct version will be installed automatically
|
||||||
|
as a submodule when you clone Contiki.
|
||||||
* Software to program the nodes. Use TI's SmartRF Flash Programmer
|
* Software to program the nodes. Use TI's SmartRF Flash Programmer
|
||||||
* A toolchain to build firmware: The port has been developed and tested with
|
* A toolchain to build firmware: The port has been developed and tested with
|
||||||
GNU Tools for ARM Embedded Processors <https://launchpad.net/gcc-arm-embedded>.
|
GNU Tools for ARM Embedded Processors <https://launchpad.net/gcc-arm-embedded>.
|
||||||
|
@ -74,44 +75,13 @@ To use the port you need:
|
||||||
operating system and so that you can use the chip's UART for I/O. Please read
|
operating system and so that you can use the chip's UART for I/O. Please read
|
||||||
the section ["Drivers" in the CC2538DK readme](https://github.com/contiki-os/contiki/tree/master/platform/cc2538dk#drivers).
|
the section ["Drivers" in the CC2538DK readme](https://github.com/contiki-os/contiki/tree/master/platform/cc2538dk#drivers).
|
||||||
|
|
||||||
Environment
|
|
||||||
===========
|
|
||||||
To use this port, you will need to download and extract CC26xxware sources. We
|
|
||||||
currently use CC26xxware version 2.20.06.14829. The download link can be found
|
|
||||||
here: http://processors.wiki.ti.com/index.php/CC26xxware
|
|
||||||
|
|
||||||
Once you have done this, you will need to configure the Contiki build system so
|
|
||||||
that it can locate and compile them as part of the build process.
|
|
||||||
|
|
||||||
To do this, you will need to set the following environment variable:
|
|
||||||
|
|
||||||
* `TI_CC26XXWARE`
|
|
||||||
|
|
||||||
Stores the path to a directory containing the following:
|
|
||||||
|
|
||||||
* cc26xxware sources under `$(TI_CC26XXWARE)/driverlib`
|
|
||||||
* cc26xxware includes under `$(TI_CC26XXWARE)/inc`
|
|
||||||
* Startup files under `$(TI_CC26XXWARE)/startup_files`
|
|
||||||
|
|
||||||
This _must_ be a path relative to the Contiki source directory. For
|
|
||||||
example, if Contiki is in `/home/user/contiki-2.x` and the CC26xxware is in
|
|
||||||
`/home/user/cc26xxware`, then `TI_CC26XXWARE` must be set to `../cc26xxware`
|
|
||||||
|
|
||||||
The variable can be set within the example's Makefile, by adding this:
|
|
||||||
|
|
||||||
TI_CC26XXWARE=../cc26xxware
|
|
||||||
|
|
||||||
or you can use an environment variable, like so:
|
|
||||||
|
|
||||||
export TI_CC26XXWARE=../cc26xxware
|
|
||||||
|
|
||||||
Filename conflicts between Contiki and CC26xxware
|
Filename conflicts between Contiki and CC26xxware
|
||||||
=================================================
|
=================================================
|
||||||
There is a file called `timer.c` both in Contiki as well as in CC26xxware. The
|
There is a file called `timer.c` both in Contiki as well as in CC26xxware. The
|
||||||
way things are configured now, we don't use the latter. However, if you need to
|
way things are configured now, we don't use the latter. However, if you need to
|
||||||
start using it at some point, you will need to rename it:
|
start using it at some point, you will need to rename it:
|
||||||
|
|
||||||
From `$(TI_CC26XXWARE)/driverlib/cc26xx/source/timer.c` to `driverlib-timer.c`
|
From `cpu/cc26xx/lib/cc26xxware/driverlib/timer.c` to `driverlib-timer.c`
|
||||||
|
|
||||||
Sensortag vs Srf06
|
Sensortag vs Srf06
|
||||||
==================
|
==================
|
||||||
|
|
|
@ -62,7 +62,7 @@
|
||||||
#include "dev/serial-line.h"
|
#include "dev/serial-line.h"
|
||||||
#include "net/mac/frame802154.h"
|
#include "net/mac/frame802154.h"
|
||||||
|
|
||||||
#include "driverlib/driverlib_ver.h"
|
#include "driverlib/driverlib_release.h"
|
||||||
|
|
||||||
#include <stdio.h>
|
#include <stdio.h>
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
|
@ -174,8 +174,8 @@ main(void)
|
||||||
serial_line_init();
|
serial_line_init();
|
||||||
|
|
||||||
printf("Starting " CONTIKI_VERSION_STRING "\n");
|
printf("Starting " CONTIKI_VERSION_STRING "\n");
|
||||||
printf("With DriverLib v%u.%02u.%02u.%u\n", DRIVERLIB_MAJOR_VER,
|
printf("With DriverLib v%u.%u\n", DRIVERLIB_RELEASE_GROUP,
|
||||||
DRIVERLIB_MINOR_VER, DRIVERLIB_PATCH_VER, DRIVERLIB_BUILD_ID);
|
DRIVERLIB_RELEASE_BUILD);
|
||||||
printf(BOARD_STRING " using CC%u\n", CC26XX_MODEL_CPU_VARIANT);
|
printf(BOARD_STRING " using CC%u\n", CC26XX_MODEL_CPU_VARIANT);
|
||||||
|
|
||||||
process_start(&etimer_process, NULL);
|
process_start(&etimer_process, NULL);
|
||||||
|
|
|
@ -80,12 +80,10 @@ board_i2c_wakeup()
|
||||||
while(!ti_lib_prcm_load_get());
|
while(!ti_lib_prcm_load_get());
|
||||||
|
|
||||||
/* Reset the I2C controller */
|
/* Reset the I2C controller */
|
||||||
HWREG(PRCM_BASE + PRCM_O_RESETI2C) = PRCM_RESETI2C_I2C;
|
ti_lib_hapi_reset_peripheral(PRCM_PERIPH_I2C0);
|
||||||
|
|
||||||
/* Enable and initialize the I2C master module */
|
/* Enable and initialize the I2C master module */
|
||||||
ti_lib_i2c_master_init_exp_clk(I2C0_BASE,
|
ti_lib_i2c_master_init_exp_clk(I2C0_BASE, ti_lib_sys_ctrl_clock_get(),
|
||||||
ti_lib_sys_ctrl_peripheral_clock_get(
|
|
||||||
PRCM_PERIPH_I2C0, SYSCTRL_SYSBUS_ON),
|
|
||||||
true);
|
true);
|
||||||
}
|
}
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
|
@ -331,9 +329,7 @@ board_i2c_select(uint8_t new_interface, uint8_t address)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Enable and initialize the I2C master module */
|
/* Enable and initialize the I2C master module */
|
||||||
ti_lib_i2c_master_init_exp_clk(I2C0_BASE,
|
ti_lib_i2c_master_init_exp_clk(I2C0_BASE, ti_lib_sys_ctrl_clock_get(),
|
||||||
ti_lib_sys_ctrl_peripheral_clock_get(
|
|
||||||
PRCM_PERIPH_I2C0, SYSCTRL_SYSBUS_ON),
|
|
||||||
true);
|
true);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
|
@ -133,13 +133,6 @@ board_init()
|
||||||
|
|
||||||
power_domains_on();
|
power_domains_on();
|
||||||
|
|
||||||
/* Configure all clock domains to run at full speed */
|
|
||||||
ti_lib_prcm_clock_configure_set(PRCM_DOMAIN_SYSBUS, PRCM_CLOCK_DIV_1);
|
|
||||||
ti_lib_prcm_clock_configure_set(PRCM_DOMAIN_CPU, PRCM_CLOCK_DIV_1);
|
|
||||||
ti_lib_prcm_clock_configure_set(PRCM_DOMAIN_TIMER, PRCM_CLOCK_DIV_1);
|
|
||||||
ti_lib_prcm_clock_configure_set(PRCM_DOMAIN_SERIAL, PRCM_CLOCK_DIV_1);
|
|
||||||
ti_lib_prcm_clock_configure_set(PRCM_DOMAIN_PERIPH, PRCM_CLOCK_DIV_1);
|
|
||||||
|
|
||||||
/* Enable GPIO peripheral */
|
/* Enable GPIO peripheral */
|
||||||
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_GPIO);
|
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_GPIO);
|
||||||
|
|
||||||
|
|
|
@ -57,8 +57,7 @@
|
||||||
IOC_IOPULL_UP | IOC_SLEW_DISABLE | \
|
IOC_IOPULL_UP | IOC_SLEW_DISABLE | \
|
||||||
IOC_HYST_ENABLE | IOC_BOTH_EDGES | \
|
IOC_HYST_ENABLE | IOC_BOTH_EDGES | \
|
||||||
IOC_INT_ENABLE | IOC_IOMODE_NORMAL | \
|
IOC_INT_ENABLE | IOC_IOMODE_NORMAL | \
|
||||||
IOC_NO_WAKE_UP | IOC_INPUT_ENABLE | \
|
IOC_NO_WAKE_UP | IOC_INPUT_ENABLE)
|
||||||
IOC_JTAG_DISABLE)
|
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
#define DEBOUNCE_DURATION (CLOCK_SECOND >> 5)
|
#define DEBOUNCE_DURATION (CLOCK_SECOND >> 5)
|
||||||
|
|
||||||
|
|
|
@ -54,8 +54,7 @@ static struct timer debouncetimer;
|
||||||
IOC_IOPULL_DOWN | IOC_SLEW_DISABLE | \
|
IOC_IOPULL_DOWN | IOC_SLEW_DISABLE | \
|
||||||
IOC_HYST_DISABLE | IOC_BOTH_EDGES | \
|
IOC_HYST_DISABLE | IOC_BOTH_EDGES | \
|
||||||
IOC_INT_DISABLE | IOC_IOMODE_NORMAL | \
|
IOC_INT_DISABLE | IOC_IOMODE_NORMAL | \
|
||||||
IOC_NO_WAKE_UP | IOC_INPUT_ENABLE | \
|
IOC_NO_WAKE_UP | IOC_INPUT_ENABLE)
|
||||||
IOC_JTAG_DISABLE)
|
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
/**
|
/**
|
||||||
* \brief Handler for Sensortag-CC26XX reed interrupts
|
* \brief Handler for Sensortag-CC26XX reed interrupts
|
||||||
|
|
|
@ -88,11 +88,6 @@ board_init()
|
||||||
/* Turn on relevant PDs */
|
/* Turn on relevant PDs */
|
||||||
wakeup_handler();
|
wakeup_handler();
|
||||||
|
|
||||||
/* Configure all clock domains to run at full speed */
|
|
||||||
ti_lib_prcm_clock_configure_set(PRCM_DOMAIN_SYSBUS | PRCM_DOMAIN_CPU |
|
|
||||||
PRCM_DOMAIN_TIMER | PRCM_DOMAIN_SERIAL |
|
|
||||||
PRCM_DOMAIN_PERIPH, PRCM_CLOCK_DIV_1);
|
|
||||||
|
|
||||||
/* Enable GPIO peripheral */
|
/* Enable GPIO peripheral */
|
||||||
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_GPIO);
|
ti_lib_prcm_peripheral_run_enable(PRCM_PERIPH_GPIO);
|
||||||
|
|
||||||
|
|
|
@ -57,8 +57,7 @@
|
||||||
IOC_IOPULL_UP | IOC_SLEW_DISABLE | \
|
IOC_IOPULL_UP | IOC_SLEW_DISABLE | \
|
||||||
IOC_HYST_ENABLE | IOC_BOTH_EDGES | \
|
IOC_HYST_ENABLE | IOC_BOTH_EDGES | \
|
||||||
IOC_INT_ENABLE | IOC_IOMODE_NORMAL | \
|
IOC_INT_ENABLE | IOC_IOMODE_NORMAL | \
|
||||||
IOC_NO_WAKE_UP | IOC_INPUT_ENABLE | \
|
IOC_NO_WAKE_UP | IOC_INPUT_ENABLE)
|
||||||
IOC_JTAG_DISABLE)
|
|
||||||
/*---------------------------------------------------------------------------*/
|
/*---------------------------------------------------------------------------*/
|
||||||
#define DEBOUNCE_DURATION (CLOCK_SECOND >> 5)
|
#define DEBOUNCE_DURATION (CLOCK_SECOND >> 5)
|
||||||
|
|
||||||
|
|
Loading…
Reference in a new issue