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Updates CC2538 GPIO

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1. Fixes two of the comments to GPIO macros. They were copied but not
updated.
2. Adds SET and CLR macros for controlling GPIO pins.
This commit is contained in:
Brad Campbell 2013-09-05 15:09:31 -04:00
parent 810f770e49
commit 982ca0fb46
1 changed files with 18 additions and 4 deletions
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22
cpu/cc2538/dev/gpio.h
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@ -100,6 +100,20 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
#define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK) \ #define GPIO_SET_OUTPUT(PORT_BASE, PIN_MASK) \
do { REG(PORT_BASE | GPIO_DIR) |= PIN_MASK; } while(0) do { REG(PORT_BASE | GPIO_DIR) |= PIN_MASK; } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE high.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_SET_PIN(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE | GPIO_DATA) + (PIN_MASK << 2)) = 0xFF; } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE low.
* \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/
#define GPIO_CLR_PIN(PORT_BASE, PIN_MASK) \
do { REG((PORT_BASE | GPIO_DATA) + (PIN_MASK << 2)) = 0x00; } while(0)
/** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge. /** \brief Set pins with PIN_MASK of port with PORT_BASE to detect edge.
* \param PORT_BASE GPIO Port register offset * \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80 * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
@ -162,16 +176,16 @@ typedef void (* gpio_callback_t)(uint8_t port, uint8_t pin);
#define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \ #define GPIO_DISABLE_INTERRUPT(PORT_BASE, PIN_MASK) \
do { REG(PORT_BASE | GPIO_IE) &= ~PIN_MASK; } while(0) do { REG(PORT_BASE | GPIO_IE) &= ~PIN_MASK; } while(0)
/** \brief Enable interrupt triggering for pins with PIN_MASK of port with /** \brief Configure the pin to be under peripheral control with PIN_MASK of
* PORT_BASE. * port with PORT_BASE.
* \param PORT_BASE GPIO Port register offset * \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80 * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/ */
#define GPIO_PERIPHERAL_CONTROL(PORT_BASE, PIN_MASK) \ #define GPIO_PERIPHERAL_CONTROL(PORT_BASE, PIN_MASK) \
do { REG(PORT_BASE | GPIO_AFSEL) |= PIN_MASK; } while(0) do { REG(PORT_BASE | GPIO_AFSEL) |= PIN_MASK; } while(0)
/** \brief Disable interrupt triggering for pins with PIN_MASK of port with /** \brief Configure the pin to be software controlled with PIN_MASK of port
* PORT_BASE. * with PORT_BASE.
* \param PORT_BASE GPIO Port register offset * \param PORT_BASE GPIO Port register offset
* \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80 * \param PIN_MASK Pin number mask. Pin 0: 0x01, Pin 1: 0x02 ... Pin 7: 0x80
*/ */