x86: Add Galileo pinmux support
This patch adds the galileo-pinmux.c and galileo-pinmux.h files, which support access to pinmux configuration through a function interface. This is not 100% supported yet due to some pinmux paths need Quark X1000 GPIO (legacy and non-legacy) configurations. After we finish to implement Quark X1000 GPIO driver we'll add support for this.
This commit is contained in:
Ricardo de Almeida Gonzaga
Jesus Sanchez-Palencia
parent
781375f1d1
commit
93c7988069
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@ -5,7 +5,7 @@ LIBGCC_PATH = /usr/lib/gcc/$(shell gcc -dumpmachine)/$(shell gcc -dumpversion)
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CONTIKI_TARGET_DIRS = . core/sys/ drivers/
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CONTIKI_TARGET_MAIN = ${addprefix $(OBJECTDIR)/,contiki-main.o}
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CONTIKI_SOURCEFILES += contiki-main.c clock.c rtimer-arch.c gpio-pcal9535a.c pwm-pca9685.c
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CONTIKI_SOURCEFILES += contiki-main.c clock.c rtimer-arch.c gpio-pcal9535a.c pwm-pca9685.c galileo-pinmux.c
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PROJECT_SOURCEFILES += newlib-syscalls.c
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605
platform/galileo/drivers/galileo-pinmux.c
Normal file
605
platform/galileo/drivers/galileo-pinmux.c
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@ -0,0 +1,605 @@
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/*
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* Copyright (C) 2015, Intel Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* 3. Neither the name of the copyright holder nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "galileo-pinmux.h"
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#include "gpio.h"
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#include "gpio-pcal9535a.h"
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#include "i2c.h"
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#include "pwm-pca9685.h"
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#define GPIO_PCAL9535A_0_I2C_ADDR 0x25
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#define GPIO_PCAL9535A_1_I2C_ADDR 0x26
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#define GPIO_PCAL9535A_2_I2C_ADDR 0x27
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#define PWM_PCA9685_0_I2C_ADDR 0x47
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#define PINMUX_NUM_FUNCS 4
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#define PINMUX_NUM_PATHS 4
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#define PINMUX_NUM_PINS 20
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typedef enum {
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NONE,
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EXP0,
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EXP1,
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EXP2,
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PWM0
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} MUX_CHIP;
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typedef enum {
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PIN_LOW = 0x00,
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PIN_HIGH = 0x01,
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DISABLED = 0xFF
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} PIN_LEVEL;
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struct pin_config {
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uint8_t pin_num;
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GALILEO_PINMUX_FUNC func;
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};
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static struct pin_config default_pinmux_config[PINMUX_NUM_PINS] = {
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{ 0, GALILEO_PINMUX_FUNC_C }, /* UART0_RXD */
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{ 1, GALILEO_PINMUX_FUNC_C }, /* UART0_TXD */
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{ 2, GALILEO_PINMUX_FUNC_A }, /* GPIO5(out) */
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{ 3, GALILEO_PINMUX_FUNC_B }, /* GPIO6(in) */
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{ 4, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS4 (in) */
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{ 5, GALILEO_PINMUX_FUNC_B }, /* GPIO8 (in) */
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{ 6, GALILEO_PINMUX_FUNC_B }, /* GPIO9 (in) */
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{ 7, GALILEO_PINMUX_FUNC_B }, /* EXP1.P0_6 (in) */
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{ 8, GALILEO_PINMUX_FUNC_B }, /* EXP1.P1_0 (in) */
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{ 9, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS2 (in) */
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{ 10, GALILEO_PINMUX_FUNC_A }, /* GPIO2 (out) */
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{ 11, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS3 (in) */
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{ 12, GALILEO_PINMUX_FUNC_B }, /* GPIO7 (in) */
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{ 13, GALILEO_PINMUX_FUNC_B }, /* GPIO_SUS5(in) */
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{ 14, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_0 (in)/ADC.IN0 */
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{ 15, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_2 (in)/ADC.IN1 */
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{ 16, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_4 (in)/ADC.IN2 */
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{ 17, GALILEO_PINMUX_FUNC_B }, /* EXP2.P0_6 (in)/ADC.IN3 */
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{ 18, GALILEO_PINMUX_FUNC_C }, /* I2C_SDA */
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{ 19, GALILEO_PINMUX_FUNC_C }, /* I2C_SCL */
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};
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struct mux_pin {
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MUX_CHIP chip;
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uint8_t pin;
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PIN_LEVEL level;
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uint32_t cfg;
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};
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struct mux_path {
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uint8_t io_pin;
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GALILEO_PINMUX_FUNC func;
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struct mux_pin path[PINMUX_NUM_PATHS];
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};
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struct pinmux_internal_data {
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struct gpio_pcal9535a_data exp0;
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struct gpio_pcal9535a_data exp1;
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struct gpio_pcal9535a_data exp2;
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struct pwm_pca9685_data pwm0;
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};
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static struct pinmux_internal_data data;
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static struct mux_path galileo_pinmux_paths[PINMUX_NUM_PINS * PINMUX_NUM_FUNCS] = {
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{0, GALILEO_PINMUX_FUNC_A, {
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{ EXP1, 0, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO3 out */
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{ EXP1, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{0, GALILEO_PINMUX_FUNC_B, {
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{ EXP1, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO3 in */
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{ EXP1, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{0, GALILEO_PINMUX_FUNC_C, {
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{ EXP1, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* UART0_RXD */
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{ EXP1, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{0, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{1, GALILEO_PINMUX_FUNC_A, {
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{ EXP1, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO4 out */
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{ EXP0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{1, GALILEO_PINMUX_FUNC_B, {
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{ EXP1, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO4 in */
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{ EXP0, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT)},
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{ EXP0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{1, GALILEO_PINMUX_FUNC_C, {
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{ EXP1, 13, PIN_HIGH, (QUARKX1000_GPIO_OUT)}, /* UART0_TXD */
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{ EXP0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{1, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{2, GALILEO_PINMUX_FUNC_A, {
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{ PWM0, 13, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO5 out */
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{ EXP1, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP1, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{2, GALILEO_PINMUX_FUNC_B, {
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{ PWM0, 13, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO5 in */
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{ EXP1, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ EXP1, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{2, GALILEO_PINMUX_FUNC_C, {
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{ PWM0, 13, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* UART1_RXD */
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{ EXP1, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ EXP1, 3, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{2, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{3, GALILEO_PINMUX_FUNC_A, {
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{ PWM0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO6 out */
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{ PWM0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
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{3, GALILEO_PINMUX_FUNC_B, {
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{ PWM0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO6 in */
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{ PWM0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 0, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
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{3, GALILEO_PINMUX_FUNC_C, {
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{ PWM0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* UART1_TXD */
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{ PWM0, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
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{3, GALILEO_PINMUX_FUNC_D, {
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{ PWM0, 0, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED1 */
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{ PWM0, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
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{4, GALILEO_PINMUX_FUNC_A, {
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{ EXP1, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS4 out */
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{ EXP1, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{4, GALILEO_PINMUX_FUNC_B, {
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{ EXP1, 4, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS4 in */
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{ EXP1, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{4, GALILEO_PINMUX_FUNC_C, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{4, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{5, GALILEO_PINMUX_FUNC_A, {
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{ PWM0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO8 (out) */
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{ EXP0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{5, GALILEO_PINMUX_FUNC_B, {
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{ PWM0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO8 (in) */
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{ EXP0, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{5, GALILEO_PINMUX_FUNC_C, {
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{ PWM0, 2, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED3 */
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{ EXP0, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{5, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{6, GALILEO_PINMUX_FUNC_A, {
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{ PWM0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO9 (out) */
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{ EXP0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{6, GALILEO_PINMUX_FUNC_B, {
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{ PWM0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO9 (in) */
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{ EXP0, 4, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{6, GALILEO_PINMUX_FUNC_C, {
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{ PWM0, 4, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED5 */
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{ EXP0, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ EXP0, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{6, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{7, GALILEO_PINMUX_FUNC_A, {
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{ EXP1, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS0 (out) */
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{ EXP1, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{7, GALILEO_PINMUX_FUNC_B, {
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{ EXP1, 6, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* GPIO_SUS0 (in) */
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{ EXP1, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{7, GALILEO_PINMUX_FUNC_C, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{7, GALILEO_PINMUX_FUNC_D, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{8, GALILEO_PINMUX_FUNC_A, {
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{ EXP1, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS1 (out) */
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{ EXP1, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{8, GALILEO_PINMUX_FUNC_B, {
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{ EXP1, 8, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* GPIO_SUS1 (in) */
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{ EXP1, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
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{8, GALILEO_PINMUX_FUNC_C, {
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
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{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{8, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{9, GALILEO_PINMUX_FUNC_A, {
|
||||
{ PWM0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS2 (out) */
|
||||
{ EXP0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{9, GALILEO_PINMUX_FUNC_B, {
|
||||
{ PWM0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS2 (in) */
|
||||
{ EXP0, 6, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{9, GALILEO_PINMUX_FUNC_C, {
|
||||
{ PWM0, 6, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED7 */
|
||||
{ EXP0, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{9, GALILEO_PINMUX_FUNC_C, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{10, GALILEO_PINMUX_FUNC_A, {
|
||||
{ PWM0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO2 (out) */
|
||||
{ EXP0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{10, GALILEO_PINMUX_FUNC_B, {
|
||||
{ PWM0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO2 (in) */
|
||||
{ EXP0, 10, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{10, GALILEO_PINMUX_FUNC_C, {
|
||||
{ PWM0, 10, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* PWM.LED11 */
|
||||
{ EXP0, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{10, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{11, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP1, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS3 (out) */
|
||||
{ PWM0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{11, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP1, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS3 (in) */
|
||||
{ PWM0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 8, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{11, GALILEO_PINMUX_FUNC_C, {
|
||||
{ EXP1, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* PWM.LED9 */
|
||||
{ PWM0, 8, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{11, GALILEO_PINMUX_FUNC_D, {
|
||||
{ EXP1, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* SPI1_MOSI */
|
||||
{ PWM0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
|
||||
{12, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP1, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO7 (out) */
|
||||
{ EXP1, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{12, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP1, 10, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* GPIO7 (in) */
|
||||
{ EXP1, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{12, GALILEO_PINMUX_FUNC_C, {
|
||||
{ EXP1, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* SPI1_MISO */
|
||||
{ EXP1, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{12, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{13, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP1, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS5 (out) */
|
||||
{ EXP0, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{13, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP1, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* GPIO_SUS5 (in) */
|
||||
{ EXP0, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{13, GALILEO_PINMUX_FUNC_C, {
|
||||
{ EXP1, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* SPI1_CLK */
|
||||
{ EXP0, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{13, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{14, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP2, 0, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_0 (out)/ADC.IN0 */
|
||||
{ EXP2, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{14, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP2, 0, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_0 (in)/ADC.IN0 */
|
||||
{ EXP2, 1, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{14, GALILEO_PINMUX_FUNC_C, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{14, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{15, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP2, 2, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_2 (out)/ADC.IN1 */
|
||||
{ EXP2, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{15, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP2, 2, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_2 (in)/ADC.IN1 */
|
||||
{ EXP2, 3, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{15, GALILEO_PINMUX_FUNC_C, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{15, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{16, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP2, 4, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_4 (out)/ADC.IN2 */
|
||||
{ EXP2, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{16, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP2, 4, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_4 (in)/ADC.IN2 */
|
||||
{ EXP2, 5, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{16, GALILEO_PINMUX_FUNC_C, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{16, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{17, GALILEO_PINMUX_FUNC_A, {
|
||||
{ EXP2, 6, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P0_6 (out)/ADC.IN3 */
|
||||
{ EXP2, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{17, GALILEO_PINMUX_FUNC_B, {
|
||||
{ EXP2, 6, PIN_LOW, (QUARKX1000_GPIO_IN ) }, /* EXP2.P0_6 (in)/ADC.IN3 */
|
||||
{ EXP2, 7, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{17, GALILEO_PINMUX_FUNC_C, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{17, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{18, GALILEO_PINMUX_FUNC_A, {
|
||||
{ PWM0, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_0 (out)/ADC.IN4 */
|
||||
{ EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 8, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{18, GALILEO_PINMUX_FUNC_B, {
|
||||
{ PWM0, 14, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_0 (in)/ADC.IN4 */
|
||||
{ EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 8, PIN_LOW, (QUARKX1000_GPIO_IN ) },
|
||||
{ EXP2, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{18, GALILEO_PINMUX_FUNC_C, {
|
||||
{ PWM0, 14, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* I2C SDA */
|
||||
{ EXP2, 9, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{18, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
|
||||
{19, GALILEO_PINMUX_FUNC_A, {
|
||||
{ PWM0, 15, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_2 (out)/ADC.IN5 */
|
||||
{ EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 10, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{19, GALILEO_PINMUX_FUNC_B, {
|
||||
{ PWM0, 15, PIN_LOW, (QUARKX1000_GPIO_OUT) }, /* EXP2.P1_2 (in)/ADC.IN5 */
|
||||
{ EXP2, 12, PIN_HIGH, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 10, PIN_LOW, (QUARKX1000_GPIO_IN ) },
|
||||
{ EXP2, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) }}},
|
||||
{19, GALILEO_PINMUX_FUNC_C, {
|
||||
{ PWM0, 15, PIN_HIGH, (QUARKX1000_GPIO_OUT) }, /* I2C SCL */
|
||||
{ EXP2, 11, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ EXP2, 12, PIN_LOW, (QUARKX1000_GPIO_OUT) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
{19, GALILEO_PINMUX_FUNC_D, {
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }, /* NONE */
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) },
|
||||
{ NONE, 0, DISABLED, (QUARKX1000_GPIO_IN ) }}},
|
||||
};
|
||||
|
||||
int
|
||||
galileo_pinmux_set_pin(uint8_t pin, GALILEO_PINMUX_FUNC func)
|
||||
{
|
||||
struct mux_path *mux_path;
|
||||
uint8_t index, i;
|
||||
|
||||
if (pin > PINMUX_NUM_PINS)
|
||||
return -1;
|
||||
|
||||
index = PINMUX_NUM_FUNCS * pin;
|
||||
index += func;
|
||||
|
||||
mux_path = &galileo_pinmux_paths[index];
|
||||
|
||||
for (i = 0; i < PINMUX_NUM_PATHS; i++) {
|
||||
switch(mux_path->path[i].chip) {
|
||||
case EXP0:
|
||||
if (gpio_pcal9535a_write(&data.exp0, mux_path->path[i].pin, mux_path->path[i].level) < 0)
|
||||
return -1;
|
||||
if (gpio_pcal9535a_config(&data.exp0, mux_path->path[i].pin, mux_path->path[i].cfg) < 0)
|
||||
return -1;
|
||||
break;
|
||||
case EXP1:
|
||||
if (gpio_pcal9535a_write(&data.exp1, mux_path->path[i].pin, mux_path->path[i].level) < 0)
|
||||
return -1;
|
||||
if (gpio_pcal9535a_config(&data.exp1, mux_path->path[i].pin, mux_path->path[i].cfg) < 0)
|
||||
return -1;
|
||||
break;
|
||||
case EXP2:
|
||||
if (gpio_pcal9535a_write(&data.exp2, mux_path->path[i].pin, mux_path->path[i].level) < 0)
|
||||
return -1;
|
||||
if (gpio_pcal9535a_config(&data.exp2, mux_path->path[i].pin, mux_path->path[i].cfg) < 0)
|
||||
return -1;
|
||||
break;
|
||||
case PWM0:
|
||||
if (pwm_pca9685_set_duty_cycle(&data.pwm0, mux_path->path[i].pin, mux_path->path[i].level ? 100 : 0) < 0)
|
||||
return -1;
|
||||
break;
|
||||
case NONE:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int
|
||||
galileo_pinmux_initialize(void)
|
||||
{
|
||||
uint8_t i;
|
||||
|
||||
/* has to init after I2C master */
|
||||
if (!quarkX1000_i2c_is_available())
|
||||
return -1;
|
||||
|
||||
if (gpio_pcal9535a_init(&data.exp0, GPIO_PCAL9535A_0_I2C_ADDR) < 0)
|
||||
return -1;
|
||||
|
||||
if (gpio_pcal9535a_init(&data.exp1, GPIO_PCAL9535A_1_I2C_ADDR) < 0)
|
||||
return -1;
|
||||
|
||||
if (gpio_pcal9535a_init(&data.exp2, GPIO_PCAL9535A_2_I2C_ADDR) < 0)
|
||||
return -1;
|
||||
|
||||
if (pwm_pca9685_init(&data.pwm0, PWM_PCA9685_0_I2C_ADDR) < 0)
|
||||
return -1;
|
||||
|
||||
for (i = 0; i < PINMUX_NUM_PINS; i++) {
|
||||
if (galileo_pinmux_set_pin(default_pinmux_config[i].pin_num, default_pinmux_config[i].func) < 0)
|
||||
return -1;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
46
platform/galileo/drivers/galileo-pinmux.h
Normal file
46
platform/galileo/drivers/galileo-pinmux.h
Normal file
|
|
@ -0,0 +1,46 @@
|
|||
/*
|
||||
* Copyright (C) 2015, Intel Corporation. All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
*
|
||||
* 3. Neither the name of the copyright holder nor the names of its
|
||||
* contributors may be used to endorse or promote products derived
|
||||
* from this software without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
|
||||
* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
|
||||
* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
|
||||
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
|
||||
* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
|
||||
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
|
||||
* OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#ifndef CPU_X86_DRIVERS_GALILEO_PINMUX_H_
|
||||
#define CPU_X86_DRIVERS_GALILEO_PINMUX_H_
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
typedef enum {
|
||||
GALILEO_PINMUX_FUNC_A,
|
||||
GALILEO_PINMUX_FUNC_B,
|
||||
GALILEO_PINMUX_FUNC_C,
|
||||
GALILEO_PINMUX_FUNC_D
|
||||
} GALILEO_PINMUX_FUNC;
|
||||
|
||||
int galileo_pinmux_initialize(void);
|
||||
int galileo_pinmux_set_pin(uint8_t pin, GALILEO_PINMUX_FUNC func);
|
||||
|
||||
#endif /* CPU_X86_DRIVERS_GALILEO_PINMUX_H_ */
|
||||
Loading…
Reference in a new issue