From 8d25438841bcf3c301a9a7869f0e4791a5b0224e Mon Sep 17 00:00:00 2001 From: Mariano Alvira Date: Sat, 11 Apr 2009 17:17:37 -0400 Subject: [PATCH] checkpoint --- doc/radioinit | 10 ++++++++++ doc/ws.dis | 20 ++++++++++---------- tests/rftest-rx.c | 15 ++------------- 3 files changed, 22 insertions(+), 23 deletions(-) diff --git a/doc/radioinit b/doc/radioinit index 608517fa0..e9e15ec3e 100644 --- a/doc/radioinit +++ b/doc/radioinit @@ -92,4 +92,14 @@ then maybe buckbypass sequence... 4 entries from r4+16 +RadioInit is (roughly): + SMAC_InitFromMemory(gRadioTOCCal1,40); + SMAC_InitFromMemeory(gRadioTOCCal2_24MHz_c,8); + SMAC_InitFromMemeory(gRadioTOCCal3,88); + SMAC_InitFromMemeory(gRadioTOCCal5,32); + SMAC_InitFromMemeory(gRadioInit_RegReplacement_c,344); + SMAC_InitFromFlash(0x1F000); + SMAC_InitFlybackSettings(); + /* then they check stuff in ram_init_val */ + /* getting a dump of that now */ diff --git a/doc/ws.dis b/doc/ws.dis index e62444f34..049857ca6 100644 --- a/doc/ws.dis +++ b/doc/ws.dis @@ -5191,7 +5191,7 @@ Disassembly of section P2: 402fd8: 61fd str r5, [r7, #28] // gRadioTOCCal2_N[28] 0x1c 402fda: 4c36 ldr r4, [pc, #216] (4030b4 ) // else endif 4030b4: .word 0x00402dcc buck_enable 402fdc: 4d70 ldr r5, [pc, #448] (4031a0 ) // 0x0040544c ram_init_val - 402fde: 7928 ldrb r0, [r5, #4] // load low byte + 402fde: 7928 ldrb r0, [r5, #4] // r0 gets 0 402fe0: 2801 cmp r0, #1 // check if its 1 (it's not, it's 0) 402fe2: d106 bne.n 402ff2 // and skip stuff (to 2ff2,HERE) assume skip we have 24MHz 402fe4: 4834 ldr r0, [pc, #208] (4030b8 ) // 4030b8: .word 0x00000f7b @@ -5214,14 +5214,14 @@ Disassembly of section P2: 403006: f000 f96d bl 4032e4 // call InitFromMemory with setup vals? 32 bytes of buck_enable+16? 40300a: 2128 movs r1, #40 // THERE: chould have come from a skip r1 gets 40 40300c: 0038 lsls r0, r7, #0 // r0 is r7 (cal2) r7 base - 40300e: 3030 adds r0, #48 // now its cal2+48 which is 0x405420 (increment by sizeof?) + 40300e: 3030 adds r0, #48 // now its cal2+48 which is Cal1 403010: f000 f968 bl 4032e4 // 40 entries of gRadioTOCCal2_None24Mhz+48?//i think this bombs b/c zero... 403014: 4826 ldr r0, [pc, #152] (4030b0 ) // 4030b0: 016e3600 .word 0x016e3600 403016: 4286 cmp r6, r0 403018: d103 bne.n 403022 // another test for 24MHz branch to NEXT: if !=, but they are 40301a: 2108 movs r1, #8 // 8 bytes = 1 entry 40301c: 0020 lsls r0, r4, #0 // r4 base - 40301e: 3030 adds r0, #48 // r4 base+48 + 40301e: 3030 adds r0, #48 // r4 base+48 (gRadioTOCCal2_24MHz_c) 403020: e001 b.n 403026 // goto endif 403022: 2130 movs r1, #48 // NEXT: 403024: 0038 lsls r0, r7, #0 // 48 bytes = 6 entries of r7+0 @@ -5232,14 +5232,14 @@ Disassembly of section P2: 403030: f000 f958 bl 4032e4 // do another then do 11 entries from r4+56 0x2e14 (in cal 3) 403034: 481e ldr r0, [pc, #120] (4030b0 ) 403036: 4286 cmp r6, r0 // check for 24MHZ - 403038: d004 beq.n 403044 // goto endif - 40303a: 2108 movs r1, #8 // skip + 403038: d004 beq.n 403044 // branch they are equal + 40303a: 2108 movs r1, #8 // skip 40303c: 0020 lsls r0, r4, #0 // skip 40303e: 3090 adds r0, #144 // skip - 403040: f000 f950 bl 4032e4 // skip + 403040: f000 f950 bl 4032e4 403044: 2120 movs r1, #32 // endif: four entries of 403046: 0028 lsls r0, r5, #0 - 403048: 3018 adds r0, #24 // r5+24 + 403048: 3018 adds r0, #24 // r5+24 RadioCal5 40304a: f000 f94b bl 4032e4 // do 32 entries in r5+24 this might be zero... 40304e: 21ac movs r1, #172 403050: 0049 lsls r1, r1, #1 // r1 gets 344 @@ -5248,9 +5248,9 @@ Disassembly of section P2: 403056: f000 f945 bl 4032e4 // do 344 entries from r4+152 0x2e74 (in reg replacment) 40305a: 20f8 movs r0, #248 // r0 gets 0xf8 40305c: 0240 lsls r0, r0, #9 // r0 is now 0x1F000 - 40305e: f000 f8db bl 403218 // from flash --- this might be the regreplacment since that's in codespace... + 40305e: f000 f8db bl 403218 // from flash --- this might be the regreplacment since that's in codespace... luckly we can call it directly and IAR links it in. looks like it sets a lot of the ram values that aren't getting set without it 403062: f000 f82f bl 4030c4 // looks like this happens... - 403066: 7928 ldrb r0, [r5, #4] // 0 unless initfromflash does something to it + 403066: 7928 ldrb r0, [r5, #4] // need a dump of r5 ram_init_val now 403068: 2801 cmp r0, #1 40306a: d101 bne.n 403070 // say it doesn't branch, 40306c: 2110 movs r1, #16 // r1 gets 16 @@ -5261,7 +5261,7 @@ Disassembly of section P2: 403076: 2120 movs r1, #32 403078: 3410 adds r4, #16 40307a: 0020 lsls r0, r4, #0 // 5: - 40307c: f000 f932 bl 4032e4 // do 4 entries but now from r4 + 16 of buck bypass + 40307c: f000 f932 bl 4032e4 // do 4 entries but from r4 of buck bypass 403080: 480f ldr r0, [pc, #60] (4030c0 ) 403082: f000 f881 bl 403188 // and a call to fill ram struct --- maybe important to the program? 403086: 2400 movs r4, #0 diff --git a/tests/rftest-rx.c b/tests/rftest-rx.c index 211af0ced..96f5f14bc 100644 --- a/tests/rftest-rx.c +++ b/tests/rftest-rx.c @@ -97,21 +97,10 @@ void main(void) { reg(UART1_CON) = 0x00000003; /* enable receive and transmit */ reg(GPIO_FUNC_SEL0) = ( (0x01 << (14*2)) | (0x01 << (15*2)) ); /* set GPIO15-14 to UART (UART1 TX and RX)*/ - /* turn on the voltage regulators for the radio */ - /* you clod! */ - for(i=0; i