Added mc1322x functions

cpu/mc1322x/clock.c

@@ -90,6 +90,12 @@ clock_seconds(void)
 	return seconds;
 }
 
+void
+clock_set_seconds(unsigned long sec)
+{
+	seconds = sec;
+}
+
 void
 clock_wait(clock_time_t t)
 {

cpu/mc1322x/lib/include/crm.h

@@ -325,6 +325,17 @@ static const int XTAL32_EN =   0;
 #define pack_XTAL_CNTL(ctune4pf, ctune, ftune, ibias) \
 	(*CRM_XTAL_CNTL = ((ctune4pf << 25) | (ctune << 21) | ( ftune << 16) | (ibias << 8) | 0x52))
 
+#define soft_reset() \
+    __asm__ __volatile__ ( \
+        "ldr r0, [%[sw]] \n\t" \
+        "str r0, [%[sw]] \n\t" \
+    : /* out */ \
+    : /* in */ \
+        [sw] "l" (CRM_SW_RST) \
+    : /* clobber list */ \
+        "r0", "memory" \
+    );
+
 #endif /* REG_NO_COMPAT */
 
 #endif

cpu/mc1322x/lib/include/nvm.h

@@ -78,5 +78,6 @@ extern nvmErr_t (*nvm_write)(nvmInterface_t nvmInterface, nvmType_t nvmType ,voi
 /* SST flash has 32 sectors 4096 bytes each */
 /* bit 0 is the first sector, bit 31 is the last */
 extern nvmErr_t (*nvm_erase)(nvmInterface_t nvmInterface, nvmType_t nvmType ,uint32_t sectorBitfield);
+extern nvmErr_t (*nvm_verify)(nvmInterface_t nvmInterface, nvmType_t nvmType, void *pSrc, uint32_t address, uint32_t numBytes);
 extern void(*nvm_setsvar)(uint32_t zero_for_awesome);
 #endif //NVM_H

cpu/mc1322x/lib/nvm.c

@@ -51,6 +51,10 @@ nvmErr_t (*nvm_erase)
 (nvmInterface_t nvmInterface, nvmType_t nvmType ,uint32_t sectorBitfield) 
 = (void*) 0x00006e05;
 
+nvmErr_t (*nvm_verify)
+(nvmInterface_t nvmInterface, nvmType_t nvmType, void *pSrc, uint32_t address, uint32_t numBytes)
+= (void*) 0x00006f85;
+
 void(*nvm_setsvar)
 (uint32_t zero_for_awesome) 
 = (void *)0x00007085;