deac/osd-contiki
1
0
Fork 0
Code Issues Pull requests Releases Wiki Activity

code style compliancy

Browse source
This commit is contained in:
nvt-se 2009-06-29 12:46:49 +00:00
parent 89ce58f576
commit 828439c922
8 changed files with 85 additions and 85 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

BIN
platform/msb430/buildscripts/jtag/pyjtag/elf.pyc
View file

Binary file not shown.

27
platform/msb430/dev/dma.c
View file

@ -48,35 +48,35 @@ static void (*callbacks[DMA_LINES])(void);
interrupt(DACDMA_VECTOR) irq_dacdma(void) interrupt(DACDMA_VECTOR) irq_dacdma(void)
{ {
if (DMA0CTL & DMAIFG) { if(DMA0CTL & DMAIFG) {
DMA0CTL &= ~(DMAIFG | DMAIE); DMA0CTL &= ~(DMAIFG | DMAIE);
if (callbacks[0] != NULL) { if(callbacks[0] != NULL) {
callbacks[0](); callbacks[0]();
} }
LPM_AWAKE(); LPM_AWAKE();
} }
if (DMA1CTL & DMAIFG) { if(DMA1CTL & DMAIFG) {
DMA1CTL &= ~(DMAIFG | DMAIE); DMA1CTL &= ~(DMAIFG | DMAIE);
if (callbacks[1] != NULL) { if(callbacks[1] != NULL) {
callbacks[1](); callbacks[1]();
} }
LPM_AWAKE(); LPM_AWAKE();
} }
if (DMA2CTL & DMAIFG) { if(DMA2CTL & DMAIFG) {
DMA2CTL &= ~(DMAIFG | DMAIE); DMA2CTL &= ~(DMAIFG | DMAIE);
if (callbacks[2] != NULL) { if(callbacks[2] != NULL) {
callbacks[2](); callbacks[2]();
} }
LPM_AWAKE(); LPM_AWAKE();
} }
if (DAC12_0CTL & DAC12IFG) { if(DAC12_0CTL & DAC12IFG) {
DAC12_0CTL &= ~(DAC12IFG | DAC12IE); DAC12_0CTL &= ~(DAC12IFG | DAC12IE);
} }
if (DAC12_1CTL & DAC12IFG) { if(DAC12_1CTL & DAC12IFG) {
DAC12_1CTL &= ~(DAC12IFG | DAC12IE); DAC12_1CTL &= ~(DAC12IFG | DAC12IE);
} }
} }
@ -84,8 +84,9 @@ interrupt(DACDMA_VECTOR) irq_dacdma(void)
int int
dma_subscribe(int line, void (*callback)(void)) dma_subscribe(int line, void (*callback)(void))
{ {
if (line >= DMA_LINES) if(line >= DMA_LINES) {
return -1; return -1;
}
callbacks[line] = callback; callbacks[line] = callback;
return 0; return 0;
@ -94,10 +95,10 @@ dma_subscribe(int line, void (*callback)(void))
void void
dma_transfer(unsigned char *dst, unsigned char *src, unsigned len) dma_transfer(unsigned char *dst, unsigned char *src, unsigned len)
{ {
// Configure DMA Channel 0 for UART0 TXIFG. /* Configure DMA Channel 0 for UART0 TXIFG. */
DMACTL0 = DMA0TSEL_4; DMACTL0 = DMA0TSEL_4;
// No DMAONFETCH, ROUNDROBIN, ENNMI. /* No DMAONFETCH, ROUNDROBIN, ENNMI. */
DMACTL1 = 0x0000; DMACTL1 = 0x0000;
/* /*
@ -116,6 +117,6 @@ dma_transfer(unsigned char *dst, unsigned char *src, unsigned len)
DMA0DA = (unsigned) dst; DMA0DA = (unsigned) dst;
DMA0SZ = len; DMA0SZ = len;
DMA0CTL |= DMAEN | DMAIE; // enable DMA and interrupts DMA0CTL |= DMAEN | DMAIE; /* enable DMA and interrupts */
U0CTL &= ~SWRST; // enable UART state machine, starts transfer U0CTL &= ~SWRST; /* enable the UART state machine */
} }

25
platform/msb430/dev/infomem.c
View file

@ -60,7 +60,7 @@ Berlin, 2007
void void
infomem_read(void *buffer, unsigned int offset, unsigned char size) infomem_read(void *buffer, unsigned int offset, unsigned char size)
{ {
uint8_t *address = (uint8_t *) INFOMEM_START + offset; uint8_t *address = (uint8_t *)INFOMEM_START + offset;
memcpy(buffer, address, size); memcpy(buffer, address, size);
} }
@ -76,21 +76,22 @@ infomem_write(unsigned int offset, unsigned char count, ...)
uint8_t *data; uint8_t *data;
int s; int s;
if (offset > (2 * INFOMEM_BLOCK_SIZE)) if(offset > (2 * INFOMEM_BLOCK_SIZE)) {
return FALSE; return FALSE;
}
flash = (uint8_t *) INFOMEM_START + offset; flash = (uint8_t *)INFOMEM_START + offset;
s = splhigh(); s = splhigh();
// backup into RAM /* backup into RAM */
memcpy(backup, flash, INFOMEM_BLOCK_SIZE); memcpy(backup, flash, INFOMEM_BLOCK_SIZE);
// merge backup with new data /* merge backup with new data */
va_start(argp, count); va_start(argp, count);
buffer = (uint8_t *) backup; buffer = (uint8_t *)backup;
for (i = 0; i < count; i++) { for(i = 0; i < count; i++) {
data = va_arg(argp, uint8_t*); data = va_arg(argp, uint8_t*);
size = va_arg(argp, uint16_t); size = va_arg(argp, uint16_t);
memcpy(buffer, data, size); memcpy(buffer, data, size);
@ -99,18 +100,18 @@ infomem_write(unsigned int offset, unsigned char count, ...)
va_end(argp); va_end(argp);
// init flash access /* init flash access */
FCTL2 = FWKEY + FSSEL1 + FN2; FCTL2 = FWKEY + FSSEL1 + FN2;
FCTL3 = FWKEY; FCTL3 = FWKEY;
// erase flash /* erase flash */
FCTL1 = FWKEY + ERASE; FCTL1 = FWKEY + ERASE;
*flash = 0; *flash = 0;
// write flash /* write flash */
FCTL1 = FWKEY + WRT; FCTL1 = FWKEY + WRT;
buffer = (uint8_t *) backup; buffer = (uint8_t *)backup;
for (i = 0; i < INFOMEM_BLOCK_SIZE; i++) { for(i = 0; i < INFOMEM_BLOCK_SIZE; i++) {
*flash++ = *buffer++; *flash++ = *buffer++;
} }

88
platform/msb430/dev/msb430-uart1.c
View file

@ -69,73 +69,71 @@ volatile uint8_t uart_edge = 0;
static unsigned char uart_speed_br0[UART_NUM_MODES]; static unsigned char uart_speed_br0[UART_NUM_MODES];
static unsigned char uart_speed_br1[UART_NUM_MODES]; static unsigned char uart_speed_br1[UART_NUM_MODES];
static unsigned char uart_speed_bmn[UART_NUM_MODES]; static unsigned char uart_speed_bmn[UART_NUM_MODES];
static fp_uart_handler uart_handler[UART_NUM_MODES] = {NULL, NULL}; static uart_handler_t uart_handler[UART_NUM_MODES] = {NULL, NULL};
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
static void static void
uart_configure(unsigned mode) uart_configure(unsigned mode)
{ {
_DINT(); // disable interrupts _DINT(); /* disable interrupts */
UART_WAIT_TXDONE(); // wait till all buffered data has been transmitted UART_WAIT_TXDONE(); /* wait till all buffered data has been transmitted */
// configure
if(mode == UART_MODE_RS232) { if(mode == UART_MODE_RS232) {
P5OUT |= 0x01; P5OUT |= 0x01;
// unselect SPI /* unselect SPI */
P3SEL |= 0xC0; P3SEL |= 0xC0;
// select rs232 /* select rs232 */
// to RS232 mode UCTL1 = SWRST | CHAR; /* 8-bit character */
UCTL1 = SWRST | CHAR; // 8-bit character UTCTL1 |= SSEL1; /* UCLK = MCLK */
UTCTL1 |= SSEL1; // UCLK = MCLK /* activate */
// activate U1ME |= UTXE1 | URXE1; /* Enable USART1 TXD/RXD */
U1ME |= UTXE1 | URXE1; // Enable USART1 TXD/RXD
} else if(mode == UART_MODE_SPI) { } else if(mode == UART_MODE_SPI) {
P3SEL &= ~0xC0; // unselect RS232 P3SEL &= ~0xC0; /* unselect RS232 */
// to SPI mode // to SPI mode
UCTL1 = SWRST | CHAR | SYNC | MM; // 8-bit SPI Master UCTL1 = SWRST | CHAR | SYNC | MM; /* 8-bit SPI Master */
/* /*
* SMCLK, 3-pin mode, clock idle low, data valid on * SMCLK, 3-pin mode, clock idle low, data valid on
* rising edge, UCLK delayed * rising edge, UCLK delayed
*/ */
UTCTL1 |= CKPH | SSEL1 | SSEL0 | STC; // activate UTCTL1 |= CKPH | SSEL1 | SSEL0 | STC; /* activate */
U1ME |= USPIE1; // Enable USART1 SPI U1ME |= USPIE1; /* Enable USART1 SPI */
} }
// restore speed settings /* restore speed settings */
UBR01 = uart_speed_br0[mode]; // set baudrate UBR01 = uart_speed_br0[mode]; /* set baudrate */
UBR11 = uart_speed_br1[mode]; UBR11 = uart_speed_br1[mode];
UMCTL1 = uart_speed_bmn[mode]; // set modulation UMCTL1 = uart_speed_bmn[mode]; /* set modulation */
UCTL1 &= ~SWRST; // clear reset flag UCTL1 &= ~SWRST; /* clear reset flag */
_EINT(); // enable interrupts _EINT(); /* enable interrupts */
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
void void
uart_set_speed(unsigned mode, unsigned ubr0, uart_set_speed(unsigned mode, unsigned ubr0,
unsigned ubr1, unsigned umctl) unsigned ubr1, unsigned umctl)
{ {
// store setting /* store the setting */
uart_speed_br0[mode] = ubr0; // baudrate uart_speed_br0[mode] = ubr0; /* baudrate */
uart_speed_br1[mode] = ubr1; // baudrate uart_speed_br1[mode] = ubr1; /* baudrate */
uart_speed_bmn[mode] = umctl; // modulation uart_speed_bmn[mode] = umctl; /* modulation */
// reconfigure, if mode active /* reconfigure, if mode active */
if (uart_mode == mode) { if(uart_mode == mode) {
uart_configure(mode); uart_configure(mode);
} }
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
void void
uart_set_handler(unsigned mode, fp_uart_handler fpHandler) uart_set_handler(unsigned mode, uart_handler_t handler)
{ {
// store setting /* store the setting */
uart_handler[mode] = fpHandler; uart_handler[mode] = handler;
if(mode == uart_mode) { if(mode == uart_mode) {
if (fpHandler == NULL) { if(handler == NULL) {
IE2 &= ~URXIE1; // Disable USART1 RX interrupt IE2 &= ~URXIE1; /* Disable USART1 RX interrupt */
} else { } else {
IE2 |= URXIE1; // Enable USART1 RX interrupt IE2 |= URXIE1; /* Enable USART1 RX interrupt */
} }
} }
} }
@ -143,14 +141,14 @@ uart_set_handler(unsigned mode, fp_uart_handler fpHandler)
int int
uart_lock(unsigned mode) uart_lock(unsigned mode)
{ {
// already locked? /* already locked? */
if(uart_mode != mode && uart_lockcnt > 0) { if(uart_mode != mode && uart_lockcnt > 0) {
return 0; return 0;
} }
// increase lock count /* increase lock count */
uart_lockcnt++; uart_lockcnt++;
// switch mode (if neccessary) /* switch mode (if neccessary) */
uart_set_mode(mode); uart_set_mode(mode);
return 1; return 1;
} }
@ -173,10 +171,10 @@ uart_unlock(unsigned mode)
return 0; return 0;
} }
// decrement lock /* decrement lock */
if (uart_lockcnt > 0) { if(uart_lockcnt > 0) {
uart_lockcnt--; uart_lockcnt--;
// if no more locks, switch back to default mode /* if no more locks, switch back to default mode */
if(uart_lockcnt == 0) { if(uart_lockcnt == 0) {
uart_set_mode(UART_MODE_DEFAULT); uart_set_mode(UART_MODE_DEFAULT);
} }
@ -188,17 +186,17 @@ uart_unlock(unsigned mode)
void void
uart_set_mode(unsigned mode) uart_set_mode(unsigned mode)
{ {
// do nothing if mode already set /* do nothing if the mode is already set */
if(mode == uart_mode) { if(mode == uart_mode) {
return; return;
} }
IE2 &= ~(URXIE1 | UTXIE1); // disable irq IE2 &= ~(URXIE1 | UTXIE1); /* disable irq */
uart_configure(mode); // configure uart parameters uart_configure(mode); /* configure uart parameters */
uart_mode = mode; uart_mode = mode;
if(uart_handler[mode] != NULL) { if(uart_handler[mode] != NULL) {
IE2 |= URXIE1; // Enable USART1 RX interrupt IE2 |= URXIE1; /* Enable USART1 RX interrupt */
} }
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
@ -211,11 +209,11 @@ uart_get_mode(void)
interrupt(UART1RX_VECTOR) interrupt(UART1RX_VECTOR)
uart_rx(void) uart_rx(void)
{ {
fp_uart_handler handler = uart_handler[uart_mode]; uart_handler_t handler = uart_handler[uart_mode];
int c; int c;
if(!(IFG2 & URXIFG1)) { if(!(IFG2 & URXIFG1)) {
// If start edge detected, toggle & return /* If rising edge is detected, toggle & return */
uart_edge = 1; uart_edge = 1;
U1TCTL &= ~URXSE; U1TCTL &= ~URXSE;
U1TCTL |= URXSE; U1TCTL |= URXSE;
@ -229,7 +227,7 @@ uart_rx(void)
_BIC_SR_IRQ(LPM3_bits); _BIC_SR_IRQ(LPM3_bits);
} }
} else { } else {
// read out the char to clear the I-flags, etc. /* read out the char to clear the interrupt flags. */
c = UART_RX; c = UART_RX;
} }
} }

14
platform/msb430/dev/msb430-uart1.h
View file

@ -56,8 +56,8 @@ Berlin, 2007
* \author Michael Baar <baar@inf.fu-berlin.de> * \author Michael Baar <baar@inf.fu-berlin.de>
*/ */
#ifndef MSB430_UART_H #ifndef MSB430_UART1_H
#define MSB430_UART_H #define MSB430_UART1_H
#define UART_RX RXBUF1 #define UART_RX RXBUF1
#define UART_TX TXBUF1 #define UART_TX TXBUF1
@ -84,10 +84,10 @@ extern volatile unsigned char uart_lockcnt;
#define UART_MODE_RESET (0xFFu) ///< reset with current settings #define UART_MODE_RESET (0xFFu) ///< reset with current settings
/** @} */ /** @} */
#define UART_WAIT_LOCK(x) ( (uart_mode != x ) && (uart_lockcnt) ) #define UART_WAIT_LOCK(x) ((uart_mode != x) && (uart_lockcnt))
#define UART_MODE_IS(x) ( uart_mode == x ) #define UART_MODE_IS(x) (uart_mode == x)
typedef int(*fp_uart_handler)(unsigned char); typedef int(*uart_handler_t)(unsigned char);
/** /**
* \brief Initialize the UART module * \brief Initialize the UART module
@ -98,14 +98,14 @@ typedef int(*fp_uart_handler)(unsigned char);
void uart_init(void); void uart_init(void);
void uart_set_speed(unsigned, unsigned, unsigned, unsigned); void uart_set_speed(unsigned, unsigned, unsigned, unsigned);
void uart_set_handler(unsigned, fp_uart_handler); void uart_set_handler(unsigned, uart_handler_t);
int uart_lock(unsigned); int uart_lock(unsigned);
int uart_lock_wait(unsigned); int uart_lock_wait(unsigned);
int uart_unlock(unsigned); int uart_unlock(unsigned);
void uart_set_mode(unsigned); void uart_set_mode(unsigned);
int uart_get_mode(void); int uart_get_mode(void);
#endif /* !UART_H */ #endif /* !MSB430_UART1_H */
/** @} */ /** @} */
/** @} */ /** @} */

8
platform/msb430/dev/rs232.c
View file

@ -28,7 +28,7 @@
* *
* This file is part of the Contiki operating system. * This file is part of the Contiki operating system.
* *
* @(#)$Id: rs232.c,v 1.8 2009/04/08 14:56:03 nvt-se Exp $ * @(#)$Id: rs232.c,v 1.9 2009/06/29 12:46:50 nvt-se Exp $
*/ */
/** \addtogroup esbrs232 /** \addtogroup esbrs232
@ -108,8 +108,8 @@ rs232_set_speed(enum rs232_speed speed)
void void
rs232_print(char *cptr) rs232_print(char *cptr)
{ {
// lock UART for print operation /* lock UART for the print operation */
if (uart_lock(UART_MODE_RS232)) { if(uart_lock(UART_MODE_RS232)) {
while(*cptr != 0) { while(*cptr != 0) {
rs232_send(*cptr); rs232_send(*cptr);
++cptr; ++cptr;
@ -119,7 +119,7 @@ rs232_print(char *cptr)
} }
/*---------------------------------------------------------------------------*/ /*---------------------------------------------------------------------------*/
void void
rs232_set_input(fp_uart_handler f) rs232_set_input(uart_handler_t f)
{ {
uart_set_handler(UART_MODE_RS232, f); uart_set_handler(UART_MODE_RS232, f);
} }

4
platform/msb430/dev/rs232.h
View file

@ -28,7 +28,7 @@
* *
* This file is part of the Contiki operating system. * This file is part of the Contiki operating system.
* *
* @(#)$Id: rs232.h,v 1.5 2009/03/12 12:23:22 nvt-se Exp $ * @(#)$Id: rs232.h,v 1.6 2009/06/29 12:46:50 nvt-se Exp $
*/ */
/** \addtogroup esb /** \addtogroup esb
@ -84,7 +84,7 @@ void rs232_init(void);
* take place. If the input handler returns zero, the CPU * take place. If the input handler returns zero, the CPU
* is kept sleeping. * is kept sleeping.
*/ */
void rs232_set_input(fp_uart_handler f); void rs232_set_input(uart_handler_t f);
/** /**
* \brief Configure the speed of the RS232 hardware * \brief Configure the speed of the RS232 hardware

4
platform/msb430/msb430-slip-arch.c
View file

@ -23,7 +23,7 @@ putchar(int c)
#define SLIP_END 0300 #define SLIP_END 0300
static char debug_frame = 0; static char debug_frame = 0;
if (!debug_frame) { /* Start of debug output */ if(!debug_frame) { /* Start of debug output */
slip_arch_writeb(SLIP_END); slip_arch_writeb(SLIP_END);
slip_arch_writeb('\r'); /* Type debug line == '\r' */ slip_arch_writeb('\r'); /* Type debug line == '\r' */
debug_frame = 1; debug_frame = 1;
@ -35,7 +35,7 @@ putchar(int c)
* Line buffered output, a newline marks the end of debug output and * Line buffered output, a newline marks the end of debug output and
* implicitly flushes debug output. * implicitly flushes debug output.
*/ */
if (c == '\n') { if(c == '\n') {
slip_arch_writeb(SLIP_END); slip_arch_writeb(SLIP_END);
debug_frame = 0; debug_frame = 0;
} }