that's how you set the channel
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16
doc/ws.dis
16
doc/ws.dis
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@ -5309,14 +5309,14 @@ Disassembly of section P2:
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4030e8: 00ffffff .word 0x00ffffff
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4030e8: 00ffffff .word 0x00ffffff
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004030ec <SetChannel>:
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004030ec <SetChannel>:
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4030ec: b430 push {r4, r5}
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4030ec: b430 push {r4, r5} //r0 = chan_num r1=vcodivF r2=vcodivI
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4030ee: 4b1d ldr r3, [pc, #116] (403164 <GetCurrentChannel+0x38>)
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4030ee: 4b1d ldr r3, [pc, #116] (403164 <GetCurrentChannel+0x38>)
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4030f0: 681c ldr r4, [r3, #0] //r4 = *0x80009800
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4030f0: 681c ldr r4, [r3, #0] //r4 = *0x80009800
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4030f2: 4d1d ldr r5, [pc, #116] (403168 <GetCurrentChannel+0x3c>) //0xbfffffff
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4030f2: 4d1d ldr r5, [pc, #116] (403168 <GetCurrentChannel+0x3c>) //0xbfffffff
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4030f4: 4025 ands r5, r4 // r5 = *0x80009800 & 0xbfffffff
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4030f4: 4025 ands r5, r4 // r5 = *0x80009800 & 0xbfffffff
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4030f6: 601d str r5, [r3, #0] // *0x80009800 = r5
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4030f6: 601d str r5, [r3, #0] // *0x80009800 = r5
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4030f8: 60d9 str r1, [r3, #12] // *0x80009800+12 = r3
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4030f8: 60d9 str r1, [r3, #12] // *0x80009800+12 = r3
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4030fa: 611a str r2, [r3, #16] // *0x80009800+12 = r2
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4030fa: 611a str r2, [r3, #16] // *0x80009800+16 = r2
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4030fc: 6b19 ldr r1, [r3, #48] // r1 = *0x80009800+48
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4030fc: 6b19 ldr r1, [r3, #48] // r1 = *0x80009800+48
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4030fe: 2202 movs r2, #2 // r2 = 2
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4030fe: 2202 movs r2, #2 // r2 = 2
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403100: 430a orrs r2, r1 // r2 = r1 | 2
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403100: 430a orrs r2, r1 // r2 = r1 | 2
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@ -6366,12 +6366,12 @@ Disassembly of section P2:
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403a38: e026 b.n 403a88 <??Subroutine2_0>
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403a38: e026 b.n 403a88 <??Subroutine2_0>
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00403a3a <??MLMESetChannelRequest_0>:
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00403a3a <??MLMESetChannelRequest_0>:
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403a3a: 0081 lsls r1, r0, #2
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403a3a: 0081 lsls r1, r0, #2 r0 is channel number, r1 is offset in words
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403a3c: 4a03 ldr r2, [pc, #12] (403a4c <??DataTable2>)
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403a3c: 4a03 ldr r2, [pc, #12] (403a4c <??DataTable2>) r2=0x00403c14 (gaRFSynVCODivF_c)
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403a3e: 5852 ldr r2, [r2, r1]
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403a3e: 5852 ldr r2, [r2, r1] r2 gets gaRFSynVCODivF_c[r1]
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403a40: 4903 ldr r1, [pc, #12] (403a50 <??DataTable3>)
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403a40: 4903 ldr r1, [pc, #12] (403a50 <??DataTable3>) r1=0x00403c04 (gaRFSynVCODivI_c)
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403a42: 5c09 ldrb r1, [r1, r0]
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403a42: 5c09 ldrb r1, [r1, r0] r1 gets gaRFSynVCODivI_c[r1]
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403a44: f7ff fb52 bl 4030ec <SetChannel>
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403a44: f7ff fb52 bl 4030ec <SetChannel> // SetChannel(chan,gaRFSynVCODivF_c[chan],gaRFSynVCODivI_c[chan])
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403a48: 2000 movs r0, #0
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403a48: 2000 movs r0, #0
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403a4a: e01d b.n 403a88 <??Subroutine2_0>
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403a4a: e01d b.n 403a88 <??Subroutine2_0>
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93
src/maca.c
93
src/maca.c
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@ -248,6 +248,7 @@ const uint32_t AIMVAL[19] = {
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0x0004e3a0,
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0x0004e3a0,
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};
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};
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/* tested and seems to be good */
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#define ADDR_POW1 0x8000a014
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#define ADDR_POW1 0x8000a014
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#define ADDR_POW2 ADDR_POW1 + 12
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#define ADDR_POW2 ADDR_POW1 + 12
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#define ADDR_POW3 ADDR_POW1 + 64
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#define ADDR_POW3 ADDR_POW1 + 64
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@ -257,6 +258,98 @@ void set_power(uint8_t power) {
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reg(ADDR_POW3) = AIMVAL[power];
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reg(ADDR_POW3) = AIMVAL[power];
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}
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}
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const uint8_t VCODivI[4] = {
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0x2f2f2f2f,
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0x2f2f2f2f,
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0x3030302f,
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0x30303030,
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};
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const uint8_t VCODivI[16] = {
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0x2f,
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0x2f,
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0x2f,
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0x2f,
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0x2f,
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0x2f,
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0x2f,
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0x2f,
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0x30,
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0x30,
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0x30,
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0x2f,
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0x30,
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0x30,
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0x30,
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0x30,
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};
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const uint32_t VCODivF[16] = {
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0x00355555,
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0x006aaaaa,
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0x00a00000,
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0x00d55555,
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0x010aaaaa,
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0x01400000,
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0x01755555,
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0x01aaaaaa,
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0x01e00000,
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0x00155555,
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0x004aaaaa,
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0x00800000,
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0x00b55555,
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0x00eaaaaa,
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0x01200000,
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0x01555555,
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};
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const uint8_t ctov_4c[16] = {
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0x0b,
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0x0b,
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0x0b,
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0x0a,
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0x0d,
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0x0d,
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0x0c,
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0x0c,
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0x0f,
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0x0e,
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0x0e,
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0x0e,
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0x11,
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0x10,
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0x10,
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0x0f,
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}
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#define ADDR_CHAN1 0x80009800
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#define ADDR_CHAN2 ADDR_CHAN1+12
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#define ADDR_CHAN3 ADDR_CHAN1+16
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#define ADDR_CHAN4 ADDR_CHAN1+48
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void set_channel(uint8_t chan) {
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volatile uint32_t tmp;
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tmp = reg(ADDR_CHAN1);
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tmp = tmp & 0xbfffffff;
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reg(ADDR_CHAN1) = tmp;
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reg(ADDR_CHAN2) = VCODivF[chan];
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reg(ADDR_CHAN2) = VCODivI[chan];
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tmp = reg(ADDR_CHAN4);
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tmp = tmp | 2;
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reg(ADDR_CHAN4) = tmp;
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tmp = reg(ADDR_CHAN4);
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tmp = tmp | 4;
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reg(ADDR_CHAN4) = tmp;
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tmp = tmp & 0xffffe0ff;
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tmp | ((ctov_4c[chan]<<8)&0x1F00);
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reg(ADDR_CHAN4) = tmp;
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/* duh! */
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}
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/*
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/*
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* Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning.
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* Do the ABORT-Wait-NOP-Wait sequence in order to prevent MACA malfunctioning.
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* This seqeunce is synchronous and no interrupts should be triggered when it is done.
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* This seqeunce is synchronous and no interrupts should be triggered when it is done.
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