mc1322x: flush the rx fifos when full
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@ -47,19 +47,21 @@ volatile uint32_t u1_rx_head, u1_rx_tail;
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void uart1_isr(void) {
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#if UART1_RX_BUFFERSIZE > 32
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if (*UART1_USTAT & ( 1 << 6)) { //receive interrupt
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while( *UART1_URXCON != 0 ) { //flush the hardware fifo into the software buffer
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uint32_t u1_rx_tail_next;
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u1_rx_tail_next = u1_rx_tail+1;
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if (u1_rx_tail_next >= sizeof(u1_rx_buf))
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u1_rx_tail_next = 0;
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if (u1_rx_head != u1_rx_tail_next) {
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u1_rx_buf[u1_rx_tail]= *UART1_UDATA;
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u1_rx_tail = u1_rx_tail_next;
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}
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if (*UART1_USTAT & ( 1 << 6)) { //receive interrupt
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while( *UART1_URXCON != 0 ) { //flush the hardware fifo into the software buffer
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uint32_t u1_rx_tail_next;
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u1_rx_tail_next = u1_rx_tail+1;
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if (u1_rx_tail_next >= sizeof(u1_rx_buf))
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u1_rx_tail_next = 0;
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if (u1_rx_head != u1_rx_tail_next) {
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u1_rx_buf[u1_rx_tail]= *UART1_UDATA;
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u1_rx_tail = u1_rx_tail_next;
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} else { //buffer is full, flush the fifo
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while (*UART1_URXCON !=0) if (*UART1_UDATA);
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}
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}
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return;
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}
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return;
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}
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#endif
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while( *UART1_UTXCON != 0 ) {
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@ -47,19 +47,21 @@ volatile uint32_t u2_rx_head, u2_rx_tail;
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void uart2_isr(void) {
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#if UART2_RX_BUFFERSIZE > 32
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if (*UART2_USTAT & ( 1 << 6)) { //receive interrupt
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while( *UART2_URXCON != 0 ) { //flush the hardware fifo into the software buffer
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uint32_t u2_rx_tail_next;
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u2_rx_tail_next = u2_rx_tail+1;
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if (u2_rx_tail_next >= sizeof(u2_rx_buf))
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u2_rx_tail_next = 0;
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if (u2_rx_head != u2_rx_tail_next) {
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u2_rx_buf[u2_rx_tail]= *UART2_UDATA;
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u2_rx_tail = u2_rx_tail_next;
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}
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if (*UART2_USTAT & ( 1 << 6)) { //receive interrupt
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while( *UART2_URXCON != 0 ) { //flush the hardware fifo into the software buffer
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uint32_t u2_rx_tail_next;
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u2_rx_tail_next = u2_rx_tail+1;
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if (u2_rx_tail_next >= sizeof(u2_rx_buf))
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u2_rx_tail_next = 0;
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if (u2_rx_head != u2_rx_tail_next) {
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u2_rx_buf[u2_rx_tail]= *UART2_UDATA;
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u2_rx_tail = u2_rx_tail_next;
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} else { //buffer is full, flush the fifo
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while (*UART2_URXCON !=0) if (*UART2_UDATA);
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}
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}
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return;
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}
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return;
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}
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#endif
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while( *UART2_UTXCON != 0 ) {
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