startup code
This commit is contained in:
Mariano Alvira
parent
f4312f7cf6
commit
721173449c
5
Makefile
5
Makefile
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@ -58,7 +58,7 @@ ALL = $(TESTS:.c=.srec) $(TESTS:.c=.bin) $(TESTS:.c=.dis)
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.PRECIOUS: $(COBJS) $(TARGETS) $(TESTS:.c=.obj)
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all: $(ALL)
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all: src/start.o $(ALL)
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tests/nvm-read.obj: src/maca.o
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tests/rftest-rx.obj: src/maca.o
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@ -74,10 +74,9 @@ tests/rftest-tx.obj: src/maca.o
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$(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
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%.dis: %.obj
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$(OBJDUMP) -d $< > $@
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$(OBJDUMP) -D $< > $@
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%.obj: $(LDSCRIPT) %.o
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echo $*.o
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$(LD) $(LDFLAGS) $(AOBJS) \
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--start-group $(PLATFORM_LIBS) --end-group \
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-Map $*.map $^ -o $@
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2
boot.lds
2
boot.lds
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@ -32,7 +32,7 @@ SECTIONS
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. = ALIGN(4);
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.text :
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{
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*(startup)
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src/start.o (.text)
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*(.text)
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}
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@ -407,6 +407,7 @@ typedef union maca_maskirq_reg_tag
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void reset_maca(void);
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void init_phy(void);
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void vreg_init(void);
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void ResumeMACASync(void);
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void radio_init(void);
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void set_power(uint8_t power);
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40
include/nvm.h
Normal file
40
include/nvm.h
Normal file
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@ -0,0 +1,40 @@
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#ifndef NVM_H
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#define NVM_H
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typedef enum
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{
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gNvmType_NoNvm_c,
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gNvmType_SST_c,
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gNvmType_ST_c,
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gNvmType_ATM_c,
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gNvmType_Max_c
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} nvmType_t;
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typedef enum
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{
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gNvmErrNoError_c = 0,
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gNvmErrInvalidInterface_c,
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gNvmErrInvalidNvmType_c,
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gNvmErrInvalidPointer_c,
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gNvmErrWriteProtect_c,
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gNvmErrVerifyError_c,
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gNvmErrAddressSpaceOverflow_c,
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gNvmErrBlankCheckError_c,
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gNvmErrRestrictedArea_c,
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gNvmErrMaxError_c
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} nvmErr_t;
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typedef enum
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{
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gNvmInternalInterface_c,
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gNvmExternalInterface_c,
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gNvmInterfaceMax_c
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} nvmInterface_t;
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/* ROM code seems to be THUMB */
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/* need to be in a THUMB block before calling them */
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volatile nvmErr_t (*nvm_detect)(nvmInterface_t nvmInterface,nvmType_t* pNvmType) = 0x00006cb9;
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volatile nvmErr_t (*nvm_read)(nvmInterface_t nvmInterface , nvmType_t nvmType , void *pDest, uint32_t address, uint32_t numBytes);
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#endif //NVM_H
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@ -1,3 +1,4 @@
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#include "embedded_types.h"
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#include "maca.h"
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#define reg(x) (*(volatile uint32_t *)(x))
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177
src/start.S
Normal file
177
src/start.S
Normal file
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@ -0,0 +1,177 @@
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/*
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* armboot - Startup Code for ARM720 CPU-core
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*
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* Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
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* Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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/*
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*************************************************************************
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*
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* Jump vector table as in table 3.1 in [1]
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*
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*************************************************************************
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*/
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.globl _start
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_start: b main
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ldr pc, _undefined_instruction
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ldr pc, _software_interrupt
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ldr pc, _prefetch_abort
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ldr pc, _data_abort
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ldr pc, _not_used
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ldr pc, _irq
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ldr pc, _fiq
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_undefined_instruction: .word undefined_instruction
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_software_interrupt: .word software_interrupt
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_prefetch_abort: .word prefetch_abort
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_data_abort: .word data_abort
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_not_used: .word not_used
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_irq: .word irq
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_fiq: .word fiq
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.balignl 16,0xdeadbeef
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/*
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*************************************************************************
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*
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* Startup Code (reset vector)
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*
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* do important init only if we don't start from memory!
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* relocate armboot to ram
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* setup stack
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* jump to second stage
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*
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*************************************************************************
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*/
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_TEXT_BASE:
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.word TEXT_BASE
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.globl _armboot_start
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_armboot_start:
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.word _start
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/*
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* These are defined in the board-specific linker script.
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*/
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.globl _bss_start
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_bss_start:
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.word __bss_start
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.globl _bss_end
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_bss_end:
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.word _end
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_start_armboot: .word main
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/*
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*************************************************************************
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*
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* CPU_init_critical registers
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*
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*************************************************************************
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*/
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cpu_init_crit:
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# actually do nothing for now!
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mov pc, lr
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/*
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*************************************************************************
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*
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* Interrupt handling
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*
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*************************************************************************
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*/
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@
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@ IRQ stack frame.
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@
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#define S_FRAME_SIZE 72
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#define S_OLD_R0 68
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#define S_PSR 64
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#define S_PC 60
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#define S_LR 56
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#define S_SP 52
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#define S_IP 48
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#define S_FP 44
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#define S_R10 40
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#define S_R9 36
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#define S_R8 32
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#define S_R7 28
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#define S_R6 24
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#define S_R5 20
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#define S_R4 16
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#define S_R3 12
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#define S_R2 8
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#define S_R1 4
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#define S_R0 0
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#define MODE_SVC 0x13
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#define I_BIT 0x80
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.macro get_irq_stack @ setup IRQ stack
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ldr sp, IRQ_STACK_START
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.endm
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.macro get_fiq_stack @ setup FIQ stack
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ldr sp, FIQ_STACK_START
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.endm
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/*
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* exception handlers
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*/
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.align 5
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undefined_instruction:
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.align 5
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software_interrupt:
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.align 5
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prefetch_abort:
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nop
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.align 5
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data_abort:
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.align 5
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not_used:
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.align 5
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irq:
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.align 5
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fiq:
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.align 5
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.globl reset_cpu
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reset_cpu:
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mov pc, r0
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@ -14,6 +14,7 @@
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#include "embedded_types.h"
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#include "nvm.h"
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#include "maca.h"
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#define reg(x) (*(volatile uint32_t *)(x))
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@ -30,8 +31,7 @@ const uint8_t hex[16]={'0','1','2','3','4','5','6','7',
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__attribute__ ((section ("startup")))
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void main(void) {
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uint8_t c;
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uint32_t type;
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uint32_t type=0xdeadbeef;
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nvmErr_t err;
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*(volatile uint32_t *)GPIO_PAD_DIR0 = 0x00000100;
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@ -55,9 +55,9 @@ void main(void) {
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vreg_init();
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puts("CRM status: 0x");
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put_hex32(reg(0x80003018));
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puts("\n\r");
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// puts("CRM status: 0x");
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// put_hex32(reg(0x80003018));
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// puts("\n\r");
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puts("Detecting internal nvm\n\r");
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@ -66,11 +66,10 @@ void main(void) {
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puts("nvm_detect returned: 0x");
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put_hex(err);
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puts(" type is: 0x");
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put_hex(type);
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put_hex32(type);
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puts("\n\r");
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while(1) {
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};
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while(1) {continue;};
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}
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void putc(uint8_t c) {
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